On Tue, Aug 25, 2015 at 03:35:29PM +0100, Bartlomiej Zolnierkiewicz wrote:
[ added Lorenzo and linux-pm to Cc: ]
Hi,
On Tuesday, August 25, 2015 11:43:38 AM Javier Martinez Canillas wrote:
[adding Kevin Hilman as cc who was also interested in CPUidle for Exynos]
Hello Krzysztof,
= psci;
enable-method should be after reg, it is not an ordering issues added
by this patch but I still do not like that.
Other than that, please take some time to rewrite the commit log and
ask to fix the ordering above, you can add my:
Acked-by: Lorenzo Pieralisi lorenzo.pieral...@arm.com
On Wed, Nov 05, 2014 at 10:15:36AM +, Chander Kashyap wrote:
Exynos7 has core power down state where cores can be powered off
independently.
This patch adds support for this state.
Entry latency for the core power down is calculated as follows:
1. Time difference is measured between
On Fri, Oct 17, 2014 at 10:43:59AM +0100, Chander Kashyap wrote:
Hi Lorenzo,
On Wed, Oct 15, 2014 at 2:30 PM, Lorenzo Pieralisi
lorenzo.pieral...@arm.com wrote:
On Wed, Oct 15, 2014 at 07:35:20AM +0100, Chander Kashyap wrote:
Exynos7 has core power down state where cores can be powered
On Wed, Oct 15, 2014 at 07:35:20AM +0100, Chander Kashyap wrote:
Exynos7 has core power down state where cores can be powered off
independently.
This patch adds support for this state.
Please tell us more about the idle-state values you are adding, in particular
entry, exit latencies and
[CC'ed Daniel to make him aware this patch goes through your tree]
On Thu, Sep 25, 2014 at 06:56:33AM +0100, Kukjin Kim wrote:
Bartlomiej Zolnierkiewicz wrote:
Recent patch by Tomasz Figa (irqchip: gic: Fix core ID calculation
when topology is read from DT) fixed GIC driver to filter
On Thu, Sep 25, 2014 at 10:02:05AM +0100, Daniel Lezcano wrote:
On 09/25/2014 10:17 AM, Lorenzo Pieralisi wrote:
[CC'ed Daniel to make him aware this patch goes through your tree]
Thanks for the head up. I was about to send the PR to Rafael.
[ ... ]
That's great, now my Exynos CPUidle
On Fri, Jul 04, 2014 at 10:21:56PM +0100, Abhilash Kesavan wrote:
On Sat, Jul 5, 2014 at 2:30 AM, Nicolas Pitre nicolas.pi...@linaro.org
wrote:
On Sat, 5 Jul 2014, Abhilash Kesavan wrote:
Use the MCPM layer to handle core suspend/resume on Exynos5420.
Also, restore the entry address
On Tue, Jul 01, 2014 at 02:14:49PM +0100, Abhilash Kesavan wrote:
Hi Nicolas,
On Tue, Jul 1, 2014 at 9:49 AM, Nicolas Pitre nicolas.pi...@linaro.org
wrote:
On Mon, 30 Jun 2014, Abhilash Kesavan wrote:
Use the MCPM layer to handle core suspend/resume on Exynos5420.
Also, restore the
On Thu, Jun 26, 2014 at 01:25:30PM +0100, Abhilash Kesavan wrote:
Hi,
On Thu, Jun 26, 2014 at 4:28 PM, Abhilash Kesavan a.kesa...@samsung.com
wrote:
Setup the mcpm entry address again on system resume as the
iRAM contents are lost across an s2r cycle.
Signed-off-by: Abhilash Kesavan
On Thu, Jun 26, 2014 at 01:25:30PM +0100, Abhilash Kesavan wrote:
Hi,
On Thu, Jun 26, 2014 at 4:28 PM, Abhilash Kesavan a.kesa...@samsung.com
wrote:
Setup the mcpm entry address again on system resume as the
iRAM contents are lost across an s2r cycle.
Signed-off-by: Abhilash Kesavan
On Wed, Jun 11, 2014 at 05:52:10AM +0100, Chander Kashyap wrote:
Hi Doug,
On Tue, Jun 10, 2014 at 9:19 PM, Nicolas Pitre nicolas.pi...@linaro.org
wrote:
On Tue, 10 Jun 2014, Doug Anderson wrote:
My S-state knowledge is not strong, but I believe that Lorenzo's
questions matter if
On Wed, Jun 11, 2014 at 01:14:21PM +0100, Chander Kashyap wrote:
On Wed, Jun 11, 2014 at 3:43 PM, Lorenzo Pieralisi
lorenzo.pieral...@arm.com wrote:
On Wed, Jun 11, 2014 at 05:52:10AM +0100, Chander Kashyap wrote:
Hi Doug,
On Tue, Jun 10, 2014 at 9:19 PM, Nicolas Pitre nicolas.pi
On Tue, Jun 10, 2014 at 05:25:47AM +0100, Nicolas Pitre wrote:
On Mon, 9 Jun 2014, Lorenzo Pieralisi wrote:
I commented on Nico's patch because I did not like how it was
implemented (at least remove the CPU PM notifier calls please, because
they are not needed).
OK no problem. That's
On Mon, Jun 09, 2014 at 09:47:42PM +0100, Kevin Hilman wrote:
Nicolas Pitre nicolas.pi...@linaro.org writes:
On Sun, 8 Jun 2014, Lorenzo Pieralisi wrote:
On Sun, Jun 08, 2014 at 12:53:34AM +0100, Olof Johansson wrote:
Lorenzo,
Since you're emailing from @arm.com, some
On Mon, Jun 09, 2014 at 06:03:31PM +0100, Doug Anderson wrote:
[...]
Cold boot and resume from suspend are detected via various special
flags in various special locations. Resume from suspend looks at
INFORM1 (0x10048004) for flags. This register is 0 during a cold boot
and has special
On Sun, Jun 08, 2014 at 12:53:34AM +0100, Olof Johansson wrote:
Lorenzo,
Since you're emailing from @arm.com, some of this is to the wider
recipient and maybe not directly to you:
I am glad to reply and take blame since this is a debate definitely worth
having.
[...]
Right, CCI snoops
On Sat, Jun 07, 2014 at 05:10:27PM +0100, Nicolas Pitre wrote:
On Sat, 7 Jun 2014, Abhilash Kesavan wrote:
Hi Nicolas,
The first man of the incoming cluster enables its snoops via the
power_up_setup function. During secondary boot-up, this does not occur
for the boot cluster. Hence,
On Fri, Jun 06, 2014 at 10:43:05PM +0100, Doug Anderson wrote:
On exynos mcpm systems the firmware is hardcoded to jump to an address
in SRAM (0x02073000) when secondary CPUs come up. By default the
firmware puts a bunch of code at that location. That code expects the
kernel to fill in a few
On Sat, Jun 07, 2014 at 09:06:36PM +0100, Nicolas Pitre wrote:
On Sat, 7 Jun 2014, Lorenzo Pieralisi wrote:
On Sat, Jun 07, 2014 at 05:10:27PM +0100, Nicolas Pitre wrote:
On Sat, 7 Jun 2014, Abhilash Kesavan wrote:
Hi Nicolas,
The first man of the incoming cluster enables
On Wed, May 14, 2014 at 02:04:51PM +0100, Arnd Bergmann wrote:
On Wednesday 14 May 2014 13:33:55 Chander Kashyap wrote:
diff --git a/drivers/cpuidle/cpuidle-big_little.c
b/drivers/cpuidle/cpuidle-big_little.c
index 4cd02bd..344d79fa 100644
--- a/drivers/cpuidle/cpuidle-big_little.c
On Tue, May 13, 2014 at 12:58:44PM +0100, Abhilash Kesavan wrote:
[...]
+static int __init exynos_mcpm_init(void)
+{
+ struct device_node *node;
+ int ret = 0;
There is no point in initializing it to 0.
+
+ node = of_find_compatible_node(NULL, NULL, samsung,exynos5420);
On Tue, May 13, 2014 at 12:43:31PM +0100, Chander Kashyap wrote:
[...]
+static void exynos_suspend(u64 residency)
+{
+ unsigned int mpidr, cpunr;
+
+ mpidr = read_cpuid_mpidr();
+ cpunr = exynos_pmu_cpunr(mpidr);
If I were to be picky, I would compute these values
On Mon, May 05, 2014 at 10:27:20AM +0100, Chander Kashyap wrote:
In order to support cpuidle through mcpm, suspend and powered-up
callbacks are required in mcpm platform code.
Hence populate the same callbacks.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
Signed-off-by: Chander
[added Nico in CC]
On Wed, Apr 23, 2014 at 10:25:54AM +0100, Chander Kashyap wrote:
In order to support cpuidle through mcpm, suspend and powered-up
callbacks are required in mcpm platform code.
Hence populate the same callbacks.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
On Wed, Apr 23, 2014 at 10:25:52AM +0100, Chander Kashyap wrote:
Add samsung,exynos5420 compatible string to initialize generic
big-little cpuidle driver for Exynos5420.
Signed-off-by: Chander Kashyap chander.kash...@linaro.org
Signed-off-by: Chander Kashyap k.chan...@samsung.com
Acked-by:
Hi Daniel,
On Fri, Apr 04, 2014 at 10:48:45AM +0100, Daniel Lezcano wrote:
The following driver is for exynos4210. I did not yet finished the other
boards, so
I created a specific driver for 4210 which could be merged later.
The driver is based on Colin Cross's driver found at:
On Mon, Jan 20, 2014 at 05:32:53PM +, Tomasz Figa wrote:
Hi Lorenzo,
On 16.01.2014 17:34, Lorenzo Pieralisi wrote:
Hi Tomasz,
thank you for posting this series. I would like to use the DT bindings
for power domains in the bindings for C-states on ARM:
http://comments.gmane.org
Hi Tomasz,
thank you for posting this series. I would like to use the DT bindings
for power domains in the bindings for C-states on ARM:
http://comments.gmane.org/gmane.linux.power-management.general/41012
and in particular link a given C-state to a given power domain so that the
kernel will
On Wed, Jul 17, 2013 at 01:57:30PM +0100, Daniel Lezcano wrote:
On 07/11/2013 03:14 PM, Bartlomiej Zolnierkiewicz wrote:
Hi,
On Friday, June 28, 2013 11:47:49 PM Daniel Lezcano wrote:
On 06/28/2013 06:27 PM, Bartlomiej Zolnierkiewicz wrote:
On Friday, June 28, 2013 01:20:09 PM
On Fri, Jun 28, 2013 at 11:11:24AM +0100, Tomasz Figa wrote:
Hi Daniel,
I've been fighting with this whole AFTR state as well, before Bartlomiej.
Let me share my thoughts on this.
On Friday 28 of June 2013 11:57:25 Daniel Lezcano wrote:
On 06/27/2013 08:10 PM, Bartlomiej Zolnierkiewicz
On Wed, Jun 19, 2013 at 01:50:57PM +0100, Tomasz Figa wrote:
On Wednesday 19 of June 2013 17:39:21 Chander Kashyap wrote:
On 18 June 2013 23:29, Kukjin Kim kgene@samsung.com wrote:
On 06/19/13 02:45, Tomasz Figa wrote:
Ccing Arnd and Olof, because I forgot to add them to git
On Mon, Jan 14, 2013 at 02:48:41PM +, Mark Rutland wrote:
Hello,
This all looks good. I just have a couple of comments about the cpus node.
On Sun, Jan 13, 2013 at 01:10:57AM +, Tomasz Figa wrote:
This patch adds basic device tree definitions for Samsung S3C64xx SoCs.
Since
On Tue, Jan 31, 2012 at 02:40:41PM +, Kukjin Kim wrote:
On 01/31/12 23:32, Will Deacon wrote:
On Tue, Jan 31, 2012 at 02:21:28PM +, Kukjin Kim wrote:
On 01/31/12 23:13, Will Deacon wrote:
This doesn't belong in smp.c but, more importantly, this doesn't work for
multi-cluster
On Tue, Nov 22, 2011 at 09:49:25AM +, Russell King - ARM Linux wrote:
On Tue, Nov 22, 2011 at 03:05:29PM +0530, Amit Daniel Kachhap wrote:
This patch adds code to save L2 register configuration at boot, and
later used to resume L2 before MMU is enabled in suspend and cpuidle
resume
inclusive of CPU PM notifiers, l2
resume and cpu_suspend/resume.
Signed-off-by: Jaecheol Lee jc@samsung.com
Signed-off-by: Lorenzo Pieralisi lorenzo.pieral...@arm.com
Signed-off-by: Amit Daniel Kachhap amit.kach...@linaro.org
---
arch/arm/mach-exynos/cpuidle.c | 148
On Fri, Aug 19, 2011 at 03:33:45PM +0100, Amit Kucheria wrote:
This patch is redundant with Lorenzo's new series[1]. Adding him to cc. I
suggest you rebase on top of his latest series.
Yes, thanks for pointing that out.
On 11 Aug 19, Amit Daniel Kachhap wrote:
These changes are necessary
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