Hi,
I'm trying to use the SPI port in a sun7i board, but in linux-sunxi
documentation I can only find how to enable it for sun4i devices.
Please can anybody explain how to enable SPI in sun7i devices?
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linux-sunxi
I'm using https://github.com/linux-sunxi/linux-sunxi sunxi-3.4 kernel,
and at first glance at the file drivers/spi/Kconfig it seems that there is
only sun4i and sun5i support.
Looking at other threads in this list it seems that there exists support
for sun7i devices,
please could anybody tell
Hi HNO,
I fallow this link to boot fedora 19 in my A20 board.
http://docs.cubieboard.org/tutorials/cb2/installation/cb2_fedora_19_card_install
my device is booted fine.
then i set root passwd and created an user.
but if login both as root and user , device is showing always incorrect
A few months ago I made this simple Android camera app that records a
sample of camera footage in h.264 to a file. The goal is to sort out
things on Android and then port over to Linux.
https://github.com/jonsmirl/cam
The app works in NV12 mode except the color space is messed up during
replay
On 24-02-14 15:23, Puneet B wrote:
Hi HNO,
I fallow this link to boot fedora 19 in my A20 board.
http://docs.cubieboard.org/tutorials/cb2/installation/cb2_fedora_19_card_install
my device is booted fine.
then i set root passwd and created an user.
but if login both as root and user ,
Hi all,
I am trying to install imagesfrom SD card to internal nand, first of all I
need to locate the internal nand device /dev/nand, however I could not.
dmesg reveals that something went wrong when the driver loaded:
here are the error messages:
[0.424664] [NAND] nand driver version:
Right now, AHB is an indirect child clock of the CPU clock. If that happens to
change, since the CPU clock has no other consumers declared in Linux, it would
be shut down, which is not really a good idea.
Prevent this by forcing it enabled.
Signed-off-by: Maxime Ripard
Now that we have a DMA driver, we can add the DMA bindings in the DTSI for the
controller and the devices supported that can use DMA.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
arch/arm/boot/dts/sun6i-a31.dtsi | 29 +
1 file changed, 29
Prevent the SDRAM controller from being gated by force-enabling it in the clock
driver.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
drivers/clk/sunxi/clk-sunxi.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/clk/sunxi/clk-sunxi.c
In order for the DMA controller to work for SDRAM to devices transfers, the AHB
clock should be reparented on the PLL6.
Force that parenting in the clock driver.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
drivers/clk/sunxi/clk-sunxi.c | 18 +-
1 file
Add new fields in nand_manufacturers and nand_chip struct to provide
manufacturer specific handling like read retries.
Signed-off-by: Boris BREZILLON b.brezillon@gmail.com
---
drivers/mtd/nand/nand_base.c |7 +++
include/linux/mtd/nand.h |4
2 files changed, 11
From: Ezequiel Garcia ezequiel.gar...@free-electrons.com
Some flashes can only be properly accessed when the ECC mode is
specified, so a way to describe such mode is required.
Together, the ECC strength and step size define the correction capability,
so that we say we will correct {strength} bit
Add an hynix initiliazer to manage read retries on h27uxgt8t2a chip.
Signed-off-by: Boris BREZILLON b.brezillon@gmail.com
---
drivers/mtd/nand/Makefile |2 +-
drivers/mtd/nand/nand_hynix.c | 151 +
drivers/mtd/nand/nand_ids.c |3 +-
Define a struct containing the standard NAND timings as described in NAND
datasheets.
Signed-off-by: Boris BREZILLON b.brezillon@gmail.com
---
include/linux/mtd/nand.h | 49 ++
1 file changed, 49 insertions(+)
diff --git
---
drivers/clk/sunxi/clk-factors.c | 36
1 file changed, 36 insertions(+)
diff --git a/drivers/clk/sunxi/clk-factors.c b/drivers/clk/sunxi/clk-factors.c
index 9e23264..3806d97 100644
--- a/drivers/clk/sunxi/clk-factors.c
+++
Add a converter to retrieve NAND timings from an ONFI NAND timing mode.
This only support SDR NAND timings for now.
Signed-off-by: Boris BREZILLON b.brezillon@gmail.com
---
drivers/mtd/nand/Makefile |2 +-
drivers/mtd/nand/nand_timings.c | 248
Add the sunxi NAND Flash Controller dt bindings documentation.
Signed-off-by: Boris BREZILLON b.brezillon@gmail.com
---
.../devicetree/bindings/mtd/sunxi-nand.txt | 48
1 file changed, 48 insertions(+)
create mode 100644
Add NAND Flash controller node definition to the A20 SoC.
Signed-off-by: Boris BREZILLON b.brezillon@gmail.com
---
arch/arm/boot/dts/sun7i-a20.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index
Add support for the sunxi NAND Flash Controller (NFC).
Signed-off-by: Boris BREZILLON b.brezillon@gmail.com
---
drivers/mtd/nand/Kconfig |6 +
drivers/mtd/nand/Makefile |1 +
drivers/mtd/nand/sunxi_nand.c | 1276 +
3 files changed,
Add a function to retrieve NAND timing mode (ONFI timing mode) from a given
DT node.
Signed-off-by: Boris BREZILLON b.brezillon@gmail.com
---
drivers/of/of_mtd.c| 19 +++
include/linux/of_mtd.h |8
2 files changed, 27 insertions(+)
diff --git
Enable the NFC and describe the NAND flash connected to this controller.
Signed-off-by: Boris BREZILLON b.brezillon@gmail.com
---
arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 17 +
1 file changed, 17 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
Add documentation for the ONFI NAND timing mode property.
Signed-off-by: Boris BREZILLON b.brezillon@gmail.com
---
Documentation/devicetree/bindings/mtd/nand.txt |9 +
1 file changed, 9 insertions(+)
diff --git a/Documentation/devicetree/bindings/mtd/nand.txt
---
drivers/clk/sunxi/clk-sunxi.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
index abb6c5a..c06977a 100644
--- a/drivers/clk/sunxi/clk-sunxi.c
+++ b/drivers/clk/sunxi/clk-sunxi.c
@@ -310,7 +310,7 @@
This patch introduce a new layer in the NAND framework to support both HW
and SW randomizers.
This randomization is required on some MLC/TLC NAND chips which do not
support large islands of same patterns.
The randomizer layer defines a nand_rnd_ctrl struct which is intended to
be used by NAND
Page status table is an byte array storing pages status.
It defines 3 status:
- unknown: the page has not been read yet and we do not know its current
state
- empty: the page contains only FFs
- filled: the page has been filled with data
Care must be taken: an empty page does not mean it
Signed-off-by: Boris BREZILLON b.brezillon@gmail.com
---
arch/arm/boot/dts/sun7i-a20-cubietruck.dts | 40
1 file changed, 40 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
b/arch/arm/boot/dts/sun7i-a20-cubietruck.dts
index
Add support for the HW randomizer available in the sunxi IP.
Signed-off-by: Boris BREZILLON b.brezillon@gmail.com
---
drivers/mtd/nand/sunxi_nand.c | 507 -
1 file changed, 496 insertions(+), 11 deletions(-)
diff --git a/drivers/mtd/nand/sunxi_nand.c
Signed-off-by: Boris BREZILLON b.brezillon@gmail.com
---
drivers/of/of_mtd.c| 35 +++
include/linux/of_mtd.h |6 ++
2 files changed, 41 insertions(+)
diff --git a/drivers/of/of_mtd.c b/drivers/of/of_mtd.c
index 8bdaa0b..0e2675f 100644
---
NV12 gives the correct color space (I was in NV21 earlier). This
camera must be wired in the opposite of the other ones I have. It is
also flipped left to right and I haven't figured out where to fix
that.
Compressed image quality is very poor. This is 3Mb/s.
enc_fmt.profileIdc = 100; /* high
Hi,
My tablet is A13a. my requirement is to connect external cam to the tablet,
Unable to find the kernel configuration file from this tablet to add
following.
CONFIG_VIDEO_DEV=y
CONFIG_VIDEO_V4L2_COMMON=y
CONFIG_VIDEO_MEDIA=y
CONFIG_USB_VIDEO_CLASS=y
CONFIG_V4L_USB_DRIVERS=y
On Mon, 24 Feb 2014 13:17:36 -0500 jonsm...@gmail.com
jonsm...@gmail.com wrote:
NV12 gives the correct color space (I was in NV21 earlier). This
camera must be wired in the opposite of the other ones I have. It is
also flipped left to right and I haven't figured out where to fix
that.
Compare it to these public Dropcams. They are using a slightly better
image sensor - OV5630. 500Kb/s 720P h.264 high encoding.
https://www.dropcam.com/cameras/featured
CPU - http://www.ambarella.com/
I'd love to get that good of quality recording.
--
Jon Smirl
jonsm...@gmail.com
--
You
On Mon, 24 Feb 2014 16:17:31 -0500 jonsm...@gmail.com
jonsm...@gmail.com wrote:
Compare it to these public Dropcams. They are using a slightly better
image sensor - OV5630. 500Kb/s 720P h.264 high encoding.
https://www.dropcam.com/cameras/featured
CPU - http://www.ambarella.com/
I'd love
Hello Russell,
El 24/02/14 13:30, Russell King - ARM Linux escribió:
On Mon, Feb 24, 2014 at 05:22:43PM +0100, Maxime Ripard wrote:
Right now, AHB is an indirect child clock of the CPU clock. If that happens to
change, since the CPU clock has no other consumers declared in Linux, it would
be
Hi Russell,
El 24/02/14 21:01, Russell King - ARM Linux escribió:
Hi Emilio.
On Mon, Feb 24, 2014 at 08:38:44PM -0300, Emilio López wrote:
Why is this so? Can't a clock be left enabled while nobody has a
reference to it? I have looked around in Documentation/ (rather quickly
I must say) and
On Mon, Feb 24, 2014 at 6:21 PM, Manuel Braga mul.br...@gmail.com wrote:
On Mon, 24 Feb 2014 16:17:31 -0500 jonsm...@gmail.com
jonsm...@gmail.com wrote:
Compare it to these public Dropcams. They are using a slightly better
image sensor - OV5630. 500Kb/s 720P h.264 high encoding.
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