[linux-sunxi] Re: [PATCH RFC] drm/sun4i: rgb: Add 5% tolerance to dot clock frequency check

2017-02-26 Thread Thierry Reding
On Fri, Feb 24, 2017 at 10:51:12AM +0100, Lucas Stach wrote: > +CC Thierry, as the drm_panel maintainer. > > Am Donnerstag, den 23.02.2017, 10:54 -0500 schrieb Sean Paul: > > On Wed, Dec 07, 2016 at 11:48:55AM +0200, Laurent Pinchart wrote: > > > Hello, > > > > > > On Wednesday 07 Dec 2016

Re: [linux-sunxi] [PATCH 2/3] pwm: sunxi: Add A64 support

2017-02-26 Thread Maxime Ripard
On Sat, Feb 25, 2017 at 05:23:09PM +0800, Icenowy Zheng wrote: > > > 25.02.2017, 16:53, "Chen-Yu Tsai" : > > On Sat, Feb 25, 2017 at 3:42 PM, Icenowy Zheng wrote: > >>  A64 PWM controller has same register layout as sun4i driver, so it works > >>  by adding A64

Re: [linux-sunxi] Re: [sunxi-tools PATCH] fel: add smc command

2017-02-26 Thread Siarhei Siamashka
On Mon, 27 Feb 2017 02:22:08 + André Przywara wrote: > On 27/02/17 01:20, Siarhei Siamashka wrote: > > On Wed, 22 Feb 2017 17:08:47 + > > Andre Przywara wrote: > > > >> If an SoC has the "secure boot" fuse burned, it will enter FEL mode in > >>

[linux-sunxi] Re: [PATCH 1/6] sunxi: GPIO: introduce sunxi_gpio_setup_dt_pins()

2017-02-26 Thread Chen-Yu Tsai
On Mon, Feb 27, 2017 at 8:26 AM, Andre Przywara wrote: > Instead of hard-coding GPIO pins used for a certain peripheral, we > should just use the pinctrl information from the DT. > The sun8i-emac driver has some simple implementation of that, so > let's just generalize

[linux-sunxi] Re: [PATCH 0/6] sunxi: update Pine64/A64 DTs

2017-02-26 Thread Chen-Yu Tsai
On Mon, Feb 27, 2017 at 8:26 AM, Andre Przywara wrote: > Hi, > > in the wake of the sunxi DM enablement series it became apparent that > the current device tree files for the A64 SoC and its board are outdated. > > Since Linux v4.10-rc1 there are now basic .dts files for

Re: [linux-sunxi] Re: [sunxi-tools PATCH] fel: add smc command

2017-02-26 Thread André Przywara
On 27/02/17 01:20, Siarhei Siamashka wrote: > On Wed, 22 Feb 2017 17:08:47 + > Andre Przywara wrote: > >> If an SoC has the "secure boot" fuse burned, it will enter FEL mode in >> non-secure state, so with the SCR.NS bit set. Since in this mode the >> secure/non-secure state

[linux-sunxi] Re: [sunxi-tools PATCH] fel: add smc command

2017-02-26 Thread Siarhei Siamashka
On Wed, 22 Feb 2017 17:08:47 + Andre Przywara wrote: > If an SoC has the "secure boot" fuse burned, it will enter FEL mode in > non-secure state, so with the SCR.NS bit set. Since in this mode the > secure/non-secure state restrictions are actually observed, we suffer > from

[linux-sunxi] [PATCH 2/6] net: sun8i-emac: use new, generic GPIO setup routine

2017-02-26 Thread Andre Przywara
Instead of open-coding the fairly generic pinmux setup in the sun8i-emac driver, let's just use the new common implementation of that. This has also the advantage of supporting the newpinctrl bindings, so the driver can cope with the upstream Linux DTs. Signed-off-by: Andre Przywara

[linux-sunxi] [PATCH 0/6] sunxi: update Pine64/A64 DTs

2017-02-26 Thread Andre Przywara
Hi, in the wake of the sunxi DM enablement series it became apparent that the current device tree files for the A64 SoC and its board are outdated. Since Linux v4.10-rc1 there are now basic .dts files for the Allwinner A64 SoC and the Pine64 boards in the mainline kernel. Linux v4.11-rc1 added

[linux-sunxi] [PATCH 1/6] sunxi: GPIO: introduce sunxi_gpio_setup_dt_pins()

2017-02-26 Thread Andre Przywara
Instead of hard-coding GPIO pins used for a certain peripheral, we should just use the pinctrl information from the DT. The sun8i-emac driver has some simple implementation of that, so let's just generalize this and move the code into a more common location. On the way we add support for the new,

[linux-sunxi] [PATCH 5/6] sunxi: dts: remove now obsolete pine64-common.dtsi

2017-02-26 Thread Andre Przywara
Now since the common DT nodes between the two Pine64 boards have been moved into the .dts for the non-plus model, we no longer need the extra -common.dtsi. Let's just remove it. Signed-off-by: Andre Przywara --- arch/arm/dts/sun50i-a64-pine64-common.dtsi | 93

[linux-sunxi] [PATCH 4/6] sunxi: dts: update Pine64 .dts

2017-02-26 Thread Andre Przywara
Update the two .dts files for the Pine64 boards with those used in the kernel. This switches from using a -common.dtsi to including the .dts for the non-plus model in the -plus file. Again we keep our EMAC driver nodes in, which are not yet in mainline Linux. Signed-off-by: Andre Przywara

[linux-sunxi] [PATCH 3/6] sunxi: dts: update sun50i-a64.dtsi from Linux

2017-02-26 Thread Andre Przywara
Now with USB and MMC for the A64 supported in mainline Linux, let's sync our DT with what's in the official Linux repository. This completely changes the clock representation, but U-Boot doesn't use this anyway. Also it switches to a new pinctrl binding, which uses generic property names. The only

[linux-sunxi] [PATCH 6/6] sunxi: dts: add Bananapi M64 .dts

2017-02-26 Thread Andre Przywara
Since mainline Linux gained support for the BananaPi-M64, let's just copy this DT to prepare the U-Boot support for that board. Again add the required DT nodes for the Ethernet IP. Signed-off-by: Andre Przywara --- arch/arm/dts/Makefile| 3 +-

[linux-sunxi] [PATCH v4 3/3] ARM: dts: sun8i: enable SID on Allwinner H3 SoC

2017-02-26 Thread Icenowy Zheng
As we have already made sunxi_sid driver support the SID controller on H3, enable it. Signed-off-by: Icenowy Zheng --- arch/arm/boot/dts/sun8i-h3.dtsi | 5 + 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi

[linux-sunxi] [PATCH v4 2/3] nvmem: sunxi-sid: add support for H3's SID controller

2017-02-26 Thread Icenowy Zheng
The H3 SoC have a bigger SID controller, which has its direct read address at 0x200 position in the SID block, not 0x0. Also, H3 SID controller has some silicon bug that makes the direct read value wrong at cold boot, add code to workaround the bug. (This bug has already been fixed on A64 and

[linux-sunxi] [PATCH v4 1/3] nvmem: sunxi-sid: read NVMEM size from device compatible

2017-02-26 Thread Icenowy Zheng
Sometimes the SID device have more memory address space than the real NVMEM size (for the registers used to read/write the SID). Fetch the NVMEM size from device compatible, rather than the memory address space's length, in order to prepare for adding some registers-based read support.

[linux-sunxi] sun4i-ts hwmon broken with linux 4.10

2017-02-26 Thread Michael Weiser
Hi, I'm running statically linked (i.e. no loadable modules) vanilla kernels on Cubieboard2's. With 4.9 and earlier the hwmon interface of the sun4i-ts driver works flawlessly and reports something like: # sensors sun4i_ts-isa- Adapter: ISA adapter SoC temperature: +44.4°C Conversely,

[linux-sunxi] Re: [PATCH v5 2/7] clk: sunxi-ng: rename sun8i-h3 driver to sunxi-h3-h5

2017-02-26 Thread Icenowy Zheng
26.02.2017, 17:52, "Rask Ingemann Lambertsen" : > On Sun, Feb 26, 2017 at 09:19:51AM +0800, Icenowy Zheng wrote: >>  As the CCU in the Allwinner H5 SoC is very similar to the one in H3, >>  rename the H3 driver to sunxi-h3-h5 so that it can be extended with H5 >>  support. >>

[linux-sunxi] Re: [PATCH v5 6/7] arm64: dts: allwinner: add Allwinner H5 .dtsi

2017-02-26 Thread Icenowy Zheng
26.02.2017, 16:56, "Rask Ingemann Lambertsen" : > On Sun, Feb 26, 2017 at 09:19:55AM +0800, Icenowy Zheng wrote: >>  From: Andre Przywara >> >>  The Allwinner H5 SoC is pin-compatible to the H3 SoC, but uses >>  Cortex-A53 cores instead. >>  Based on

[linux-sunxi] Re: [PATCH v2] ARM: spi/sun7i: Add Master Sample Data Mode for SPI

2017-02-26 Thread Vinicius Maciel
Em segunda-feira, 13 de fevereiro de 2017 09:52:53 UTC-3, Mark Brown escreveu: > > This should be controlled by the SPI mode settings, different chips have > different requirements. If the controller supports multiple modes then > it should expose that and let the drivers and system

Re: [linux-sunxi] Toggeling LDO3 causes crash/shutdown of the AXP209. Some verification help needed.

2017-02-26 Thread Marcus Weseloh
Hi again, more experiments with LDO3: If I set the voltage of LDO3 to the minimum value (0.7V): => i2c mw 0x34 0x29 0x0 then I can toggle LDO3 on and off without the AXP shutting down. Even increasing LDO3 voltage after it's been enabled works without problems: => i2c mw 0x34 0x12 0x57 => i2c

Re: [linux-sunxi] Toggeling LDO3 causes crash/shutdown of the AXP209. Some verification help needed.

2017-02-26 Thread Marcus Weseloh
2017-02-26 13:19 GMT+01:00 Marcus Weseloh : > So when we switch on LDO3 and the AXP powers that rail, there are now two > sources driving that line. Might be that the AXP notices this, maybe even > sees current flowing into it's output, and shuts down immediately. > I'll

Re: [linux-sunxi] Toggeling LDO3 causes crash/shutdown of the AXP209. Some verification help needed.

2017-02-26 Thread Marcus Weseloh
2017-02-26 11:31 GMT+01:00 Priit Laes : > Could it be a layout/design issue with Olimex boards? It may well be! Looking at the schematic of the A20-SOM-EVB (the base board for the A20-SOM), it seems like the CSI interface is powered via the +5V supply and converter to 2.8V. But

Re: [linux-sunxi] Toggeling LDO3 causes crash/shutdown of the AXP209. Some verification help needed.

2017-02-26 Thread Priit Laes
On Fri, 2017-02-24 at 23:13 +0100, Olliver Schinagl wrote: > Hey all, > > I've seen some discussion in the past about the state of LDO3 on > several  > boards. Some people mentioned hangs on enabeling them from the kernel > etc. > > [..] Tried this on my sunxi zoo, AXP version/revision is

[linux-sunxi] Re: [PATCH v5 6/7] arm64: dts: allwinner: add Allwinner H5 .dtsi

2017-02-26 Thread Chen-Yu Tsai
On Sun, Feb 26, 2017 at 4:55 PM, Rask Ingemann Lambertsen wrote: > On Sun, Feb 26, 2017 at 09:19:55AM +0800, Icenowy Zheng wrote: >> From: Andre Przywara >> >> The Allwinner H5 SoC is pin-compatible to the H3 SoC, but uses >> Cortex-A53 cores instead.