Re: [linux-sunxi] [PATCH 2/3] arm64: allwinner: h5: Add initial Orangepi Prime support

在 2017-05-27 00:44，Jagan Teki 写道： On Fri, May 26, 2017 at 10:10 PM, wrote: 在 2017-05-26 03:26，Jagan Teki 写道： From: Jagan Teki Orangepi Prime is an open-source single-board computer using the Allwinner h5 SOC. Sorry but I have already added

Re: [linux-sunxi] Re: [PATCH 00/12] Big work on sunxi DW DRAM controllers and some new DDR type support

在 2017-04-27 15:09，Maxime Ripard 写道： Hi, On Wed, Apr 26, 2017 at 10:49:55PM +0800, Icenowy Zheng wrote: This patchset contains several works on the sunxi DesignWare DRAM controllers. The 1st patch made an option for H3-like DRAM controllers (DesignWare ones), which can ease further import of

Re: [linux-sunxi] [PATCH 2/3] arm64: allwinner: h5: Add initial Orangepi Prime support

On Fri, May 26, 2017 at 10:10 PM, wrote: > 在 2017-05-26 03:26，Jagan Teki 写道： >> >> From: Jagan Teki >> >> Orangepi Prime is an open-source single-board computer >> using the Allwinner h5 SOC. > > > Sorry but I have already added this board and it's >

Re: [linux-sunxi] [PATCH 2/3] arm64: allwinner: h5: Add initial Orangepi Prime support

在 2017-05-26 03:26，Jagan Teki 写道： From: Jagan Teki Orangepi Prime is an open-source single-board computer using the Allwinner h5 SOC. Sorry but I have already added this board and it's scheduled at 4.13. H5 Orangepi Prime has - Quad-core Cortex-A53 - 2GB DDR3 -

Re: [linux-sunxi] [PATCH 1/3] arm64: allwinner: a64: Add initial Orangepi Win/WinPlus support

于 2017年5月26日 GMT+08:00 下午4:59:18, Andre Przywara 写到: >Hi, > >On 26/05/17 04:54, Chen-Yu Tsai wrote: >> On Fri, May 26, 2017 at 6:30 AM, André Przywara > wrote: >>> On 25/05/17 20:26, Jagan Teki wrote: From: Jagan Teki

Re: [linux-sunxi] [PATCH 1/3] arm64: allwinner: a64: Add initial Orangepi Win/WinPlus support

Hi, On 26/05/17 04:54, Chen-Yu Tsai wrote: > On Fri, May 26, 2017 at 6:30 AM, André Przywara > wrote: >> On 25/05/17 20:26, Jagan Teki wrote: >>> From: Jagan Teki >>> >>> Orangepi Win/WinPlus is an open-source single-board computer >>> using

[linux-sunxi] [PATCH 2/3] clk: sunxi-ng: a83t: Add support for A83T's PRCM

The A83T's PRCM has the same set of clocks and resets as the A64. However, a few dividers are different. And due to the lack of a low speed 32.768 kHz oscillator, a few of the clock parents are different. Signed-off-by: Chen-Yu Tsai --- drivers/clk/sunxi-ng/ccu-sun8i-r.c | 107

[linux-sunxi] [PATCH 3/3] ARM: sun8i: a83t: Add device node for PRCM

The A83T's PRCM has the same set of clocks and resets as the A64. However, a few dividers are different. And due to the lack of a low speed 32.768 kHz oscillator, a few of the clock parents are different. The PRCM also has controls for various power domains. These are not supported yet, neither

[linux-sunxi] [PATCH 0/3] clk: sunxi-ng: Add support for A83T's PRCM

Hi everyone, This series adds support for the A83T's PRCM to the existing sun8i-r-ccu driver. When the sun8i-r-ccu driver was introduced, indices were reserved for all the possible clocks and resets of the sun8i family. In patch 2 we simply pick existing clocks, and implement ones that are

[linux-sunxi] [PATCH 1/3] dt-bindings: clock: sunxi-ccu: Add compatible string for A83T PRCM

The A83T's PRCM has the same set of clocks and resets as the A64. However, a few dividers are different. And due to the lack of a low speed 32.768 kHz oscillator, a few of the clock parents are different. The PRCM also has controls for various power domains. These are not supported yet.