[linux-sunxi] Re: [PATCH 12/12] sunxi: add a defconfig for SoPine w/ official baseboard

在 2017-06-03 09:19，André Przywara 写道： Hi, On 26/04/17 15:50, Icenowy Zheng wrote: The SoPine is a SoM by Pine64, with an Allwinner A64 SoC, a LPDDR3 DRAM chip, an AXP803 PMIC, a SPI NOR Flash and a MicroSD slot. The card detect pin of the MicroSD slot is broken, however, it doesn't matter as

[linux-sunxi] Re: [PATCH 12/12] sunxi: add a defconfig for SoPine w/ official baseboard

Hi, On 26/04/17 15:50, Icenowy Zheng wrote: > The SoPine is a SoM by Pine64, with an Allwinner A64 SoC, a LPDDR3 DRAM > chip, an AXP803 PMIC, a SPI NOR Flash and a MicroSD slot. The card > detect pin of the MicroSD slot is broken, however, it doesn't matter as > the design of SoPine didn't allow

[linux-sunxi] Re: [U-Boot] [PATCH 00/12] Big work on sunxi DW DRAM controllers and some new DDR type support

On 02/06/17 19:34, Jagan Teki wrote: > On Wed, Apr 26, 2017 at 8:19 PM, Icenowy Zheng wrote: >> This patchset contains several works on the sunxi DesignWare DRAM >> controllers. >> >> The 1st patch made an option for H3-like DRAM controllers >> (DesignWare ones), which can ease

[linux-sunxi] Re: [U-Boot] [PATCH 12/12] sunxi: add a defconfig for SoPine w/ official baseboard

On 03/06/17 00:59, André Przywara wrote: > Hi, > > On 02/06/17 19:32, Jagan Teki wrote: >> On Wed, Apr 26, 2017 at 8:20 PM, Icenowy Zheng wrote: >>> The SoPine is a SoM by Pine64, with an Allwinner A64 SoC, a LPDDR3 DRAM >>> chip, an AXP803 PMIC, a SPI NOR Flash and a MicroSD

[linux-sunxi] Re: [U-Boot] [PATCH 12/12] sunxi: add a defconfig for SoPine w/ official baseboard

Hi, On 02/06/17 19:32, Jagan Teki wrote: > On Wed, Apr 26, 2017 at 8:20 PM, Icenowy Zheng wrote: >> The SoPine is a SoM by Pine64, with an Allwinner A64 SoC, a LPDDR3 DRAM >> chip, an AXP803 PMIC, a SPI NOR Flash and a MicroSD slot. The card >> detect pin of the MicroSD slot is

[linux-sunxi] Re: [PATCH v6 00/21] net-next: stmmac: add dwmac-sun8i ethernet driver

Hi, On Fri, Jun 02, 2017 at 10:22:05AM -0400, David Miller wrote: > From: Maxime Ripard > Date: Fri, 2 Jun 2017 11:13:20 +0200 > > > On Fri, Jun 02, 2017 at 08:37:52AM +0200, Maxime Ripard wrote: > >> On Thu, Jun 01, 2017 at 02:58:19PM -0400, David Miller

Re: [linux-sunxi] Re: [RFC PATCH 07/11] drm: sun4i: add support for the TV encoder in H3 SoC

On Thu, Jun 01, 2017 at 10:11:14PM +0800, icen...@aosc.io wrote: > 在 2017-06-01 02:43，Maxime Ripard 写道： > > On Wed, May 24, 2017 at 04:25:46PM +0800, Icenowy Zheng wrote: > > > > > > > > > 于 2017年5月24日 GMT+08:00 下午3:30:19, Maxime Ripard > > > 写到: > > > >On Tue,

Re: [linux-sunxi] [PATCH 1/2] ARM: sun8i: v3s: add device nodes for DE2 display pipeline

On Mon, May 29, 2017 at 09:01:59PM +0800, icen...@aosc.io wrote: > 在 2017-05-29 16:59，Maxime Ripard 写道： > > On Thu, May 25, 2017 at 10:28:24PM +0800, Icenowy Zheng wrote: > > > + compatible = "allwinner,sun8i-v3s-de2-mixer"; > > > + reg =

[linux-sunxi] Re: [PATCH 19/19] ARM: sun6i: a31s: Enable HDMI display output on the MSI Primo81 tablet

On Fri, Jun 02, 2017 at 06:10:24PM +0800, Chen-Yu Tsai wrote: > The MSI Primo81 tablet has a micro HDMI connector at the bottom. > This is connected to the SoCs HDMI output. > > Enable the display pipeline and the HDMI output. > > Signed-off-by: Chen-Yu Tsai > --- >

[linux-sunxi] Re: [PATCH 14/19] drm/sun4i: hdmi: Add support for A31's HDMI controller

On Fri, Jun 02, 2017 at 06:10:19PM +0800, Chen-Yu Tsai wrote: > The HDMI controller found in the A31 SoCs is slightly different > from the one already supported, which is found in the A10s: > > - Need different initial values for the PLL related registers > > - Different behavior of the DDC

[linux-sunxi] Re: [PATCH 13/19] drm/sun4i: hdmi: Add support for controller hardware variants

On Fri, Jun 02, 2017 at 06:10:18PM +0800, Chen-Yu Tsai wrote: > The HDMI controller found in earlier Allwinner SoCs have slight > differences: > > - Need different initial values for the PLL related registers > > - Different behavior of the DDC and TMDS clocks > > - Different register

[linux-sunxi] Re: [PATCH 12/19] drm/sun4i: hdmi: Support the DDC clock in the A31's HDMI controller

On Fri, Jun 02, 2017 at 06:10:17PM +0800, Chen-Yu Tsai wrote: > On the A31, the HDMI DDC block is different from the one in the > other SoCs. As far as the DDC clock goes, it has no pre-divider, > as it is clocked from a slower parent clock, not the TMDS clock. > The divider offset from the

[linux-sunxi] Re: [PATCH 10/19] drm/sun4i: hdmi: Rename internal DDC clock to avoid name collision

On Fri, Jun 02, 2017 at 06:10:15PM +0800, Chen-Yu Tsai wrote: > The DDC parent clock on the A31 SoC is also conveniently named > "hdmi-ddc", which results in a name collision when the hdmi driver > registers its internal DDC divider clock. > > Rename the internal clock to "hdmi-ddc-divider". > >

[linux-sunxi] Re: [PATCH 02/19] drm/sun4i: add components in two passes with encoders added in second pass

On Fri, Jun 02, 2017 at 06:10:07PM +0800, Chen-Yu Tsai wrote: > The encoder drivers use drm_of_find_possible_crtcs to get upstream > crtcs from the device tree using of_graph. For the results to be > correct, encoders must be probed/bound after _all_ crtcs have been > created. The existing code

[linux-sunxi] Re: [U-Boot] [PATCH 00/12] Big work on sunxi DW DRAM controllers and some new DDR type support

On Wed, Apr 26, 2017 at 8:19 PM, Icenowy Zheng wrote: > This patchset contains several works on the sunxi DesignWare DRAM > controllers. > > The 1st patch made an option for H3-like DRAM controllers > (DesignWare ones), which can ease further import of alike controllers. > > The

[linux-sunxi] Re: [U-Boot] [PATCH 12/12] sunxi: add a defconfig for SoPine w/ official baseboard

On Wed, Apr 26, 2017 at 8:20 PM, Icenowy Zheng wrote: > The SoPine is a SoM by Pine64, with an Allwinner A64 SoC, a LPDDR3 DRAM > chip, an AXP803 PMIC, a SPI NOR Flash and a MicroSD slot. The card > detect pin of the MicroSD slot is broken, however, it doesn't matter as > the

[linux-sunxi] Re: [U-Boot] [PATCH v2] sun50i: h5: Add initial Orangepi Prime support

On Fri, Jun 2, 2017 at 6:53 PM, Maxime Ripard wrote: > On Thu, Jun 01, 2017 at 03:25:32PM +, Jagan Teki wrote: >> From: Jagan Teki >> >> Orangepi Prime is an open-source single-board computer >> using the Allwinner h5 SOC. >> >>

Re: [linux-sunxi] [PATCH v2] sun50i: h5: Add initial Orangepi Prime support

On Fri, Jun 02, 2017 at 10:31:48PM +0800, icen...@aosc.io wrote: > 在 2017-06-01 23:25，Jagan Teki 写道： > > From: Jagan Teki > > > > Orangepi Prime is an open-source single-board computer > > using the Allwinner h5 SOC. > > > > H5 Orangepi Prime has > > - Quad-core

Re: [linux-sunxi] [PATCH v2] sun50i: h5: Add initial Orangepi Prime support

在 2017-06-01 23:25，Jagan Teki 写道： From: Jagan Teki Orangepi Prime is an open-source single-board computer using the Allwinner h5 SOC. H5 Orangepi Prime has - Quad-core Cortex-A53 - 2GB DDR3 - Debug TTL UART - 1000M/100M Ethernet RJ45 - Three USB 2.0 - HDMI - Audio

[linux-sunxi] Re: [PATCH v6 00/21] net-next: stmmac: add dwmac-sun8i ethernet driver

From: Maxime Ripard Date: Fri, 2 Jun 2017 11:13:20 +0200 > On Fri, Jun 02, 2017 at 08:37:52AM +0200, Maxime Ripard wrote: >> On Thu, Jun 01, 2017 at 02:58:19PM -0400, David Miller wrote: >> > From: Corentin Labbe >> > Date: Wed, 31

[linux-sunxi] Re: [PATCH v6 00/21] net-next: stmmac: add dwmac-sun8i ethernet driver

From: Maxime Ripard Date: Fri, 2 Jun 2017 08:37:52 +0200 > On Thu, Jun 01, 2017 at 02:58:19PM -0400, David Miller wrote: >> From: Corentin Labbe >> Date: Wed, 31 May 2017 09:18:31 +0200 >> >> > This patch series add the driver for

[linux-sunxi] Re: [PATCH v2] sun50i: h5: Add initial Orangepi Prime support

On Thu, Jun 01, 2017 at 03:25:32PM +, Jagan Teki wrote: > From: Jagan Teki > > Orangepi Prime is an open-source single-board computer > using the Allwinner h5 SOC. > > H5 Orangepi Prime has > - Quad-core Cortex-A53 > - 2GB DDR3 > - Debug TTL UART > - 1000M/100M

[linux-sunxi] [PATCH 18/19] ARM: sun6i: a31s: Enable HDMI display output on the Sinlinx SinA31s

The Sinlinx SinA31s has an HDMI connector wired to the HDMI pins from the SoC. Enable the display pipeline and the HDMI output. Signed-off-by: Chen-Yu Tsai --- arch/arm/boot/dts/sun6i-a31s-sina31s.dts | 25 + 1 file changed, 25 insertions(+) diff --git

[linux-sunxi] [PATCH 16/19] ARM: sun6i: a31: Add device node for HDMI controller

Now that we support the HDMI controller on the A31 SoC, we can add it to the device tree. This adds a device node for the HDMI controller, and the of_graph nodes connecting it to the 2 TCONs. Signed-off-by: Chen-Yu Tsai --- arch/arm/boot/dts/sun6i-a31.dtsi | 55

[linux-sunxi] [PATCH 14/19] drm/sun4i: hdmi: Add support for A31's HDMI controller

The HDMI controller found in the A31 SoCs is slightly different from the one already supported, which is found in the A10s: - Need different initial values for the PLL related registers - Different behavior of the DDC and TMDS clocks - Different register layout for the DDC portion -

[linux-sunxi] [PATCH 12/19] drm/sun4i: hdmi: Support the DDC clock in the A31's HDMI controller

On the A31, the HDMI DDC block is different from the one in the other SoCs. As far as the DDC clock goes, it has no pre-divider, as it is clocked from a slower parent clock, not the TMDS clock. The divider offset from the register value is different. And the clock control register is at a

[linux-sunxi] [PATCH 15/19] clk: sunxi-ng: sun6i: Export video PLLs

The 2x outputs of the 2 video PLL clocks are directly used by the HDMI controller block. Export them so they can be referenced in the device tree. Signed-off-by: Chen-Yu Tsai --- drivers/clk/sunxi-ng/ccu-sun6i-a31.h | 8 ++-- include/dt-bindings/clock/sun6i-a31-ccu.h |

[linux-sunxi] [PATCH 13/19] drm/sun4i: hdmi: Add support for controller hardware variants

The HDMI controller found in earlier Allwinner SoCs have slight differences: - Need different initial values for the PLL related registers - Different behavior of the DDC and TMDS clocks - Different register layout for the DDC portion - Separate DDC parent clock on the A31 -

[linux-sunxi] [PATCH 05/19] drm/sun4i: hdmi: Allow using second PLL as TMDS clk parent

On SoCs with two display pipelines, it is possible that the two pipelines are active at the same time, with potentially incompatible dot clocks. Let the HDMI encoder's TMDS clock go through all of its parents when calculating possible clock rates. This allows usage of the second video PLL as its

[linux-sunxi] [PATCH 04/19] drm/sun4i: hdmi: Disable clks in bind function error path and unbind function

The HDMI driver enables the bus and mod clocks in the bind function, but does not disable them if it then bails our due to any errors. Neither does it disable the clocks in the unbind function. Fix this by adding a proper error path to the bind function, and clk_disable_unprepare calls to the

[linux-sunxi] [PATCH 09/19] drm/sun4i: hdmi: Support different variants of the DDC clock

On the A31, the HDMI DDC block is different from the one in the other SoCs. As far as the DDC clock goes, it has no pre-divider, as it is clocked from a slower parent clock, not the TMDS clock. The divider offset from the register value is different. And the clock control register is at a

[linux-sunxi] [PATCH 17/19] ARM: sun6i: a31: Enable HDMI support on the A31 Hummingbird

The A31 Humminbird has an HDMI connector wired to the HDMI pins on the SoC. Enable HDMI support for this board. Signed-off-by: Chen-Yu Tsai --- arch/arm/boot/dts/sun6i-a31-hummingbird.dts | 21 + 1 file changed, 21 insertions(+) diff --git

[linux-sunxi] [PATCH 08/19] drm/sun4i: hdmi: Support the TMDS clock in the A31's HDMI controller

The A31's HDMI controller's TMDS clock is slightly different. There is an offset of 1 between the divider value and the actual value programmed into the registers. Signed-off-by: Chen-Yu Tsai --- drivers/gpu/drm/sun4i/sun4i_hdmi.h | 1 +

[linux-sunxi] [PATCH 03/19] drm/sun4i: tcon: Add support for demuxing TCON output on A31

On systems with 2 TCONs such as the A31, it is possible to demux the output of the TCONs to one encoder. Add support for this for the A31. Signed-off-by: Chen-Yu Tsai --- drivers/gpu/drm/sun4i/sun4i_tcon.c | 61 ++ 1 file changed, 61

[linux-sunxi] [PATCH 02/19] drm/sun4i: add components in two passes with encoders added in second pass

The encoder drivers use drm_of_find_possible_crtcs to get upstream crtcs from the device tree using of_graph. For the results to be correct, encoders must be probed/bound after _all_ crtcs have been created. The existing code uses a depth first recursive traversal of the of_graph, which means the

[linux-sunxi] [PATCH 19/19] ARM: sun6i: a31s: Enable HDMI display output on the MSI Primo81 tablet

The MSI Primo81 tablet has a micro HDMI connector at the bottom. This is connected to the SoCs HDMI output. Enable the display pipeline and the HDMI output. Signed-off-by: Chen-Yu Tsai --- arch/arm/boot/dts/sun6i-a31s-primo81.dts | 25 + 1 file changed,

[linux-sunxi] [PATCH 11/19] drm/sun4i: hdmi: Add A31 specific DDC register definitions

The DDC block for the HDMI controller is different on the A31. This patch adds the register definitions. Signed-off-by: Chen-Yu Tsai --- drivers/gpu/drm/sun4i/sun4i_hdmi.h | 26 ++ 1 file changed, 26 insertions(+) diff --git

[linux-sunxi] [PATCH 01/19] drm/sun4i: call drm_vblank_init with correct number of crtcs

If we want to have vblank on both pipelines at the same time, we need to call drm_vblank_init with num_crtcs = 2. Instead, since the crtc init calls correctly set mode_config.num_crtc, we can move the drm_vblank_init call to after the crtc init code is called, which is the component bind part.

[linux-sunxi] [PATCH 00/19] drm/sun4i: hdmi: Support HDMI controller on A31

Hi everyone, This series adds support for the HDMI controller found on Allwinner A31/A31s SoCs. It builds upon Maxime's work that added support for the HDMI controller on the Allwinner A10s SoC. The HDMI controllers in the older generation Allwinner SoCs is very similar. The A10/A10s/A20 all

[linux-sunxi] [PATCH 10/19] drm/sun4i: hdmi: Rename internal DDC clock to avoid name collision

The DDC parent clock on the A31 SoC is also conveniently named "hdmi-ddc", which results in a name collision when the hdmi driver registers its internal DDC divider clock. Rename the internal clock to "hdmi-ddc-divider". Signed-off-by: Chen-Yu Tsai ---

[linux-sunxi] [PATCH 06/19] dt-bindings: display: sun4i: Add binding for A31 HDMI controller

The HDMI controller in the A31 SoC is slightly different from the earlier version. In addition to the TMDS clock and DDC controls, this version now takes a second DDC clock input. Add a compatible string for it, and add the DDC clock input to the list of clocks required. Signed-off-by: Chen-Yu

[linux-sunxi] [PATCH 07/19] drm/sun4i: hdmi: Support different variants of the TMDS clock

On the A31, the HDMI TMDS clock has a different value offset for the divider. This patch adds support for custom offsets to the TMDS clock. Signed-off-by: Chen-Yu Tsai --- drivers/gpu/drm/sun4i/sun4i_hdmi_tmds_clk.c | 26 +++--- 1 file changed, 19

[linux-sunxi] Re: [PATCH v6 00/21] net-next: stmmac: add dwmac-sun8i ethernet driver

On Fri, Jun 02, 2017 at 08:37:52AM +0200, Maxime Ripard wrote: > On Thu, Jun 01, 2017 at 02:58:19PM -0400, David Miller wrote: > > From: Corentin Labbe > > Date: Wed, 31 May 2017 09:18:31 +0200 > > > > > This patch series add the driver for dwmac-sun8i which handle the

[linux-sunxi] Re: [PATCH v6 00/21] net-next: stmmac: add dwmac-sun8i ethernet driver

On Thu, Jun 01, 2017 at 02:58:19PM -0400, David Miller wrote: > From: Corentin Labbe > Date: Wed, 31 May 2017 09:18:31 +0200 > > > This patch series add the driver for dwmac-sun8i which handle the Ethernet > > MAC > > present on Allwinner H3/H5/A83T/A64 SoCs. > >