"Hi,
On Tue, Jul 18, 2017 at 10:40 AM, Konrad Rzeszutek Wilk
wrote:
> Hey,
>
> I am trying to install an U-boot from the upstream repo as it looks to have
> most (if not all?)
> of the features needed for the A80 board (Cubieboard4).
>
> I've built the uboot just fine (using
于 2017年7月18日 GMT+08:00 上午10:58:52, Chen-Yu Tsai 写到:
>On Fri, May 19, 2017 at 4:55 PM, Andre Przywara
> wrote:
>> Hi,
>>
>> On 19/05/17 09:29, Icenowy Zheng wrote:
>>>
>>>
>>> 于 2017年5月19日 GMT+08:00 下午4:27:21, Andre Przywara
> 写到:
On Fri, May 19, 2017 at 10:29 AM, Chen-Yu Tsai wrote:
> On Thu, May 18, 2017 at 3:16 PM, Icenowy Zheng wrote:
>> As nearly all A64 boards are using AXP803 PMIC, add a DTSI file for it,
>> like the old DTSI files for AXP20x/22x, for the common parts of the
>> PMIC.
On Fri, May 19, 2017 at 10:28 AM, Chen-Yu Tsai wrote:
> On Thu, May 18, 2017 at 3:16 PM, Icenowy Zheng wrote:
>> The Pine64 (including Pine64+) boards have an AXP803 as its main PMIC.
>>
>> Add its device node.
>>
>> Signed-off-by: Icenowy Zheng
On Fri, May 19, 2017 at 4:55 PM, Andre Przywara wrote:
> Hi,
>
> On 19/05/17 09:29, Icenowy Zheng wrote:
>>
>>
>> 于 2017年5月19日 GMT+08:00 下午4:27:21, Andre Przywara 写到:
>>> Hi,
>>>
>>> On 18/05/17 08:16, Icenowy Zheng wrote:
Add support of
On Fri, Jul 14, 2017 at 02:42:58PM +0800, Chen-Yu Tsai wrote:
> The third MMC controller (MMC2) on the Allwinner A83T SoC is slightly
> different. It supports a wider 8-bit bus, has a dedicated controllable
> reset pin for eMMC, and a "new timing mode" which is supposed to deliver
> better signals
Hi
I'm using lichee linux on a23 , i have mali module and libs correctly
installed and apps are using mali libs not mesa
when i run es2gears it shows high cpu load and 100FPS but according to
linux-sunxi wiki I should get around 200 FPS
I tried r3p2 and r4p0 both with the same results what could
Hi Chen-Yu,
[auto build test ERROR on linus/master]
[also build test ERROR on v4.13-rc1]
[cannot apply to robh/for-next clk/clk-next]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
On Thu, 22 Jun 2017, Chen-Yu Tsai wrote:
> The X-Powers AXP813 is a PMIC designed to be paired with Allwinner's
> A83T SoC. There is also an AXP818, which is paired with the H8 SoC.
>
> The two models seem to be identical, apart from the external markings.
>
> This patch introduces the basic
On Thu, 22 Jun 2017, Chen-Yu Tsai wrote:
> The binding already lists compatibles and regulators for the AXP806,
> but it is missing from the list of supported chips at the beginning.
>
> Add it.
>
> Fixes: 204ae2963e10 ("mfd: axp20x: Add bindings for AXP806 PMIC")
> Signed-off-by: Chen-Yu Tsai
On Thu, 22 Jun 2017, Chen-Yu Tsai wrote:
> The X-Powers AXP813 PMIC is normally used with Allwinner's A83T SoC.
> It has the same range of functions as other X-Powers PMICs, such as
> DC-DC buck converter and linear regulator outputs, AC-IN and VBUS
> power supplies, power button trigger, GPIOs,
+stable
On 14 July 2017 at 08:42, Chen-Yu Tsai wrote:
> The register for the "new timing mode" also has bit fields for setting
> output and sample timing phases. According to comments in Allwinner's
> BSP kernel, the default values are good enough.
>
> Keep the default values
On Mon, Jul 17, 2017 at 5:14 PM, Maxime Ripard
wrote:
> Hi,
>
> On Fri, Jul 14, 2017 at 02:42:54PM +0800, Chen-Yu Tsai wrote:
>> The MMC2 clock supports a new timing mode. When the new mode is active,
>> the output clock rate is halved.
>>
>> This patch sets the
Hi,
On Fri, Jul 14, 2017 at 02:42:59PM +0800, Chen-Yu Tsai wrote:
> The A83T has 3 MMC controllers. The third one is a bit special, as it
> supports a wider 8-bit bus, and a "new timing mode".
>
> Signed-off-by: Chen-Yu Tsai
> ---
> arch/arm/boot/dts/sun8i-a83t.dtsi | 57
>
On Fri, Jul 14, 2017 at 11:57:35AM +0200, Ulf Hansson wrote:
> >>> + if (host->use_new_timings) {
> >>> + ret = sunxi_ccu_set_mmc_timing_mode(host->clk_mmc, true);
> >>
> >> Can't this be solved through some other generic API/interface?
> >
> > The old discussion is here:
Hi,
On Fri, Jul 14, 2017 at 02:42:56PM +0800, Chen-Yu Tsai wrote:
> On the SoCs that introduced the new timing mode for MMC controllers,
> both the old (where the clock delays are set in the CCU) and new
> (where the clock delays are set in the MMC controller) timing modes
> are available, and we
On Fri, Jul 14, 2017 at 02:42:55PM +0800, Chen-Yu Tsai wrote:
> The register for the "new timing mode" also has bit fields for setting
> output and sample timing phases. According to comments in Allwinner's
> BSP kernel, the default values are good enough.
>
> Keep the default values already in
Hi,
On Fri, Jul 14, 2017 at 02:42:54PM +0800, Chen-Yu Tsai wrote:
> The MMC2 clock supports a new timing mode. When the new mode is active,
> the output clock rate is halved.
>
> This patch sets the feature flag for the new timing mode, and adds
> a pre-divider based on the mode bit.
>
>
Hi,
On Fri, Jul 14, 2017 at 02:42:53PM +0800, Chen-Yu Tsai wrote:
> Starting with the A83T SoC, Allwinner introduced a new timing mode for
> its MMC clocks. The new mode changes how the MMC controller sample and
> output clocks are delayed to match chip and board specifics. There are
> two
On Fri, Jul 14, 2017 at 02:42:52PM +0800, Chen-Yu Tsai wrote:
> Now that the CCU device tree binding headers have been merged, we can
> use the properly named macros in the device tree, instead of raw
> numbers.
>
> Signed-off-by: Chen-Yu Tsai
> ---
>
> This patch is included as
Hi,
On Fri, Jul 14, 2017 at 05:49:24PM +0300, Priit Laes wrote:
> Introduce a clock controller driver for sun4i A10 and sun7i A20
> series SoCs.
>
> Signed-off-by: Priit Laes
> ---
> drivers/clk/sunxi-ng/Kconfig | 13 +-
> drivers/clk/sunxi-ng/Makefile
On Fri, Jul 14, 2017 at 05:49:23PM +0300, Priit Laes wrote:
> SATA clock on sun4i/sun7i is of type (parent) / M / 6 where
> 6 is fixed post-divider.
>
> Signed-off-by: Priit Laes
> ---
> drivers/clk/sunxi-ng/ccu_div.c | 15 +--
> drivers/clk/sunxi-ng/ccu_div.h | 3
On Wed, Jul 12, 2017 at 10:40:16AM +0800, Chen-Yu Tsai wrote:
> On Wed, Jul 12, 2017 at 3:21 AM, Maxime Ripard
> wrote:
> > On Mon, Jul 10, 2017 at 04:55:04PM +1000, Jonathan Liu wrote:
> >> The drm_driver lastclose callback is called when the last userspace
> >>
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