From: Jagan Teki
X-Powers AXP series PMICs with RSB is need for sunxi a64
so make it default in defconfig.
Signed-off-by: Jagan Teki
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Jagan Teki
Sunxi arm64 doesn't have separate configs for
h5 and a64 so enable SUNXI_RSB bus for ARM64.
Signed-off-by: Jagan Teki
---
drivers/bus/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
From: Jagan Teki
X-POWERS AXP20X PMIC Regulators is need for sunxi a64
so make it default in defconfig.
Signed-off-by: Jagan Teki
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Jagan Teki
Since current tree support AXP803 regulators, replace
fixed regulator with AXP803 dcdc1 regulator.
Tested on pine64.
Signed-off-by: Jagan Teki
---
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 9 +
1
From: Jagan Teki
NanoPi A64 is a new board of high performance with low cost
designed by FriendlyElec., using the Allwinner A64 SOC.
Nanopi A64 features
- Allwinner A64, 64-bit Quad-core Cortex-A53@648MHz to 1.152GHz, DVFS
- 1GB DDR3 RAM
- MicroSD
- Gigabit Ethernet
在 2017-08-12 12:13,Chen-Yu Tsai 写道:
On Sat, Aug 12, 2017 at 11:07 AM, wrote:
在 2017-07-17 16:52,Maxime Ripard 写道:
On Fri, Jul 14, 2017 at 05:49:23PM +0300, Priit Laes wrote:
SATA clock on sun4i/sun7i is of type (parent) / M / 6 where
6 is fixed post-divider.
On Sat, Aug 12, 2017 at 11:07 AM, wrote:
> 在 2017-07-17 16:52,Maxime Ripard 写道:
>>
>> On Fri, Jul 14, 2017 at 05:49:23PM +0300, Priit Laes wrote:
>>>
>>> SATA clock on sun4i/sun7i is of type (parent) / M / 6 where
>>> 6 is fixed post-divider.
>>>
>>> Signed-off-by: Priit Laes
在 2017-07-17 16:52,Maxime Ripard 写道:
On Fri, Jul 14, 2017 at 05:49:23PM +0300, Priit Laes wrote:
SATA clock on sun4i/sun7i is of type (parent) / M / 6 where
6 is fixed post-divider.
Signed-off-by: Priit Laes
---
drivers/clk/sunxi-ng/ccu_div.c | 15 +--
在 2017-08-12 01:42,Jagan Teki 写道:
On Fri, Aug 11, 2017 at 6:01 PM, Jagan Teki
wrote:
From: Jagan Teki
NanoPi A64 is a new board of high performance with low cost
designed by FriendlyElec., using the Allwinner A64 SOC.
Nanopi A64 features
On Fri, Aug 11, 2017 at 6:01 PM, Jagan Teki wrote:
> From: Jagan Teki
>
> NanoPi A64 is a new board of high performance with low cost
> designed by FriendlyElec., using the Allwinner A64 SOC.
>
> Nanopi A64 features
> - Allwinner A64, 64-bit
On Fri, Aug 11, 2017 at 6:04 PM, Icenowy Zheng wrote:
>
>
> 于 2017年8月11日 GMT+08:00 下午8:31:43, Jagan Teki 写到:
>>From: Jagan Teki
>>
>>NanoPi A64 is a new board of high performance with low cost
>>designed by FriendlyElec.,
The pin controller of H5 has three IRQs at the chip's GIC, which
represents three banks of pinctrl IRQs. However, the device tree used to
miss the third IRQ of the pin controller, which makes the PG bank IRQ
not usable.
Add the missing IRQ to the pinctrl node.
Fixes: 4e36de179f27 ("arm64:
The pin controller of Allwinner H5 has three IRQ banks, however in old
versions of drivers and device trees, only two are set, which makes
PG bank IRQ not available.
If it's directly set to 3, the old device trees will fail to boot.
Add a workaround (and a warning) for older device trees, and
The current pinctrl code and H5 device tree have an error: the bank number
of IRQs are wrongly set to 2, which makes PG bank interrupts not usable.
Fixes in both the pinctrl driver and the device tree.
Please apply the DT fix after applying the pinctrl fix.
Icenowy Zheng (2):
pinctrl: sunxi:
于 2017年8月11日 GMT+08:00 下午8:31:43, Jagan Teki 写到:
>From: Jagan Teki
>
>NanoPi A64 is a new board of high performance with low cost
>designed by FriendlyElec., using the Allwinner A64 SOC.
As AXP803 regulators support now entered linux-next,
From: Jagan Teki
NanoPi A64 is a new board of high performance with low cost
designed by FriendlyElec., using the Allwinner A64 SOC.
Nanopi A64 features
- Allwinner A64, 64-bit Quad-core Cortex-A53@648MHz to 1.152GHz, DVFS
- 1GB DDR3 RAM
- MicroSD
- Gigabit Ethernet
Hello,
> * Renamed sunxi_[eg]mac to sun[47]_mac to be more clear and allowing preparing
> to merge common parts into sunxi_common
Wouldn't those better renamed to sun[47]i_mac instead, for consistency ?
--
Vincent Legoll
--
You received this message because you are subscribed to the Google
On Mon, May 15, 2017 at 6:17 PM, Tom Rini wrote:
> On Mon, May 15, 2017 at 10:09:02AM +0200, Olliver Schinagl wrote:
>> Hey all,
>>
>> On 15-05-17 10:02, Olliver Schinagl wrote:
>> >This patch-series introduces methods to retrieve the MAC address from an
>> >onboard EEPROM.
On Wed, Jan 4, 2017 at 9:20 PM, Jagan Teki wrote:
> On Mon, Jan 2, 2017 at 12:48 PM, Andre Przywara
> wrote:
>> Hi,
>>
>> hopefully the final version of the SPL support series for the Allwinner A64
>> SoC. Actually no real code changes this time, just
On Fri, Aug 11, 2017 at 3:30 PM, Jagan Teki wrote:
> On Tue, Jul 4, 2017 at 4:13 PM, Icenowy Zheng wrote:
>> The Ethernet function is enabled in the Orange Pi PC2 device tree and
>> defconfig, however, CONFIG_MACPWR is not properly set, which left the
20 matches
Mail list logo