On Wed, Mar 27, 2019 at 03:33:36AM +0100, meg...@megous.com wrote:
> From: Ziping Chen
>
> Allwinner A83T SoC has a low res adc like the one in Allwinner A10 SoC,
> however, the A10 SoC's vref of lradc internally is divided by 2/3 and
> the A83T SoC's vref of lradc internally is divided by 3/4,
On Tue, Apr 02, 2019 at 08:09:01AM +0200, Maxime Ripard wrote:
> On Mon, Apr 01, 2019 at 05:03:31PM -0500, Samuel Holland wrote:
> > When enabling ARCH_SUNXI from allnoconfig, SUNXI_SRAM is enabled, but
> > not REGMAP_MMIO, so the kernel fails to link with an undefined reference
> > to
On Thu, Apr 4, 2019 at 8:54 PM Tomasz Figa wrote:
>
> Hi,
>
> On Thu, Apr 4, 2019 at 9:26 PM Maxime Ripard
> wrote:
> >
> > From: Pawel Osciak
> >
> > Stateless video codecs will require both the H264 metadata and slices in
> > order to be able to decode frames.
> >
> > This introduces the
Hi,
On Thu, Apr 4, 2019 at 9:26 PM Maxime Ripard wrote:
>
> From: Pawel Osciak
>
> Stateless video codecs will require both the H264 metadata and slices in
> order to be able to decode frames.
>
> This introduces the definitions for a new pixel format for H264 slices that
> have been parsed, as
Hi,
Here is a new version of the H264 decoding support in the cedrus
driver.
As you might already know, the cedrus driver relies on the Request
API, and is a reverse engineered driver for the video decoding engine
found on the Allwinner SoCs.
This work has been possible thanks to the work done
Introduce some basic H264 decoding support in cedrus. So far, only the
baseline profile videos have been tested, and some more advanced features
used in higher profiles are not even implemented.
Reviewed-by: Jernej Skrabec
Signed-off-by: Maxime Ripard
---
From: Pawel Osciak
Stateless video codecs will require both the H264 metadata and slices in
order to be able to decode frames.
This introduces the definitions for a new pixel format for H264 slices that
have been parsed, as well as the structures used to pass the metadata from
the userspace to
Hello Maxime,
On Mon, Apr 01, 2019 at 01:56:16PM +0200, megous via linux-sunxi wrote:
> From: Ondrej Jirman
>
> TBS A711 tablet contains u-blox NEO-6M module connected to UART2.
> Enable UART2 to gain access to the module from userspace.
Other GPS bits are now applied (thank you, Johan), so if
From: Pawel Osciak
Stateless video codecs will require both the H264 metadata and slices in
order to be able to decode frames.
This introduces the definitions for a new pixel format for H264 slices that
have been parsed, as well as the structures used to pass the metadata from
the userspace to
Hi,
Here is a new version of the H264 decoding support in the cedrus
driver.
As you might already know, the cedrus driver relies on the Request
API, and is a reverse engineered driver for the video decoding engine
found on the Allwinner SoCs.
This work has been possible thanks to the work done
Introduce some basic H264 decoding support in cedrus. So far, only the
baseline profile videos have been tested, and some more advanced features
used in higher profiles are not even implemented.
Reviewed-by: Jernej Skrabec
Signed-off-by: Maxime Ripard
---
Introduce some basic H264 decoding support in cedrus. So far, only the
baseline profile videos have been tested, and some more advanced features
used in higher profiles are not even implemented.
Reviewed-by: Jernej Skrabec
Signed-off-by: Maxime Ripard
---
From: Pawel Osciak
Stateless video codecs will require both the H264 metadata and slices in
order to be able to decode frames.
This introduces the definitions for a new pixel format for H264 slices that
have been parsed, as well as the structures used to pass the metadata from
the userspace to
Hi,
Here is a new version of the H264 decoding support in the cedrus
driver.
As you might already know, the cedrus driver relies on the Request
API, and is a reverse engineered driver for the video decoding engine
found on the Allwinner SoCs.
This work has been possible thanks to the work done
On Wed, Apr 3, 2019 at 1:23 PM Paul Kocialkowski
wrote:
>
> Hi,
>
> Le mercredi 03 avril 2019 à 13:09 +0530, Jagan Teki a écrit :
> > On Thu, Mar 14, 2019 at 4:07 PM Paul Kocialkowski
> > wrote:
> > > Most of the boards we support with H3/H5 enable DRAM on-die termination,
> > > which is
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