problems with external
oscillator.
In order to fix RTC and related issues (HDMI-CEC and suspend/resume with
Crust) on all boards, switch to internal oscillator.
Fixes: 32507b868119 ("arm64: dts: allwinner: h6: Move ext. oscillator to board
DTs")
Signed-off-by: Jernej Skrabec
---
arch/arm6
Beelink X2 has power button. Add node for it.
Signed-off-by: Jernej Skrabec
---
Changes from v1:
- renamed node name so it doesn't contain underscores
arch/arm/boot/dts/sun8i-h3-beelink-x2.dts | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-beelink
alignment using spaces and fix comment.
Reviewed-by: Andre Przywara
Signed-off-by: Jernej Skrabec
---
Changes from v1:
- added r-b tag
- fixed comment
include/configs/sunxi-common.h | 49 ++
1 file changed, 26 insertions(+), 23 deletions(-)
diff --git a/inclu
Beelink X2 has power button. Add node for it.
Signed-off-by: Jernej Skrabec
---
arch/arm/boot/dts/sun8i-h3-beelink-x2.dts | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
b/arch/arm/boot/dts/sun8i-h3-beelink-x2.dts
index 62b5280ec093
Remove direct PHY managing from dw-hdmi platform driver and use
dedicated driver instead. While at it, enable clocks and deassert reset
lines through clk and reset framework instead of manually configuring
bits.
Signed-off-by: Jernej Skrabec
---
drivers/video/sunxi/sunxi_dw_hdmi.c | 225
This commit adds standalone driver for DW HDMI PHY. It deprecates code
which is included in sunxi dw-hdmi platform driver.
Signed-off-by: Jernej Skrabec
---
arch/arm/mach-sunxi/Kconfig | 1 +
drivers/video/sunxi/Makefile| 2 +-
drivers/video/sunxi/sunxi_dw_hdmi_phy.c
-off-by: Jernej Skrabec
---
drivers/video/sunxi/sunxi_de2.c | 88 +++--
1 file changed, 52 insertions(+), 36 deletions(-)
diff --git a/drivers/video/sunxi/sunxi_de2.c b/drivers/video/sunxi/sunxi_de2.c
index e02d359cd259..81576e45e9ef 100644
--- a/drivers/video/sunxi
Currently DE2 uses hardcoded address based on SoC for which U-Boot is
built. Read it from DT instead so there is no need to specify it when
support for new SoC is added.
Signed-off-by: Jernej Skrabec
---
drivers/video/sunxi/sunxi_de2.c | 8
1 file changed, 4 insertions(+), 4 deletions
Now that proper DM clock and reset driver exists for Display Engine 2
and 3, remove all clock and reset related code and use appropriate
framework instead.
Signed-off-by: Jernej Skrabec
---
arch/arm/mach-sunxi/Kconfig | 1 +
drivers/video/sunxi/sunxi_de2.c | 67
Currently PHY init callback has only pixel clock as a parameter, but
other timing parameters may be needed for custom PHYs. Modify callback
signature to include full timings.
Cc: Neil Armstrong
Signed-off-by: Jernej Skrabec
---
drivers/video/dw_hdmi.c | 6 +++---
drivers/video
Currently HDMI controller MMIO address is hardcoded. Change that so
address is read from DT node. That will make adding support for new
variants a bit easier.
Signed-off-by: Jernej Skrabec
---
drivers/video/sunxi/sunxi_dw_hdmi.c | 38 ++---
1 file changed, 24 insertions
. It still sets PLL and parent
by hand. Sunxi clock framework still doesn't know how to set parents or
rates. However, this is already big step in right direction.
Cc: Lukasz Majewski
Signed-off-by: Jernej Skrabec
---
drivers/clk/sunxi/Kconfig | 5 +++
drivers/clk/sunxi/Makefile | 1
These clocks and resets are needed for video drivers.
Cc: Lukasz Majewski
Signed-off-by: Jernej Skrabec
---
drivers/clk/sunxi/clk_a64.c | 12
drivers/clk/sunxi/clk_h3.c | 12
2 files changed, 24 insertions(+)
diff --git a/drivers/clk/sunxi/clk_a64.c b/drivers/clk
Currently sunxi dw-hdmi driver is probed unconditionally, even if there
is no such device.
Switch driver to probing via compatible string. This brings many
benefits - driver can read DT node and allows driver to be always
enabled.
Signed-off-by: Jernej Skrabec
---
drivers/video/sunxi
Currently DE2 driver uses functions which are defined in internal
headers. They are not meant to be used outside of uclass framework.
Switch DE2 driver to public ones. This has additional benefit that
device_probe doesn't need to be called manually.
Signed-off-by: Jernej Skrabec
---
drivers
TV driver was never fully implemented. Remove search for it from DE2
driver.
Signed-off-by: Jernej Skrabec
---
drivers/video/sunxi/sunxi_de2.c | 15 +--
1 file changed, 1 insertion(+), 14 deletions(-)
diff --git a/drivers/video/sunxi/sunxi_de2.c b/drivers/video/sunxi/sunxi_de2.c
No Allwinner board with DW-HDMI controller use separate I2C bus for
EDID read. Remove that check.
Reviewed-by: Andre Przywara
Signed-off-by: Jernej Skrabec
---
drivers/video/sunxi/sunxi_dw_hdmi.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/video/sunxi/sunxi_dw_hdmi.c
b
.
Use standard method in order to reduce amount of custom code.
Signed-off-by: Jernej Skrabec
---
drivers/video/sunxi/sunxi_dw_hdmi.c | 34 +
1 file changed, 6 insertions(+), 28 deletions(-)
diff --git a/drivers/video/sunxi/sunxi_dw_hdmi.c
b/drivers/video/sunxi
block.
Signed-off-by: Jernej Skrabec
---
common/edid.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/common/edid.c b/common/edid.c
index a6c875d9c8e8..14d8836c360e 100644
--- a/common/edid.c
+++ b/common/edid.c
@@ -220,6 +220,24 @@ int edid_get_timing_validate(u8 *buf
, it is more
fitting to cast to edid_detailed_timing.
Signed-off-by: Jernej Skrabec
---
common/edid.c | 49 -
1 file changed, 28 insertions(+), 21 deletions(-)
diff --git a/common/edid.c b/common/edid.c
index 1cb7177742e8..a6c875d9c8e8 100644
--- a/common
When searching for detailed timing in EDID, check for digital display
earlier. There is no point parsing other parameters if this flag is not
present.
Reviewed-by: Andre Przywara
Signed-off-by: Jernej Skrabec
---
common/edid.c | 9 +
1 file changed, 5 insertions(+), 4 deletions
Currently driver accepts all resolution which won't work on 4k screens.
Add validation callback which limits acceptable resolutions to 297 MHz.
Reviewed-by: Andre Przywara
Signed-off-by: Jernej Skrabec
---
drivers/video/sunxi/sunxi_dw_hdmi.c | 7 +++
1 file changed, 7 insertions(+)
diff
Currently sunxi Makefile manually specifies full path to dw-hdmi common
code. However, that is not needed because it can be selected in Kconfig
instead.
Select proper symbol in Kconfig and drop path from Makefile.
Reviewed-by: Andre Przywara
Signed-off-by: Jernej Skrabec
---
arch/arm/mach
,
Jernej
Changes from v1:
- collected tags
- reword some commit messages
- dropped patch 13 and 14 from v1
- 2 new patches, first add HDMI PHY driver and another drops PHY
code from sunxi dw-hdmi driver and uses separate driver instead
Jernej Skrabec (19):
sunxi: video: select dw-hdmi
Now that proper DM clock and reset driver exists for Display Engine 2
and 3, remove all clock and reset related code and use appropriate
framework instead.
Signed-off-by: Jernej Skrabec
---
arch/arm/mach-sunxi/Kconfig | 1 +
drivers/video/sunxi/sunxi_de2.c | 67
. It still sets PLL and parent
by hand. Sunxi clock framework still doesn't know how to set parents or
rates. However, this is already big step in right direction.
Cc: Lukasz Majewski
Signed-off-by: Jernej Skrabec
---
drivers/clk/sunxi/Kconfig | 5 +++
drivers/clk/sunxi/Makefile | 1
With the next commit another clock and reset driver will be implemented
which requires DE2 related clocks and resets. Add them.
Cc: Lukasz Majewski
Signed-off-by: Jernej Skrabec
---
drivers/clk/sunxi/clk_a64.c | 6 ++
drivers/clk/sunxi/clk_h3.c | 6 ++
2 files changed, 12 insertions
Currently DE2 uses hardcoded address based on SoC for which U-Boot is
built. Read it from DT instead so there is no need to specify it when
support for new SoC is added.
Signed-off-by: Jernej Skrabec
---
drivers/video/sunxi/sunxi_de2.c | 8
1 file changed, 4 insertions(+), 4 deletions
-off-by: Jernej Skrabec
---
drivers/video/sunxi/sunxi_de2.c | 88 +++--
1 file changed, 52 insertions(+), 36 deletions(-)
diff --git a/drivers/video/sunxi/sunxi_de2.c b/drivers/video/sunxi/sunxi_de2.c
index e02d359cd259..81576e45e9ef 100644
--- a/drivers/video/sunxi
Now that bit meanings are somewhat known, rework PHY initialization.
This is modelled after Linux driver.
Signed-off-by: Jernej Skrabec
---
drivers/video/sunxi/sunxi_dw_hdmi.c | 411 +++-
1 file changed, 279 insertions(+), 132 deletions(-)
diff --git a/drivers/video
-by: Jernej Skrabec
---
drivers/video/sunxi/sunxi_dw_hdmi.c | 24 +---
1 file changed, 13 insertions(+), 11 deletions(-)
diff --git a/drivers/video/sunxi/sunxi_dw_hdmi.c
b/drivers/video/sunxi/sunxi_dw_hdmi.c
index 483d57293155..4cc175d714ea 100644
--- a/drivers/video/sunxi
Currently PHY init callback has only pixel clock as a parameter, but
other timing parameters may be needed for custom PHYs. Modify callback
signature to include full timings.
Cc: Neil Armstrong
Signed-off-by: Jernej Skrabec
---
drivers/video/dw_hdmi.c | 6 +++---
drivers/video
Currently HDMI controller MMIO address is hardcoded. Change that so
address is read from DT node. That will make adding support for new
variants a bit easier.
Signed-off-by: Jernej Skrabec
---
drivers/video/sunxi/sunxi_dw_hdmi.c | 38 ++---
1 file changed, 24 insertions
Currently sunxi dw-hdmi driver is probed unconditionally, even if there
is no such device.
Switch driver to probing via compatible string. This brings many
benefits - driver can read DT node and allows driver to be always
enabled.
Signed-off-by: Jernej Skrabec
---
drivers/video/sunxi
Currently DE2 driver uses functions which are defined in -internal
header. They are not meant to be used outside of uclass framework.
Switch DE2 driver to public ones. This has additional benefit that
device_probe doesn't need to be called manually.
Signed-off-by: Jernej Skrabec
---
drivers
TV driver was never fully implemented. Remove search for it from DE2
driver.
Signed-off-by: Jernej Skrabec
---
drivers/video/sunxi/sunxi_de2.c | 15 +--
1 file changed, 1 insertion(+), 14 deletions(-)
diff --git a/drivers/video/sunxi/sunxi_de2.c b/drivers/video/sunxi/sunxi_de2.c
No Allwinner boards with DW-HDMI controller use separate I2C bus for
EDID read. Remove that check.
Signed-off-by: Jernej Skrabec
---
drivers/video/sunxi/sunxi_dw_hdmi.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/video/sunxi/sunxi_dw_hdmi.c
b/drivers/video/sunxi
It turns out that even though A64, H3 and H5 have custom PHY, standard
hot plug detection for DW-HDMI works just fine.
Remove custom hpd method to reduce amount of custom code.
Signed-off-by: Jernej Skrabec
---
drivers/video/sunxi/sunxi_dw_hdmi.c | 34 +
1 file
block.
Signed-off-by: Jernej Skrabec
---
common/edid.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/common/edid.c b/common/edid.c
index a6c875d9c8e8..14d8836c360e 100644
--- a/common/edid.c
+++ b/common/edid.c
@@ -220,6 +220,24 @@ int edid_get_timing_validate(u8 *buf
Code which searches for valid detailed timing entry will be used in more
places. Extract it.
Signed-off-by: Jernej Skrabec
---
common/edid.c | 49 -
1 file changed, 28 insertions(+), 21 deletions(-)
diff --git a/common/edid.c b/common/edid.c
When searching for detailed timing in EDID, check for digital display
earlier. There is no point parsing other parameters if this flag is not
present.
Signed-off-by: Jernej Skrabec
---
common/edid.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/common/edid.c b
Currently driver accepts all resolution which won't work on 4k screens.
Add validation callback which limits acceptable resolutions to 297 MHz.
Signed-off-by: Jernej Skrabec
---
drivers/video/sunxi/sunxi_dw_hdmi.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/video/sunxi
Currently sunxi Makefile manually specifies full path to dw-hdmi common
code. However, that is not needed because it can be selected in Kconfig
instead.
Select proper symbol in Kconfig and drop path from Makefile.
Signed-off-by: Jernej Skrabec
---
arch/arm/mach-sunxi/Kconfig | 1 +
drivers
regards,
Jernej
Jernej Skrabec (19):
sunxi: video: select dw-hdmi in Kconfig, not Makefile
video: sunxi: Add mode_valid callback to sunxi_dw_hdmi
common: edid: check for digital display earlier
common: edid: extract code for detailed timing search
common: edid: Search for valid timing
alignment using spaces.
Signed-off-by: Jernej Skrabec
---
include/configs/sunxi-common.h | 48 ++
1 file changed, 26 insertions(+), 22 deletions(-)
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index ded5aea551d3..4814e898c
in HW and fix the comment.
Fixes: cd9063757a22 ("drm/sun4i: DW HDMI: Lower max. supported rate for H6")
Reviewed-by: Chen-Yu Tsai
Tested-by: Andre Heider
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 6 ++
1 file changed, 2 insertions(+), 4 deletion
dependant. See i.MX6
documentation for explanation of those values for similar PHY.
Fixes: c71c9b2fee17 ("drm/sun4i: Add support for Synopsys HDMI PHY")
Tested-by: Andre Heider
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c | 26 +-
1 file
("drm/sun4i: Add support for H6 DW HDMI controller")
Reviewed-by: Chen-Yu Tsai
Tested-by: Andre Heider
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 4 +---
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h | 1 -
2 files changed, 1 insertion(+), 4 deletions(-)
diff --git
splay Engine support")
Reviewed-by: Chen-Yu Tsai
Tested-by: Andre Heider
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun4i_tcon.c | 25 +
drivers/gpu/drm/sun4i/sun4i_tcon.h | 6 ++
2 files changed, 31 insertions(+)
diff --git a/drivers/gpu/drm/sun4i/su
CLK_SET_RATE_PARENT flag is checked on parent clock instead of current
one. Fix that.
Fixes: 3f790433c3cb ("clk: sunxi-ng: Adjust MP clock parent rate when allowed")
Reviewed-by: Chen-Yu Tsai
Tested-by: Andre Heider
Signed-off-by: Jernej Skrabec
---
drivers/clk/sunxi-ng/ccu_mp.c
on replaced patch 4)
- Added some comments in patch 2
- Replaced patch 4 (see commit log for explanation)
Jernej Skrabec (5):
clk: sunxi-ng: mp: fix parent rate change flag check
drm/sun4i: tcon: set sync polarity for tcon1 channel
drm/sun4i: dw-hdmi: always set clock rate
drm/sun4i: Fix H6 HDMI
in HW and fix the comment.
Fixes: cd9063757a22 ("drm/sun4i: DW HDMI: Lower max. supported rate for H6")
Reviewed-by: Chen-Yu Tsai
Tested-by: Andre Heider
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 6 ++
1 file changed, 2 insertions(+), 4 deletion
dependant. See i.MX6
documentation for explanation of those values for similar PHY.
Fixes: c71c9b2fee17 ("drm/sun4i: Add support for Synopsys HDMI PHY")
Tested-by: Andre Heider
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c | 26 +-
1 file
("drm/sun4i: Add support for H6 DW HDMI controller")
Reviewed-by: Chen-Yu Tsai
Tested-by: Andre Heider
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 4 +---
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h | 1 -
2 files changed, 1 insertion(+), 4 deletions(-)
diff --git
splay Engine support")
Reviewed-by: Chen-Yu Tsai
Tested-by: Andre Heider
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun4i_tcon.c | 25 +
drivers/gpu/drm/sun4i/sun4i_tcon.h | 6 ++
2 files changed, 31 insertions(+)
diff --git a/drivers/gpu/drm/sun4i/su
CLK_SET_RATE_PARENT flag is checked on parent clock instead of current
one. Fix that.
Fixes: 3f790433c3cb ("clk: sunxi-ng: Adjust MP clock parent rate when allowed")
Reviewed-by: Chen-Yu Tsai
Tested-by: Andre Heider
Signed-off-by: Jernej Skrabec
---
drivers/clk/sunxi-ng/ccu_mp.c
for explanation)
Jernej Skrabec (5):
clk: sunxi-ng: mp: fix parent rate change flag check
drm/sun4i: tcon: set sync polarity for tcon1 channel
drm/sun4i: dw-hdmi: always set clock rate
drm/sun4i: Fix H6 HDMI PHY configuration
drm/sun4i: dw-hdmi: Fix max. frequency for H6
drivers/clk/sunxi-ng
in HW and fix the comment.
Fixes: cd9063757a22 ("drm/sun4i: DW HDMI: Lower max. supported rate for H6")
Tested-by: Andre Heider
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu
cpce value for 594 MHz is set differently in BSP driver. Fix that.
Fixes: c71c9b2fee17 ("drm/sun4i: Add support for Synopsys HDMI PHY")
Tested-by: Andre Heider
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_hdmi_phy.c | 2 +-
1 file changed, 1 insertion(+), 1 deletio
("drm/sun4i: Add support for H6 DW HDMI controller")
Tested-by: Andre Heider
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.c | 4 +---
drivers/gpu/drm/sun4i/sun8i_dw_hdmi.h | 1 -
2 files changed, 1 insertion(+), 4 deletions(-)
diff --git a/drivers/gpu
splay Engine support")
Tested-by: Andre Heider
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun4i_tcon.c | 24
drivers/gpu/drm/sun4i/sun4i_tcon.h | 5 +
2 files changed, 29 insertions(+)
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c
b/drivers/gpu
CLK_SET_RATE_PARENT flag is checked on parent clock instead of current
one. Fix that.
Fixes: 3f790433c3cb ("clk: sunxi-ng: Adjust MP clock parent rate when allowed")
Tested-by: Andre Heider
Signed-off-by: Jernej Skrabec
---
drivers/clk/sunxi-ng/ccu_mp.c | 2 +-
1 file changed, 1
controller. Patch 4 fixes cpce PHY setting for 594 MHz. Patch 5 fixes
comment and clock rate limit (wrong reasoning).
Please take a look.
Best regards,
Jernej
Jernej Skrabec (5):
clk: sunxi-ng: mp: fix parent rate change flag check
drm/sun4i: tcon: set sync polarity for tcon1 channel
drm
H616 clocks")
Signed-off-by: Jernej Skrabec
---
Changes from v1:
- use if (IS_ENABLED()) instead of #ifdef #endif
arch/arm/mach-sunxi/clock_sun50i_h6.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/mach-sunxi/clock_sun50i_h6.c
b/arch/arm/mach-sunxi/clock_sun50i_
H616 clocks")
Signed-off-by: Jernej Skrabec
---
arch/arm/mach-sunxi/clock_sun50i_h6.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/mach-sunxi/clock_sun50i_h6.c
b/arch/arm/mach-sunxi/clock_sun50i_h6.c
index 06d84eb158d7..68c8e7f2afbe 100644
--- a/arch/arm/
Bluetooth module on BananaPi M2 Plus can also be used for streaming
audio. However, for that case higher UART speed is required.
Add a max-speed property.
Signed-off-by: Jernej Skrabec
---
arch/arm/boot/dts/sunxi-bananapi-m2-plus.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch
Bluetooth module on BananaPi M2 Zero can also be used for streaming
audio. However, for that case higher UART speed is required.
Add a max-speed property.
Signed-off-by: Jernej Skrabec
---
arch/arm/boot/dts/sun8i-h2-plus-bananapi-m2-zero.dts | 1 +
1 file changed, 1 insertion(+)
diff --git
and it's not yet merged.
Signed-off-by: Jernej Skrabec
---
arch/arm/dts/Makefile | 2 +
arch/arm/dts/sun50i-h616-orangepi-zero2.dts | 240
board/sunxi/MAINTAINERS | 5 +
configs/orangepi_zero2_defconfig| 15 ++
4 files
This commit introduces DM H616 clock driver.
Reviewed-by: Andre Przywara
Signed-off-by: Jernej Skrabec
---
drivers/clk/sunxi/Kconfig| 7 ++
drivers/clk/sunxi/Makefile | 1 +
drivers/clk/sunxi/clk_h616.c | 120 +++
3 files changed, 128 insertions
H616 pinctrl is no different configuration wise than others, so just add
compatible for it.
Reviewed-by: Andre Przywara
Signed-off-by: Jernej Skrabec
---
drivers/gpio/sunxi_gpio.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpio/sunxi_gpio.c b/drivers/gpio/sunxi_gpio.c
index
-off-by: Jernej Skrabec
---
arch/arm/dts/sun50i-h616.dtsi | 716
include/dt-bindings/clock/sun50i-h616-ccu.h | 115
include/dt-bindings/reset/sun50i-h616-ccu.h | 70 ++
3 files changed, 901 insertions(+)
create mode 100644 arch/arm/dts/sun50i-h616.dtsi
From: Andre Przywara
---
drivers/net/sun8i_emac.c | 28
1 file changed, 20 insertions(+), 8 deletions(-)
diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c
index e0bf19e34c17..4867a8425404 100644
--- a/drivers/net/sun8i_emac.c
+++
H616 uses different address for reset. Add it.
Signed-off-by: Jernej Skrabec
---
arch/arm/cpu/armv8/fel_utils.S | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv8/fel_utils.S b/arch/arm/cpu/armv8/fel_utils.S
index 9510dcd9e4c1..2dbd4b365221 100644
H616 mmc clock is on same address as H6.
Signed-off-by: Jernej Skrabec
---
drivers/mmc/sunxi_mmc.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/sunxi_mmc.c b/drivers/mmc/sunxi_mmc.c
index d632b2332ca3..8458d154afd8 100644
--- a/drivers/mmc/sunxi_mmc.c
+++ b
H616 is very similar to H6 so most of the infrastructure can be reused.
However, two big differences are that it doesn't have functional SRAM A2
which is usually used for TF-A and it doesn't have ARISC co-processor.
It also needs bigger SPL size - 48 KiB.
Signed-off-by: Jernej Skrabec
---
arch
From: Andre Przywara
At the moment we only consider the EPHY register for those SoCs were
we actually have an internal PHY to configure. However even other SoCs
have this register, an expect a bit to be cleared for proper operation
with an external PHY.
Rework sun8i_emac_set_syscon_ephy() to be
Allwinner H616 supports many types of DRAM. Most notably it supports
LPDDR4. However, all commercially available boards at this time use
only DDR3, so this commit adds only DDR3 support.
Controller and MBUS are very similar to H6 but PHY is completely
unknown.
Signed-off-by: Jernej Skrabec
From: Andre Przywara
So far the only difference between the various Allwinner MMC controller
we are concerned about is the mod clock register offset.
This is actually not directly related to the MMC controller IP, but an
integration choice, dependent on the SoC this appears in.
To avoid
This port is needed for communication with PMIC. SPL uses it to set DRAM
voltage on H616 boards.
Reviewed-by: Samuel Holland
Signed-off-by: Jernej Skrabec
---
arch/arm/include/asm/arch-sunxi/gpio.h | 1 +
board/sunxi/board.c| 4
2 files changed, 5 insertions(+)
diff
This port is used for debug terminal on all known H616 boards.
Reviewed-by: Samuel Holland
Signed-off-by: Jernej Skrabec
---
arch/arm/include/asm/arch-sunxi/gpio.h | 1 +
arch/arm/mach-sunxi/board.c| 4
2 files changed, 5 insertions(+)
diff --git a/arch/arm/include/asm/arch
Signed-off-by: Jernej Skrabec
---
drivers/i2c/mvtwsi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/i2c/mvtwsi.c b/drivers/i2c/mvtwsi.c
index 14c594d648ba..36d0d1485277 100644
--- a/drivers/i2c/mvtwsi.c
+++ b/drivers/i2c/mvtwsi.c
@@ -121,7 +121,7 @@ enum
H616 has mostly the same clocks as H6 with some small differences. Just
reuse H6 clocks for H616 and handle differences with macros.
Reviewed-by: Samuel Holland
Signed-off-by: Jernej Skrabec
---
.../include/asm/arch-sunxi/clock_sun50i_h6.h | 18 +-
arch/arm/mach-sunxi
It turns out that several SoCs share same mmc configuration as H6. In
order to lower ifdef clutter replace H6 specific macro with common one.
Reviewed-by: Andre Przywara
Signed-off-by: Jernej Skrabec
---
arch/arm/include/asm/arch-sunxi/mmc.h | 2 +-
drivers/mmc/sunxi_mmc.c | 12
. If size in header is bigger, it will use
that value instead.
In the process of function rework, also add missing function argument.
Signed-off-by: Andre Przywara
Signed-off-by: Jernej Skrabec
---
arch/arm/mach-sunxi/board.c | 16 ++--
common/spl/Kconfig | 3 ++-
2 files
-off-by: Jernej Skrabec
---
arch/arm/include/asm/arch-sunxi/boot0.h | 2 +-
arch/arm/include/asm/arch-sunxi/clock.h | 2 +-
arch/arm/include/asm/arch-sunxi/cpu.h | 2 +-
arch/arm/include/asm/arch-sunxi/timer.h | 2 +-
arch/arm/mach-sunxi/Kconfig | 19 +--
arch/arm
This PMIC can be found on H616 boards and it's very similar to AXP805
and AXP806.
Reviewed-by: Andre Przywara
Reviewed-by: Jaehoon Chung
Signed-off-by: Jernej Skrabec
---
arch/arm/mach-sunxi/pmic_bus.c | 6 +++
board/sunxi/board.c| 10 ++--
drivers/power/Kconfig | 13
I2C support, especially R_I2C port, will be needed in future. Upcoming
support for H616 will need R_I2C to adjust DRAM voltage.
Reviewed-by: Samuel Holland
Signed-off-by: Jernej Skrabec
---
.../include/asm/arch-sunxi/clock_sun50i_h6.h | 1 +
arch/arm/mach-sunxi/Kconfig | 2
doesn't do any functional change.
Signed-off-by: Jernej Skrabec
---
arch/arm/include/asm/arch-sunxi/prcm.h| 249 +-
arch/arm/include/asm/arch-sunxi/prcm_sun50i.h | 47
arch/arm/include/asm/arch-sunxi/prcm_sun6i.h | 247 +
3 files changed, 304 insertions
mux based on SoC, not EMAC type
Jernej Skrabec (17):
sunxi: Add support for AXP305 PMIC
sunxi: Introduce common symbol for H6 like SoCs
mmc: sunxi: Replace H6 ifdefs with H6 gen macro
i2c: mvtwsi: sunxi: update macro
sunxi: prcm: Add memory map for H6 like SoCs
sunxi: Add support for
PineH64 model B has wifi+bt combo module. Wifi is already supported, so
lets add also bluetooth node.
Signed-off-by: Jernej Skrabec
---
.../dts/allwinner/sun50i-h6-pine-h64-model-b.dts | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6
YUV to RGB matrices are almost identical to YVU to RGB matrices. They
only have second and third column reversed. Do that reversion in code in
order to lower amount of static data and redundancy.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_csc.c | 99
DE3 supports 10-bit formats, so it's only naturally to also support
BT2020 encoding.
Add support for it.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_csc.c | 12 +++-
drivers/gpu/drm/sun4i/sun8i_vi_layer.c | 2 ++
2 files changed, 13 insertions(+), 1 deletion
Rework DE3 CSC macros to take just one coordinate instead of two. This
will make its usage easier in subsequent commit.
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_csc.c | 2 +-
drivers/gpu/drm/sun4i/sun8i_mixer.h | 6 ++
2 files changed, 3 insertions(+), 5 deletions
This short series reworks CSC handling to remove duplicated constants
(patch 1 and 2) and adds BT2020 encoding to DE3 (patch 3).
Please take a look.
Best regards,
Jernej
Jernej Skrabec (3):
drm/sun4i: csc: Rework DE3 CSC macros
drm/sun4i: de2/de3: Remove redundant CSC matrices
drm/sun4i
, rebase and config update]
Signed-off-by: Jernej Skrabec
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/sun50i-h6-orangepi-3.dts | 345 ++
board/sunxi/MAINTAINERS | 5 +
configs/orangepi_3_defconfig | 12 +
4 files changed, 363
-by: Jernej Skrabec
---
arch/arm/mach-sunxi/Kconfig | 11 +++
board/sunxi/board.c | 34 ++
2 files changed, 45 insertions(+)
diff --git a/arch/arm/mach-sunxi/Kconfig b/arch/arm/mach-sunxi/Kconfig
index 49ef217f08c0..11e644519271 100644
--- a/arch/arm
From: Andre Heider
Refactor setup_environment() so we can use the created sid for a
Bluetooth address too.
Acked-by: Maxime Ripard
Reviewed-by: Andre Przywara
Signed-off-by: Andre Heider
[rebased]
Signed-off-by: Jernej Skrabec
---
board/sunxi/board.c | 121
This series introduces OrangePi 3 support.
Previous cover letter:
This is just refreshed v4 from here:
https://patchwork.ozlabs.org/project/uboot/list/?series=156657=*
Patches are only rebased, DT updated and defconfig regenerated, so
I kept old tags. Only difference with old version is that
ement zpos for DE2")
Fixes: d8b3f454dab4 ("drm/sun4i: sun8i: Avoid clearing blending order at each
atomic commit")
Signed-off-by: Roman Stratiienko
[rebased, addressed comments]
Signed-off-by: Jernej Skrabec
---
drivers/gpu/drm/sun4i/sun8i_mixer.c| 57 +--
Deinterlace core is completely compatible to H3.
Add a node for it.
Signed-off-by: Jernej Skrabec
---
Note: I didn't add H5 fallback, since the only reason why this node
is not in common H3/H5 dtsi is that it's located on different addresses.
If anyone feel fallback compatible is needed, I'll
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