Re: [linux-sunxi] Re: [PATCH 02/12] sunxi: simplify ACTLR.SMP bit set #ifdef

Even for the single core cortex-a7, SMP bit should be set before enabling MMU and cache. Reference: Cortex A7 r0p5 TRM. section 4.3.31. On Fri, Jan 13, 2017 at 12:41 PM, Icenowy Zheng wrote: > > > 13.01.2017, 09:34, "Andre Przywara" : >> Instead of

Re: [linux-sunxi] [PATCH v2 0/3] clk: sunxi-ng: Add the A83T clocks

Hello Jean-Francois Moine, Thanks for followup patches for a83t modern clock. well, this patch series does not apply on sunxi/for-next. Regards, Vishnu Pateakr On Sun, Jun 12, 2016 at 1:39 AM, Jean-Francois Moine wrote: > This patch series adds the clocks of the sunxi A83T

[linux-sunxi] Re: [PATCH v2] clk: sunxi: predivider handling for factors clock

Hello Maxime, On 2 May 2016 19:13, "Maxime Ripard" <maxime.rip...@free-electrons.com> wrote: > > Hi, > > On Wed, Apr 20, 2016 at 12:47:46AM +0800, Vishnu Patekar wrote: > > For A31 ahb1 and a83t ahb1 clocks have predivider for certain parent. > > To handl

[linux-sunxi] Re: [PATCH v2] clk: sunxi: predivider handling for factors clock

Hello Wens, On Mon, Apr 25, 2016 at 10:51 PM, Chen-Yu Tsai <w...@csie.org> wrote: > Hi, > > On Wed, Apr 20, 2016 at 12:47 AM, Vishnu Patekar > <vishnupatekar0...@gmail.com> wrote: >> For A31 ahb1 and a83t ahb1 clocks have predivider for certain parent. >

[linux-sunxi] [PATCH v2] sunxi factors clock predivider handling

in separate patch. v1->v2 Changes: 1. As 'kbuild test robot' reported build failure due to dependency on patches, Combined two patches in v1 into single patch. Vishnu Patekar (1): clk: sunxi: predivider handling for factors clock drivers/clk/sunxi/clk-factors.c |

[linux-sunxi] [PATCH v2] clk: sunxi: predivider handling for factors clock

. Also, adds prediv table for a31. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> --- drivers/clk/sunxi/clk-factors.c | 31 +++ drivers/clk/sunxi/clk-factors.h | 10 +- drivers/clk/sunxi/clk-sunxi.c | 31 +-- 3

[linux-sunxi] Re: [PATCH 1/2] clk: sunxi: add predivider handling for factors clock

Hello Wens, On Tue, Apr 19, 2016 at 10:16 PM, Chen-Yu Tsai <w...@csie.org> wrote: > On Tue, Apr 19, 2016 at 6:22 PM, Philip Li <philip...@intel.com> wrote: >> On Sun, Apr 17, 2016 at 11:53:47AM +0800, Vishnu Patekar wrote: >>> Both of these patches in series has

[linux-sunxi] Re: [PATCH 1/2] clk: sunxi: add predivider handling for factors clock

t-20160415] > [if your patch is applied to the wrong git tree, please drop us a note to > help improving the system] > > url: > https://github.com/0day-ci/linux/commits/Vishnu-Patekar/sunxi-factors-clock-predivider-handling/20160417-025801 > base: https://git.kernel.org/pub

[linux-sunxi] [PATCH 1/2] clk: sunxi: add predivider handling for factors clock

. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> --- drivers/clk/sunxi/clk-factors.c | 31 +++ drivers/clk/sunxi/clk-factors.h | 10 +- 2 files changed, 24 insertions(+), 17 deletions(-) diff --git a/drivers/clk/sunxi/clk-factors.c b/drive

[linux-sunxi] [PATCH 0/2] sunxi factors clock predivider handling

was currently used only by a31 ahb1. For getter, it differentiates parents with prediv, with non-zero prediv width. I've tested this patch on a83t bpi-m3 board. I do not have a31 device. a83t changes are not included in this patch, It'll be included in separate patch. Vishnu Patekar (2): clk: sunxi

[linux-sunxi] [PATCH 2/2] clk: sunxi: add prediv table for a31 ahb1 clock

For ahb1 clock, move mshift and mwidth to parent specific width and shift. getter differentiates parents with prediv, with non-zero prediv width. Also, removed unused ahb1 recalc function, it's now handled in generic factors recalc. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.

[linux-sunxi] Re: [PATCH v4 02/13] clk: sunxi: add ahb1 clock for A83T

Hello Maxime, On Fri, Apr 15, 2016 at 1:28 AM, Maxime Ripard <maxime.rip...@free-electrons.com> wrote: > On Mon, Apr 04, 2016 at 11:07:29AM +0800, Vishnu Patekar wrote: >> Hello Maxime, >> >> On Thu, Mar 17, 2016 at 6:40 PM, Maxime Ripard >> <maxime.rip...@fr

[linux-sunxi] [PATCH v4 01/13] pinctrl: sunxi: Add A83T R_PIO controller

The A83T has R_PIO pin controller, it's same as A23, execpt A83T interrupt bit is 6th and A83T has one extra pin PL12. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> Acked-by: Chen-Yu Tsai <w...@csie.org> Acked-by: Rob Herring <r...@kernel.org> --- .../bindings

[linux-sunxi] [PATCH v4 09/13] ARM: dts: sun8i-a83t: Add RSB controller device node to dtsi

This patch adds a device node for the Reduced Serial Bus (RSB) controller and the defacto pinmux setting to the A83T dtsi. Since there is only one possible pinmux setting for RSB, just set it in the dtsi. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> --- arch/arm/boot/dts

[linux-sunxi] [PATCH v4 00/13] Add A83T clk, r_pio, mmc rsb support

eference design pin patch 11: enables mmc0 support for h8homlet board, tested by LABBE Corentin. patch 12: This patch adds support for Sinovoip BPI-M3 A83T based board, it has 2GB LPDDR3, u-boot support is added recently for this board. patch 13: Adds kconfig for clocks(sun8i-apb0 and sun9i-cpus).

[linux-sunxi] [PATCH v4 05/13] ARM: dts: sun8i-a83t: add mmc clock nodes

mmc clocks are compatible with that of earlier sun8i socs. This adds mmc0, mmc1, and mmc2 clock nodes for A83T. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> Acked-by: Chen-Yu Tsai <w...@csie.org> --- arch/arm/boot/dts/sun8i-a83t.dtsi | 30 ++

[linux-sunxi] [PATCH v4 12/13] ARM: dts: sun8i: Add A83T based Sinovoip Bpi-M3 Board

This patch adds support for Sinovoip BPI-M3 A83T based board. It has 2G LPDDR3, UART, ethernet, USB, HDMI, USB Sata, MIPI DSI, mic, AP6212 Wifi, etc on it. It is paired with AXP813 PMIC which is almost same as AXP818. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> --- arch/ar

[linux-sunxi] [PATCH v4 03/13] clk: sunxi: Add APB1 clock for A83T

APB1 is similar to sun4i-a10-apb0-clk, except different dividers. This adds support for apb1 on A83T. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> Acked-by: Rob Herring <r...@kernel.org> --- Documentation/devicetree/bindings/clock/sunxi.txt | 1 + drivers/clk/sunxi

[linux-sunxi] [PATCH v4 10/13] ARM: dts: sun8i-a83t: add mmc0 CD pin

A83T Boards BPI-m3 and Allwinner H8Homletv2 boards use PF6 as Card Detect pin., so use PF6 as reference design CD pin in dtsi. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> --- arch/arm/boot/dts/sun8i-a83t.dtsi | 7 +++ 1 file changed, 7 insertions(+) diff --git a/ar

[linux-sunxi] [PATCH v4 08/13] ARM: dts: sun8i-a83t: Add R_PIO controller node to the dtsi

Now that we have a driver for the R_PIO controller, add the corresponding device node to the dtsi. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> --- arch/arm/boot/dts/sun8i-a83t.dtsi | 12 1 file changed, 12 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83

[linux-sunxi] [PATCH v4 02/13] clk: sunxi: add ahb1 clock for A83T

AHB1 on A83T is similar to ahb1 on A31, except parents are different. clock index 0b1x is PLL6. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> Acked-by: Chen-Yu Tsai <w...@csie.org> Acked-by: Rob Herring <r...@kernel.org> --- Documentation/devicetree/bindings/cl

[linux-sunxi] [PATCH v4 06/13] ARM: dts: sun8i-a83t: Add mmc controller nodes

A83T mmc is compatible with earliers sunxi socs. This adds mmc0, mmc1, and mmc2 controller nodes for A83T. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> --- arch/arm/boot/dts/sun8i-a83t.dtsi | 57 +++ 1 file changed, 57 insertions(+) diff

[linux-sunxi] [PATCH v4 11/13] ARM: dts: sun8i: enable mmc for H8Homlet Board.

This enables mmc0. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> Tested-by: LABBE Corentin <clabbe.montj...@gmail.com> --- arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts | 11 +++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a8

[linux-sunxi] Re: [PATCH v4 01/13] pinctrl: sunxi: Add A83T R_PIO controller

Hello Linus, On Thu, Mar 17, 2016 at 10:51 PM, Linus Walleij <linus.wall...@linaro.org> wrote: > On Wed, Mar 16, 2016 at 5:04 PM, Vishnu Patekar > <vishnupatekar0...@gmail.com> wrote: > >> The A83T has R_PIO pin controller, it's same as A23, execpt A83T >> inte

[linux-sunxi] [PATCH v4 04/13] ARM: dts: sun8i-a83t: Add basic clocks and resets

This adds A83T system bus clocks, bus gates, and clock resets. Three ahb reset registers are combined into one node. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> --- arch/arm/boot/dts/sun8i-a83t.dtsi | 114 +- 1 file changed, 112 inse

[linux-sunxi] Re: [PATCH v3 01/13] pinctrl: sunxi: Add A83T R_PIO controller support

Hello Linus, On Wed, Mar 9, 2016 at 10:55 AM, Linus Walleij <linus.wall...@linaro.org> wrote: > On Sat, Mar 5, 2016 at 10:42 PM, Vishnu Patekar > <vishnupatekar0...@gmail.com> wrote: > >> The A83T has R_PIO pin controller, it's same as A23, execpt A83T >> inte

[linux-sunxi] Re: [PATCH v3 13/13] ARM: sunxi: Add Kconfig for sunxi clocks

Hello, On Sat, Mar 5, 2016 at 11:43 PM, Vishnu Patekar <vishnupatekar0...@gmail.com> wrote: > This patch adds Kconfig for sunxi clocks. > Currently, only sun8i-apb0 and sun9i-cpus clocks are added. > It'll help to use common clocks across different SOCs. > We can switch to

[linux-sunxi] [PATCH v3 13/13] ARM: sunxi: Add Kconfig for sunxi clocks

This patch adds Kconfig for sunxi clocks. Currently, only sun8i-apb0 and sun9i-cpus clocks are added. It'll help to use common clocks across different SOCs. We can switch to kconfig for other clocks in future. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> --- drivers/clk/K

[linux-sunxi] [PATCH v3 12/13] ARM: dts: sun8i: Add A83T based Sinovoip Bpi-M3 Board

This patch adds support for Sinovoip BPI-M3 A83T based board. It has 2G LPDDR3, UART, ethernet, USB, HDMI, USB Sata, MIPI DSI, mic, AP6212 Wifi, etc on it. It is paired with AXP813 PMIC which is almost same as AXP818. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> --- arch/ar

[linux-sunxi] [PATCH v3 11/13] ARM: dts: sun8i: enable mmc for H8Homlet Board.

This enables mmc0. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> Tested-by: LABBE Corentin <clabbe.montj...@gmail.com> --- arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts | 11 +++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a8

[linux-sunxi] [PATCH v3 08/13] ARM: dts: sun8i-a83t: Add R_PIO controller node to the dtsi

Now that we have a driver for the R_PIO controller, add the corresponding device node to the dtsi. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> --- arch/arm/boot/dts/sun8i-a83t.dtsi | 12 1 file changed, 12 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83

[linux-sunxi] [PATCH v3 09/13] ARM: dts: sun8i-a83t: Add RSB controller device node to dtsi

This patch adds a device node for the Reduced Serial Bus (RSB) controller and the defacto pinmux setting to the A83T dtsi. Since there is only one possible pinmux setting for RSB, just set it in the dtsi. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> --- arch/arm/boot/dts

[linux-sunxi] [PATCH v3 10/13] ARM: dts: sun8i-a83t: add mmc0 CD pin

A83T Boards BPI-m3 and Allwinner H8Homletv2 boards use PF6 as Card Detect pin., so use PF6 as reference design CD pin in dtsi. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> --- arch/arm/boot/dts/sun8i-a83t.dtsi | 7 +++ 1 file changed, 7 insertions(+) diff --git a/ar

[linux-sunxi] [PATCH v3 05/13] ARM: dts: sun8i-a83t: add mmc clock nodes

mmc clocks are compatible with that of earlier sun8i socs. This adds mmc0, mmc1, and mmc2 clock nodes for A83T. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> Acked-by: Chen-Yu Tsai <w...@csie.org> --- arch/arm/boot/dts/sun8i-a83t.dtsi | 30 ++

[linux-sunxi] [PATCH v3 03/13] clk: sunxi: Add APB1 clock for A83T

APB1 is similar to sun4i-a10-apb0-clk, except different dividers. This adds support for apb1 on A83T. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> Acked-by: Rob Herring <r...@kernel.org> --- Documentation/devicetree/bindings/clock/sunxi.txt | 1 + drivers/clk/sunxi

[linux-sunxi] [PATCH v3 00/13] Add A83T clk, r_pio, mmc rsb support

s added recently for this board. patch 13: Adds kconfig for clocks(sun8i-apb0 and sun9i-cpus). Vishnu Patekar (13): pinctrl: sunxi: Add A83T R_PIO controller support clk: sunxi: add ahb1 clock for A83T clk: sunxi: Add APB1 clock for A83T ARM: dts: sun8i-a83t: Add basic clocks and resets

[linux-sunxi] [PATCH v3 06/13] ARM: dts: sun8i-a83t: Add mmc controller nodes

A83T mmc is compatible with earliers sunxi socs. This adds mmc0, mmc1, and mmc2 controller nodes for A83T. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> --- arch/arm/boot/dts/sun8i-a83t.dtsi | 57 +++ 1 file changed, 57 insertions(+) diff

[linux-sunxi] [PATCH v3 02/13] clk: sunxi: add ahb1 clock for A83T

AHB1 on A83T is similar to ahb1 on A31, except parents are different. clock index 0b1x is PLL6. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> Acked-by: Chen-Yu Tsai <w...@csie.org> Acked-by: Rob Herring <r...@kernel.org> --- Documentation/devicetree/bindings/cl

[linux-sunxi] [PATCH v3 07/13] ARM: dts: sun8i-a83t: Add PRCM related clocks and resets

This adds A83T PRCM related clocks, clock resets. As a83t apb0 gates clock support is added earlier, this enables it. Apart from apb0 gates, other added clocks are compatible with earlier sun8i socs. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> Acked-by: Chen-Yu T

[linux-sunxi] [PATCH v3 04/13] ARM: dts: sun8i-a83t: Add basic clocks and resets

This adds A83T system bus clocks, bus gates, and clock resets. Three ahb reset registers are combined into one node. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> --- arch/arm/boot/dts/sun8i-a83t.dtsi | 114 +- 1 file changed, 112 inse

[linux-sunxi] [PATCH v3 01/13] pinctrl: sunxi: Add A83T R_PIO controller support

The A83T has R_PIO pin controller, it's same as A23, execpt A83T interrupt bit is 6th and A83T has one extra pin PL12. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> Acked-by: Chen-Yu Tsai <w...@csie.org> Acked-by: Rob Herring <r...@kernel.org> --- .../bindings

[linux-sunxi] Re: [PATCH v2 13/13] ARM: sunxi: Introduce MACH_SUN8I_A83T option

Hello Maxime, On Tue, Mar 1, 2016 at 3:12 PM, Maxime Ripard <maxime.rip...@free-electrons.com> wrote: > Hi, > > On Sun, Feb 28, 2016 at 11:18:58PM +0800, Vishnu Patekar wrote: >> A83T has CPUS clock similar to A80's. currently, a80 cpus clock only >> comp

[linux-sunxi] Re: [PATCH v2 04/13] ARM: dts: sun8i-a83t: Add basic clocks and resets

Hello Wens, On Mon, Feb 29, 2016 at 1:29 AM, Chen-Yu Tsai <w...@csie.org> wrote: > On Sun, Feb 28, 2016 at 7:18 AM, Vishnu Patekar > <vishnupatekar0...@gmail.com> wrote: >> This adds A83T system bus clocks, bus gates, and clock resets. >> >> Three ahb reset

[linux-sunxi] [PATCH v2 11/13] ARM: dts: sun8i: enable mmc for H8Homlet Board.

This enables mmc0. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> Tested-by: LABBE Corentin <clabbe.montj...@gmail.com> --- arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts | 11 +++ 1 file changed, 11 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a8

[linux-sunxi] [PATCH v2 13/13] ARM: sunxi: Introduce MACH_SUN8I_A83T option

A83T has CPUS clock similar to A80's. currently, a80 cpus clock only compiled for A80. So, Introduce MACH_SUN8I_A83T to compile it for A83T as well. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> --- arch/arm/mach-sunxi/Kconfig | 5 + drivers/clk/sunxi/Makefile | 3 +++ 2

[linux-sunxi] [PATCH v2 10/13] ARM: dts: sun8i-a83t: add mmc0 CD pin

A83T Boards BPI-m3 and Allwinner H8Homletv2 boards use PF6 as Card Detect pin., so use PF6 as reference design CD pin in dtsi. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> --- arch/arm/boot/dts/sun8i-a83t.dtsi | 7 +++ 1 file changed, 7 insertions(+) diff --git a/ar

[linux-sunxi] [PATCH v2 12/13] ARM: dts: sun8i: Add A83T based Sinovoip Bpi-M3 Board

This patch adds support for Sinovoip BPI-M3 A83T based board. It has 2G LPDDR3, UART, ethernet, USB, HDMI, USB Sata, MIPI DSI, mic, AP6212 Wifi, etc on it. It is paired with AXP813 PMIC which is almost same as AXP818. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> --- arch/ar

[linux-sunxi] [PATCH v2 09/13] ARM: dts: sun8i-a83t: Add RSB controller device node to dtsi

This patch adds a device node for the Reduced Serial Bus (RSB) controller and the defacto pinmux setting to the A83T dtsi. Since there is only one possible pinmux setting for RSB, just set it in the dtsi. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> --- arch/arm/boot/dts

[linux-sunxi] [PATCH v2 08/13] ARM: dts: sun8i-a83t: Add R_PIO controller node to the dtsi

Now that we have a driver for the R_PIO controller, add the corresponding device node to the dtsi. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> --- arch/arm/boot/dts/sun8i-a83t.dtsi | 12 1 file changed, 12 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83

[linux-sunxi] [PATCH v2 03/13] clk: sunxi: Add APB1 clock for A83T

APB1 is similar to sun4i-a10-apb0-clk, except different dividers. This adds support for apb1 on A83T. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> Acked-by: Rob Herring <r...@kernel.org> --- Documentation/devicetree/bindings/clock/sunxi.txt | 1 + drivers/clk/sunxi

[linux-sunxi] [PATCH v2 06/13] ARM: dts: sun8i-a83t: Add mmc controller nodes

A83T mmc is compatible with earliers sunxi socs. This adds mmc0, mmc1, and mmc2 controller nodes for A83T. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> --- arch/arm/boot/dts/sun8i-a83t.dtsi | 57 +++ 1 file changed, 57 insertions(+) diff

[linux-sunxi] [PATCH v2 04/13] ARM: dts: sun8i-a83t: Add basic clocks and resets

This adds A83T system bus clocks, bus gates, and clock resets. Three ahb reset registers are combined into one node. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> --- arch/arm/boot/dts/sun8i-a83t.dtsi | 114 +- 1 file changed, 112 inse

[linux-sunxi] [PATCH v2 05/13] ARM: dts: sun8i-a83t: add mmc clock nodes

mmc clocks are compatible with that of earlier sun8i socs. This adds mmc0, mmc1, and mmc2 clock nodes for A83T. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> Acked-by: Chen-Yu Tsai <w...@csie.org> --- arch/arm/boot/dts/sun8i-a83t.dtsi | 30 ++

[linux-sunxi] [PATCH v2 00/13] Add A83T clk, r_pio, mmc rsb support

dds support for Sinovoip BPI-M3 A83T based board, it has 2GB LPDDR3, u-boot support is added recently for this board. patch 13: Introduce MACH_SUN8I_A83T config option. Vishnu Patekar (13): pinctrl: sunxi: Add A83T R_PIO controller support clk: sunxi: add ahb1 clock for A83T clk: sunxi: Add A

[linux-sunxi] [PATCH v2 01/13] pinctrl: sunxi: Add A83T R_PIO controller support

The A83T has R_PIO pin controller, it's same as A23, execpt A83T interrupt bit is 6th and A83T has one extra pin PL12. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> Acked-by: Chen-Yu Tsai <w...@csie.org> Acked-by: Rob Herring <r...@kernel.org> --- .../bindings

[linux-sunxi] [PATCH v2 02/13] clk: sunxi: add ahb1 clock for A83T

AHB1 on A83T is similar to ahb1 on A31, except parents are different. clock index 0b1x is PLL6. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> Acked-by: Chen-Yu Tsai <w...@csie.org> Acked-by: Rob Herring <r...@kernel.org> --- Documentation/devicetree/bindings/cl

[linux-sunxi] Re: [PATCH 10/14] ARM: dts: sun8i-a83t: Add PRCM related clocks and resets

Hello Wens, On Tue, Feb 2, 2016 at 2:44 PM, Chen-Yu Tsai <w...@csie.org> wrote: > On Sun, Jan 31, 2016 at 9:21 AM, Vishnu Patekar > <vishnupatekar0...@gmail.com> wrote: >> This adds A83T PRCM related clocks, clock resets. >> >> As a83t apb0 gates clock su

[linux-sunxi] Re: [PATCH 04/14] clk: sunxi: add ahb1 clock for A83T

Hello Maxime, On Thu, Feb 4, 2016 at 4:01 PM, Maxime Ripard <maxime.rip...@free-electrons.com> wrote: > On Thu, Feb 04, 2016 at 02:06:45PM +0800, Vishnu Patekar wrote: >> Hello Maxime, >> >> >> On Tue, Feb 2, 2016 at 9:17 PM, Maxime Ripard >> <maxime

[linux-sunxi] Re: [PATCH 06/14] ARM: dts: sun8i-a83t: Correct low speed oscillator clocks

Hello Maxime, On Tue, Feb 2, 2016 at 9:19 PM, Maxime Ripard <maxime.rip...@free-electrons.com> wrote: > On Sun, Jan 31, 2016 at 09:20:58AM +0800, Vishnu Patekar wrote: >> From: Chen-Yu Tsai <w...@csie.org> >> >> The A83T does not have a 32.768 kHz low speed osc

[linux-sunxi] Re: [PATCH 04/14] clk: sunxi: add ahb1 clock for A83T

Hello Maxime, On Tue, Feb 2, 2016 at 9:17 PM, Maxime Ripard <maxime.rip...@free-electrons.com> wrote: > Hi, > > On Sun, Jan 31, 2016 at 09:20:56AM +0800, Vishnu Patekar wrote: >> AHB1 on A83T is similar to ahb1 on A31, except parents are different. >> clock index 0b1

[linux-sunxi] Re: [PATCH 14/14] ARM: dts: sun8i: Add A83T based Sinovoip Bpi-M3 Board

Hello Wens, On Tue, Feb 2, 2016 at 3:37 PM, Chen-Yu Tsai <w...@csie.org> wrote: > > On Sun, Jan 31, 2016 at 9:21 AM, Vishnu Patekar > <vishnupatekar0...@gmail.com> wrote: > > This patch adds support for Sinovoip BPI-M3 A83T based board. > > > > It has 2G

[linux-sunxi] [PATCH 01/14] pinctrl: sunxi: Add A83T R_PIO controller support

The A83T has R_PIO pin controller, it's same as A23, execpt A83T interrupt bit is 6th and A83T has one extra pin PL12. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> --- .../bindings/pinctrl/allwinner,sunxi-pinctrl.txt | 1 + drivers/pinctrl/sunxi/K

[linux-sunxi] [PATCH 00/14] Add A83T clk, r_pio, mmc rsb support

speed oscillator clocks Vishnu Patekar (13): pinctrl: sunxi: Add A83T R_PIO controller support clk: sunxi: Add apb0 gates for A83T clk: sunxi: add bus gates for A83T clk: sunxi: add ahb1 clock for A83T clk: sunxi: Add APB1 clock for A83T ARM: dts: sun8i-a83t: Add basic clocks and resets

[linux-sunxi] [PATCH 04/14] clk: sunxi: add ahb1 clock for A83T

AHB1 on A83T is similar to ahb1 on A31, except parents are different. clock index 0b1x is PLL6. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> --- Documentation/devicetree/bindings/clock/sunxi.txt | 1 + drivers/clk/sunxi/clk-sunxi.c

[linux-sunxi] [PATCH 07/14] ARM: dts: sun8i-a83t: Add basic clocks and resets

This adds A83T system bus clocks, bus gates, and clock resets. For ahb1 and ahb2, it's not clear which reset belongs to ahb1 or ahb2; so named as ahb_reset0, ahb_reset1, ahb_reset2. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> --- arch/arm/boot/dts/sun8i-a83t.dtsi

[linux-sunxi] [PATCH 03/14] clk: sunxi: add bus gates for A83T

ci1) => AHB1 for H3 bits 29, 30, 31(ohci0,1,2) => AHB2 for H3. until, this confusion is cleared keep it H3 way. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> --- Documentation/devicetree/bindings/clock/sunxi.txt | 1 + drivers/clk/sunxi/clk-sun8i-bus-gates.c

[linux-sunxi] [PATCH 12/14] ARM: dts: sun8i-a83t: Add RSB nodes to dtsi

This adds support for RSB A83T RSB is compatible with A23 rsb. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> --- arch/arm/boot/dts/sun8i-a83t.dtsi | 14 ++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi b/arch/arm/boot/dts

[linux-sunxi] [PATCH 11/14] ARM: dts: sun8i-a83t: Add R_PIO controller node to the dtsi

Now that we have a driver for the R_PIO controller, add the corresponding device node to the dtsi. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> --- arch/arm/boot/dts/sun8i-a83t.dtsi | 21 + 1 file changed, 21 insertions(+) diff --git a/arch/arm/boot/dts

[linux-sunxi] [PATCH 09/14] ARM: dts: sun8i-a83t: Add mmc controller nodes

A83T mmc is compatible with earliers sunxi socs. This adds mmc0, mmc1, and mmc2 controller nodes for A83T. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> --- arch/arm/boot/dts/sun8i-a83t.dtsi | 57 +++ 1 file changed, 57 insertions(+) diff

[linux-sunxi] [PATCH 02/14] clk: sunxi: Add apb0 gates for A83T

APB0 is part of PRCM, and is compatible with earlier SOCs. apb0 gates controls R_PIO, R_UART, R_RSB, etc clocks. This patch adds support for APB0 gates for A83T. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> --- Documentation/devicetree/bindings/clock/sunxi.txt | 1 + drive

[linux-sunxi] [PATCH 06/14] ARM: dts: sun8i-a83t: Correct low speed oscillator clocks

From: Chen-Yu Tsai The A83T does not have a 32.768 kHz low speed oscillator, either as an external crystal or input. It has a 16 MHz RC-based (inaccurate) internal oscillator, which is then divided by 512 for a clock close to 32 kHz. Signed-off-by: Chen-Yu Tsai

[linux-sunxi] [PATCH 14/14] ARM: dts: sun8i: Add A83T based Sinovoip Bpi-M3 Board

This patch adds support for Sinovoip BPI-M3 A83T based board. It has 2G LPDDR3, UART, ethernet, USB, HDMI, USB Sata, MIPI DSI, mic, AP6212 Wifi, etc on it. It is paired with AXP813 PMIC which is almost same as AXP818. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> --- arch/ar

[linux-sunxi] [PATCH 13/14] ARM: dts: sun8i: enable mmc for H8Homlet Board.

This enables mmc0. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> Tested-by: LABBE Corentin <clabbe.montj...@gmail.com> --- .../boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts| 20 1 file changed, 20 insertions(+) diff --git a/arch/arm/boot/dt

[linux-sunxi] [PATCH 08/14] ARM: dts: sun8i-a83t: add mmc clock nodes

mmc clocks are compatible with that of earlier sun8i socs. This adds mmc0, mmc1, and mmc2 clock nodes for A83T. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> --- arch/arm/boot/dts/sun8i-a83t.dtsi | 30 ++ 1 file changed, 30 insertions(+) diff

Re: [linux-sunxi] Re: [PATCH] 1-wire sunxi enhancement

Hello Peter, Thanks for the initiative. Linux-sunxi community members are very helpful, and active, It would be great, if you could start working on it, whatever questions, doubt you encounter while doing this, just ask on #linux-sunxi IRC channel. Once you've minimal working driver for this,

[linux-sunxi] Re: SDIO WIFI (brcm43430)

Hello Arend, On Tue, Jan 19, 2016 at 5:20 PM, Arend van Spriel <ar...@broadcom.com> wrote: > On 19-1-2016 2:30, Vishnu Patekar wrote: >> Hello Arend, >> >> I've A83T BPI-m3 board, which includes AP6212(brcm43430). I'm trying >> to make it work for mainline l

[linux-sunxi] SDIO WIFI (brcm43430)

Hello Arend, I've A83T BPI-m3 board, which includes AP6212(brcm43430). I'm trying to make it work for mainline linux and brcm driver. After enabling mmc1, It could read vendor: 0x02d0 device: 0xa9a6. from /sys/bus/mmc/devices/mmc1:0001/mmc1:0001:1 BRCM driver loads the firmware files, however,

[linux-sunxi] Re: [PATCH 1/5] power: axp818: Remove duplicate register definition macros

Hello Wens, Thanks for correcting it. Regards, Vishnu On Tue, Jan 12, 2016 at 2:42 PM, Chen-Yu Tsai wrote: > Some of the register definitions are duplicated. Drop them. > > Signed-off-by: Chen-Yu Tsai > --- > include/axp818.h | 8 > 1 file changed, 8

Re: [linux-sunxi] Another take on sunxi-tools.

e Autoconf documentation. configure.ac:19: error: possibly undefined macro: AM_CONDITIONAL It would be great if README lists dependancies if any. Note: System: ubuntu 14.04 Regards, Vishnu Patekar On Wed, Jan 6, 2016 at 11:55 AM, Eddy Beaupré <hyw...@gmail.com> wrote: > A few weeks ago

[linux-sunxi] [PATCH v4 0/3] Add basic support for Allwinner A83T SOC

r. 4. arrnaged compatible in alphabatical order. 5. changed cpu nodes to use cpu@100 -cpu@-103. 6. changed dts filename. Vishnu Patekar (3): ARM: sunxi: Introduce Allwinner for A83T support ARM: dts: sun8i: Add Allwinner A83T dtsi ARM: dts: sun8i: Add A83T HomletV2 Board by Allwinner Docum

[linux-sunxi] [PATCH v4 3/3] ARM: dts: sun8i: Add A83T HomletV2 Board by Allwinner

and PF4. Enabled UART0 Header(PB9, PB10 pins). Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> --- arch/arm/boot/dts/Makefile | 1 + .../boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts | 64 ++ 2 files changed, 65 insertions(+) creat

[linux-sunxi] [PATCH v4 1/3] ARM: sunxi: Introduce Allwinner for A83T support

Allwinner A83T is octa-core cortex-a7 based SoC. It's clock control unit and prcm, pinmux are different from previous sun8i series. Its processor cores are arragned in two clusters 4 cores each, similar to A80. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> Acked-by: Rob Herr

[linux-sunxi] [PATCH v4 2/3] ARM: dts: sun8i: Add Allwinner A83T dtsi

Allwinner A83T is new octa-core cortex-a7 SOC. This adds the basic dtsi, the clocks differs from earlier sun8i SOCs. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> --- arch/arm/boot/dts/sun8i-a83t.dtsi | 204 ++ 1 file changed, 204 inse

Re: [linux-sunxi] reason for Allwinner SoC specific pinctrl drivers?

Hello Andre, This is something we can do for future SOCs. On 4 Jan 2016 19:02, "Andre Przywara" wrote: > > Hi, > > while looking at the Allwinner A64 SoC support, I was wondering why we > would actually need a pinctrl driver (file) for each and every Allwinner > SoC that

Re: [linux-sunxi] [RFC PATCH] drivers: pinctrl: add driver for Allwinner A64 SoC

ot;), > + SUNXI_FUNCTION(0x1, "gpio_out"), > + SUNXI_FUNCTION(0x2, "aif3"), /* BCLK */ > + SUNXI_FUNCTION(0x3, "i2s1"), /* BCLK */ > + SUNXI_FUNCTION_IRQ(0x6, 11)),

[linux-sunxi] Re: [PATCH v3 2/3] ARM: dts: sun8i: Add Allwinner A83T dtsi

Hello Maxime, On Sat, Dec 19, 2015 at 5:41 AM, Maxime Ripard <maxime.rip...@free-electrons.com> wrote: > Hi, > > On Fri, Dec 18, 2015 at 09:30:50PM +0800, Vishnu Patekar wrote: >> Allwinner A83T is new octa-core cortex-a7 SOC. >> This adds the basic dtsi, the clocks di

[linux-sunxi] [PATCH v3 1/3] ARM: sunxi: Introduce Allwinner for A83T support

Allwinner A83T is octa-core cortex-a7 based SoC. It's clock control unit and prcm, pinmux are different from previous sun8i series. Its processor cores are arragned in two clusters 4 cores each, similar to A80. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> --- Documentati

[linux-sunxi] [PATCH v3 0/3] Add basic support for Allwinner A83T SOC

alphabatical order. 4. arrnaged compatible in alphabatical order. 5. changed cpu nodes to use cpu@100 -cpu@-103. 6. changed dts filename. Vishnu Patekar (3): ARM: sunxi: Introduce Allwinner for A83T support ARM: dts: sun8i: Add Allwinner A83T dtsi ARM: dts: sun8i: Add A83T HomletV2 Board by All

[linux-sunxi] [PATCH v3 2/3] ARM: dts: sun8i: Add Allwinner A83T dtsi

Allwinner A83T is new octa-core cortex-a7 SOC. This adds the basic dtsi, the clocks differs from earlier sun8i SOCs. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> --- arch/arm/boot/dts/sun8i-a83t.dtsi | 206 ++ 1 file changed, 206 inse

[linux-sunxi] [PATCH v3 3/3] ARM: dts: sun8i: Add A83T HomletV2 Board by Allwinner

and PF4. Enabled UART0 Header(PB9, PB10 pins). Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> --- arch/arm/boot/dts/Makefile | 1 + .../boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts | 64 ++ 2 files changed, 65 insertions(+) creat

[linux-sunxi] Re: [PATCH v2 2/3] ARM: dts: sun8i: Add Allwinner A83T dtsi

Hello Maxime, Sorry for delayed response. On Mon, Oct 26, 2015 at 4:20 AM, Maxime Ripard <maxime.rip...@free-electrons.com> wrote: > Hi, > > On Fri, Oct 23, 2015 at 07:46:16AM +0800, Vishnu Patekar wrote: >> + memory { >> + r

[linux-sunxi] Re: [PATCH v2 1/3] ARM: sunxi: Introduce Allwinner for A83T support

Hello, Sorry for delayed response. On Fri, Oct 23, 2015 at 9:37 AM, Chen-Yu Tsai <w...@csie.org> wrote: > On Fri, Oct 23, 2015 at 7:46 AM, Vishnu Patekar > <vishnupatekar0...@gmail.com> wrote: >> Allwinner A83T is octa-core cortex-a7 based SoC. >> It's clock

Re: [linux-sunxi] Re: [PATCH sunxi-tools 2/2] fel: Enable MMU on Allwinner-H3

Hello, On Thu, Nov 12, 2015 at 7:03 PM, Julian Calaby wrote: > Hi Stefan, > > On Thu, Nov 12, 2015 at 12:20 AM, Stefan Monnier > wrote: > >> When the CPU clock speed is set to 480 MHz by the U-Boot SPL, > >^^^ > > You mean MBUS? >

[linux-sunxi] [PATCH v2 0/3] Add basic support for Allwinner A83T SOC

ged compatible in alphabatical order. 5. changed cpu nodes to use cpu@100 -cpu@-103. 6. changed dts filename. Vishnu Patekar (3): ARM: sunxi: Introduce Allwinner for A83T support ARM: dts: sun8i: Add Allwinner A83T dtsi ARM: dts: sun8i: Add A83T HomletV2 Board by Allwinner Documentation/devicet

[linux-sunxi] [PATCH v2 2/3] ARM: dts: sun8i: Add Allwinner A83T dtsi

Allwinner A83T is new octa-core cortex-a7 SOC. This adds the basic dtsi, the clocks differs from earlier sun8i SOCs. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> --- arch/arm/boot/dts/sun8i-a83t.dtsi | 247 ++ 1 file changed, 247 inse

[linux-sunxi] [PATCH v2 1/3] ARM: sunxi: Introduce Allwinner for A83T support

Allwinner A83T is octa-core cortex-a7 based SoC. It's clock control unit and prcm, pinmux are different from previous sun8i series. Its processor cores are arragned in two clusters 4 cores each, similar to A80. Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> --- Documen

[linux-sunxi] [PATCH v2 3/3] ARM: dts: sun8i: Add A83T HomletV2 Board by Allwinner

and PF4. Enabled UART0 Header(PB9, PB10 pins). Signed-off-by: Vishnu Patekar <vishnupatekar0...@gmail.com> --- .../boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts | 64 ++ 1 file changed, 64 insertions(+) create mode 100644 arch/arm/boot/dts/sun8i-a83t-allwinner-h8hom

Re: [linux-sunxi] All winner A13 pin mapping

Hello, Please find the user manual at below link, refer page no. 322 https://github.com/allwinner-zh/documents/blob/master/A13/A13_User_Manual_v1.5_20150510.pdf Regards, Vishnu On Mon, Sep 28, 2015 at 10:24 AM, wrote: > Hi guys, > > I am looking into

[linux-sunxi] Re: [PATCH 1/4] ARM: sunxi: Introduce Allwinner for A83T support

Hello, On Tue, Sep 22, 2015 at 11:47 PM, Chen-Yu Tsai <w...@csie.org> wrote: > On Tue, Sep 22, 2015 at 11:38 PM, Vishnu Patekar > <vishnupatekar0...@gmail.com> wrote: >> Allwinner A83T is octa-core cortex-a7 based SoC. >> It's clock control unit and prcm, pinmux are

[linux-sunxi] Re: [PATCH 1/4] ARM: sunxi: Introduce Allwinner for A83T support

Hello, On Tue, Sep 22, 2015 at 11:51 PM, Maxime Ripard <maxime.rip...@free-electrons.com> wrote: > Hi, > > On Tue, Sep 22, 2015 at 11:38:54PM +0800, Vishnu Patekar wrote: >> Allwinner A83T is octa-core cortex-a7 based SoC. >> It's clock control unit and prcm, pinmux

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