Hi Thomas,
On 09/20/15 11:26, daga...@gmail.com wrote:
> I'm considering moving from kernel 3.4.103 to 4.2
> IIRC the mali binary driver will not work on 4.2 but I can't find the page I
> got that information from.
> Will I be able to use mali on the new kernel?
Do you have mali working with
On Mon, 21 Sep 2015, Boris Brezillon wrote:
> When requested by a user, the PWM is assigned a default period and polarity
> extracted from the DT, the platform data or statically set by the driver.
> Those default values are currently stored in the period and polarity
> fields of the pwm_device
On Mon, 21 Sep 2015, Boris Brezillon wrote:
> The PWM period will be set when calling pwm_config. Remove this useless
> call to pwm_set_period, which might mess up with the initial PWM state
> once we have added proper support for PWM init state retrieval.
>
> Signed-off-by: Boris Brezillon
On Sun, 20 Sep 2015, Chen-Yu Tsai wrote:
> Hi Lee,
>
> On Sun, Sep 20, 2015 at 12:17 PM, Lee Jones wrote:
> > On Wed, 16 Sep 2015, Chen-Yu Tsai wrote:
> >
> >> The DC1SW and DC5LDO regulators in the AXP221 are internally chained
> >> to DCDC1 and DCDC5, hence the names.
On Sun, 20 Sep 2015 08:26:27 -0700 (PDT)
daga...@gmail.com wrote:
> Hey all!
>
> I'm considering moving from kernel 3.4.103 to 4.2
> IIRC the mali binary driver will not work on 4.2 but
> I can't find the page I got that information from.
> Will I be able to use mali on the new kernel?
First of
On Tue, 22 Sep 2015 13:36:38 -0400
Trevor Woerner wrote:
> Hi Thomas,
>
> On 09/20/15 11:26, daga...@gmail.com wrote:
> > I'm considering moving from kernel 3.4.103 to 4.2
> > IIRC the mali binary driver will not work on 4.2 but I can't find the page
> > I got that
A33 has the same "Security System" crypto engine as A10/A20, but with a
separate reset control.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun8i-a33.dtsi | 18 ++
1 file changed, 18 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a33.dtsi
On Tue, Sep 22, 2015 at 11:47:40PM +0800, Chen-Yu Tsai wrote:
> On Tue, Sep 22, 2015 at 11:38 PM, Vishnu Patekar
> wrote:
> > Allwinner A83T is octa-core cortex-a7 based SoC.
> > It's clock control unit and prcm, pinmux are different from previous sun8i
> > series.
>
Hi,
On Tue, Sep 22, 2015 at 11:38:54PM +0800, Vishnu Patekar wrote:
> Allwinner A83T is octa-core cortex-a7 based SoC.
> It's clock control unit and prcm, pinmux are different from previous sun8i
> series.
> Its processor cores are arragned in two clusters 4 cores each,
> similar to A80.
>
>
On Tue, Sep 22, 2015 at 11:53 PM, Maxime Ripard
wrote:
> On Tue, Sep 22, 2015 at 11:47:40PM +0800, Chen-Yu Tsai wrote:
>> On Tue, Sep 22, 2015 at 11:38 PM, Vishnu Patekar
>> wrote:
>> > Allwinner A83T is octa-core cortex-a7 based
On Tue, Sep 22, 2015 at 11:38:56PM +0800, Vishnu Patekar wrote:
> Allwinner A83T is new octa-core cortex-a7 SOC.
> This adds the basic dtsi, the clocks differs from
> earlier sun8i SOCs.
>
> Signed-off-by: Vishnu Patekar
> ---
> arch/arm/boot/dts/sun8i-a83t.dtsi |
On Tue, Sep 22, 2015 at 11:38:57PM +0800, Vishnu Patekar wrote:
> H8Homlet Proto v2.0 Board is A83T Dev Board by Allwinner.
> It has UART, ethernet, USB, HDMI, etc ports on it.
>
> It's name is confusing, Its A83T board however,"H8_HOMLET_PROTO_V2"
> printed on board.
>
> A83T patches are tested
On Tue, Sep 22, 2015 at 11:38 PM, Vishnu Patekar
wrote:
> Allwinner A83T soc port controller has 8 ports.
> It has 3 IRQ banks namely PB, PG, PH.
> Pinmuxing are different for some pins as compared to
> sun8i A23 and A33.
>
> Signed-off-by: Vishnu Patekar
On Tue, Sep 22, 2015 at 11:54 PM, Maxime Ripard
wrote:
> On Tue, Sep 22, 2015 at 11:38:56PM +0800, Vishnu Patekar wrote:
>> Allwinner A83T is new octa-core cortex-a7 SOC.
>> This adds the basic dtsi, the clocks differs from
>> earlier sun8i SOCs.
>>
>>
Hello,
On Wed, Sep 23, 2015 at 12:00 AM, Maxime Ripard
wrote:
>
> On Tue, Sep 22, 2015 at 11:38:57PM +0800, Vishnu Patekar wrote:
> > H8Homlet Proto v2.0 Board is A83T Dev Board by Allwinner.
> > It has UART, ethernet, USB, HDMI, etc ports on it.
> >
> > It's
Signed-off-by: Justin Swartz
---
meminfo/a23/inet_d70.txt | 259 +++
1 file changed, 259 insertions(+)
create mode 100644 meminfo/a23/inet_d70.txt
diff --git a/meminfo/a23/inet_d70.txt b/meminfo/a23/inet_d70.txt
new
Hi Brian,
On Mon, 21 Sep 2015 17:15:28 -0700
Brian Norris wrote:
> On Sun, Sep 13, 2015 at 06:14:43PM +0200, Boris Brezillon wrote:
> > The sunxi_nand_chips_cleanup() function is missing a call to list_del()
> > which generates a double free error.
>
> And if you
Boris Brezillon writes:
> When requested by a user, the PWM is assigned a default period and polarity
> extracted from the DT, the platform data or statically set by the driver.
> Those default values are currently stored in the period and polarity
> fields of
Hi Boris,
On 09/21/2015 11:33 AM, Boris Brezillon wrote:
When requested by a user, the PWM is assigned a default period and polarity
extracted from the DT, the platform data or statically set by the driver.
Those default values are currently stored in the period and polarity
fields of the
Hi Ian,
On Fri, Sep 18, 2015 at 04:08:21PM +0100, Ian Campbell wrote:
> On Fri, 2015-09-18 at 14:06 +0200, Maxime Ripard wrote:
> > The R8 is very close to the A13, but it still has a few differences,
> > notably a composite output, which the A13 lacks.
> >
> > Add a DTSI based on the A13's to
Hi Hans,
On Fri, Sep 18, 2015 at 10:53:51AM -0400, Hans de Goede wrote:
> Hi,
>
> On 09/18/2015 08:06 AM, Maxime Ripard wrote:
> >The current fastboot support assumes that CONFIG_FASTBOOT_FLASH implies
> >that we have an MMC in our system, which might not be the case if we have
> >some other
On Tue, 2015-09-22 at 11:17 +0200, Maxime Ripard wrote:
> Hi Ian,
>
> On Fri, Sep 18, 2015 at 04:08:21PM +0100, Ian Campbell wrote:
> > On Fri, 2015-09-18 at 14:06 +0200, Maxime Ripard wrote:
> > > The R8 is very close to the A13, but it still has a few differences,
> > > notably a composite
Hi Tom,
On Fri, Sep 18, 2015 at 11:02:32AM -0400, Tom Rini wrote:
> On Fri, Sep 18, 2015 at 02:06:16PM +0200, Maxime Ripard wrote:
>
> > The current fastboot support assumes that CONFIG_FASTBOOT_FLASH implies
> > that we have an MMC in our system, which might not be the case if we have
> > some
On Fri, Sep 18, 2015 at 11:02:27AM -0400, Tom Rini wrote:
> On Fri, Sep 18, 2015 at 02:06:15PM +0200, Maxime Ripard wrote:
>
> > Some devices don't have any MMC devices, so it doesn't really make sense to
> > enable the MMC related functions and options for them.
> >
> > Add an option to disable
On Sat, Sep 19, 2015 at 07:13:27AM -0400, Tom Rini wrote:
> On Sat, Sep 19, 2015 at 09:31:52AM +1000, Julian Calaby wrote:
> > Hi,
> >
> > On Sat, Sep 19, 2015 at 1:39 AM, Hans de Goede wrote:
> > > Hi,
> > >
> > > On 09/18/2015 11:39 AM, Tom Rini wrote:
> > >>
> > >> On
Hi community,
i decided to write a short email to our list in order to ask for the
status of the mainline effort of display driver, video engine and mali.
First of all, please don't get me wrong. This is no begging mail, it's
just a try to bring us up-to-date what's going on with these
Hi Hans,
On Fri, Sep 18, 2015 at 10:52:37AM -0400, Hans de Goede wrote:
> Hi,
>
> First if all, thanks for the patches for this. I've a couple
> of comments on a few of them (including this one) I'll reply to the one
> I've comments on. no reply means I think it is fine :)
>
> On 09/18/2015
On Sat, 2015-09-12 at 15:26 +0200, Maxime Ripard wrote:
> Hi everyone,
>
> This patch set adds the support for what Allwinner calls the codec on
> their SoCs.
>
> This codec is actually a combination of a codec and DAI, tied
> together
> in a single memory-mapped IP. It is completely standalone,
Hi,
On 22-09-15 15:12, Sebastian Reichel wrote:
Hi,
On Sun, Sep 20, 2015 at 08:39:31AM -0400, Hans de Goede wrote:
This is a resend of v4 of the axp20x-usb-power power-supply driver,
after v4 there have been no further comments, so I assume that this
version is ready for merging, yet for some
Hi,
On 22-09-15 15:01, Hans de Goede wrote:
Hi,
On 22-09-15 14:57, Chen-Yu Tsai wrote:
On Tue, Sep 22, 2015 at 8:47 PM, Maxime Ripard
wrote:
+_otg {
+ dr_mode = "otg";
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+
Add a node representing the usb power supply part of the axp209 pmic, note
that the usb power supply and the (to be added later) ac power supply will
each have their own child-node, so that they can be separately specified
as power-supply for other nodes using a power-supply property with a
From: Aleksei Mamlin
Enable the otg/drc usb controller on the Wexler TAB7200 tablet.
Signed-off-by: Aleksei Mamlin
Signed-off-by: Hans de Goede
---
arch/arm/boot/dts/sun7i-a20-wexler-tab7200.dts | 33 +-
1
From: Reinder de Haan
Add usb otg support for Orange pi, based on Orange pi mini.
Signed-off-by: Reinder de Haan
Signed-off-by: Hans de Goede
---
arch/arm/boot/dts/sun7i-a20-orangepi.dts | 29 +
1
Enable the otg/drc usb controller on the orangepi-mini.
Signed-off-by: Hans de Goede
---
arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts | 29 +++
1 file changed, 29 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20-orangepi-mini.dts
From: Jelle de Jong
The Wits Pro A20 DKT is an A20 Development KiT with 1G RAM, 4G NAND,
sdio wifi, 1Gbit ethernet, 1024x768 lcd screen with ft5x_ts touchscreen
and a ton of IO connectors.
Note there seem to be multiple sdcard slots on the board (4 in total), but
Enable the otg/drc usb controller on the Bananapi.
Signed-off-by: Hans de Goede
---
arch/arm/boot/dts/sun7i-a20-bananapi.dts | 29 +
1 file changed, 29 insertions(+)
diff --git a/arch/arm/boot/dts/sun7i-a20-bananapi.dts
Hi,
maybe this is important for some else:
Changing the dcdc3 voltage to 1300 instead of 1250 seems to fix the issue
regarding the BAD TCP packets.
Regards
Tobias
Am Montag, 21. September 2015 09:23:58 UTC+2 schrieb tandre...@gmail.com:
>
> Hi,
>
> thanks for the detailed explanation.
>
>
Hi,
maybe this is important for some one else:
Changing the dcdc3 voltage to 1300 instead of 1250 seems to fix the issue
regarding the BAD TCP packets.
Regards
Tobias
Am Montag, 21. September 2015 09:23:58 UTC+2 schrieb tandre...@gmail.com:
>
> Hi,
>
> thanks for the detailed explanation.
>
Signed-off-by: Justin Swartz
---
sys_config/a23/inet_d70.fex | 859
1 file changed, 859 insertions(+)
create mode 100644 sys_config/a23/inet_d70.fex
diff --git a/sys_config/a23/inet_d70.fex
Hi,
On 22-09-15 13:07, Justin Swartz wrote:
Signed-off-by: Justin Swartz
Thanks, I've pushed this to master.
Regards,
Hans
---
sys_config/a23/inet_d70.fex | 859
1 file changed, 859 insertions(+)
create
On Sun, Sep 13, 2015 at 07:33:36PM +0200, Hans de Goede wrote:
> >Anyway. In both cases, the regulator really shouldn't be drifting
> >along like this.
>
> Right which is why I've added the always-on property.
Which is exactly what I meant by drifting along: that regulator will
never be
On Sun, Sep 20, 2015 at 08:30:50AM -0400, Hans de Goede wrote:
> From: Chen-Yu Tsai
>
> The LCD backlight on the A23/A33 Q8 format tablets is enabled
> with a GPIO controlled regulator, and brightness controlled with
> the SoC's PWM controller.
>
> The backlight is powered from
On Tue, Sep 22, 2015 at 8:47 PM, Maxime Ripard
wrote:
> On Sat, Sep 19, 2015 at 12:41:07AM +0800, Chen-Yu Tsai wrote:
>> On Fri, Sep 18, 2015 at 4:48 PM, Maxime Ripard
>> wrote:
>> > The C.H.I.P. is a small SBC with an Allwinner
Hi,
On Sun, Sep 20, 2015 at 08:39:31AM -0400, Hans de Goede wrote:
> This is a resend of v4 of the axp20x-usb-power power-supply driver,
> after v4 there have been no further comments, so I assume that this
> version is ready for merging, yet for some reason it has not been
> merged yet.
My
On Tue, Sep 22, 2015 at 10:20:20AM +0100, Ian Campbell wrote:
> On Tue, 2015-09-22 at 11:17 +0200, Maxime Ripard wrote:
> > Hi Ian,
> >
> > On Fri, Sep 18, 2015 at 04:08:21PM +0100, Ian Campbell wrote:
> > > On Fri, 2015-09-18 at 14:06 +0200, Maxime Ripard wrote:
> > > > The R8 is very close to
On Sat, Sep 19, 2015 at 12:41:07AM +0800, Chen-Yu Tsai wrote:
> On Fri, Sep 18, 2015 at 4:48 PM, Maxime Ripard
> wrote:
> > The C.H.I.P. is a small SBC with an Allwinner R8, 8GB of NAND, 512MB of
> > RAM, USB host and OTG, a wifi / bluetooth combo chip, an
Hi,
On 22-09-15 14:57, Chen-Yu Tsai wrote:
On Tue, Sep 22, 2015 at 8:47 PM, Maxime Ripard
wrote:
+_otg {
+ dr_mode = "otg";
+ status = "okay";
+};
+
+ {
+ pinctrl-names = "default";
+ pinctrl-0 = <_id_det_pin>;
+ status =
On Sun, Sep 20, 2015 at 08:30:48AM -0400, Hans de Goede wrote:
> Add a pinmux setting for the first pwm channel. This is often used for
> backlight dimming on tablets.
>
> Signed-off-by: Hans de Goede
> ---
> arch/arm/boot/dts/sun5i.dtsi | 7 +++
> 1 file changed, 7
Hi,
On 22-09-15 16:04, Maxime Ripard wrote:
On Tue, Sep 22, 2015 at 03:01:58PM +0200, Hans de Goede wrote:
In short, this is not about "power supply" but VBUS detection. IIRC,
if no VBUS detection method is provided, the phy driver just waits a
period of time after an ID pin change and then
Hi,
On 22-09-15 17:02, Maxime Ripard wrote:
On Sun, Sep 13, 2015 at 07:33:36PM +0200, Hans de Goede wrote:
Anyway. In both cases, the regulator really shouldn't be drifting
along like this.
Right which is why I've added the always-on property.
Which is exactly what I meant by drifting
H8Homlet Proto v2.0 Board is A83T Dev Board by Allwinner.
It has UART, ethernet, USB, HDMI, etc ports on it.
It's name is confusing, Its A83T board however,"H8_HOMLET_PROTO_V2"
printed on board.
A83T patches are tested on this board.
It has UART, ethernet, USB, HDMI, etc ports on it.
For FEL
This patch series adds very basic support for Allwinner A83T SOC.
Clock, peripherals, smp support will be added later.
Allwinner A83T is octa-core cortex-a7 based SoC.
It's clock control unit and prcm, pinmux are different from previous sun8i
series.
Its processor cores are arragned in two
On Tue, Sep 22, 2015 at 11:38:55PM +0800, Vishnu Patekar wrote:
> Allwinner A83T soc port controller has 8 ports.
> It has 3 IRQ banks namely PB, PG, PH.
> Pinmuxing are different for some pins as compared to
> sun8i A23 and A33.
>
> Signed-off-by: Vishnu Patekar
The bs1078v2 is a pcb found in 10.1" tablets with an A31 soc, 1G RAM
and 8G NAND, rtl8723as usb wifi, 1 micro USB OTG port, 1 USB HOST port
This commit adds a dts for v2 of the bs1078 pcb.
Signed-off-by: Lawrence Yu
---
Changes in v2:
- added vendor name to dts filename
-
Hi,
On Tue, Sep 22, 2015 at 11:09:23AM +0200, Andreas Baierl wrote:
> i decided to write a short email to our list in order to ask for the status
> of the mainline effort of display driver, video engine and mali.
> First of all, please don't get me wrong. This is no begging mail, it's just
> a
Allwinner A83T is new octa-core cortex-a7 SOC.
This adds the basic dtsi, the clocks differs from
earlier sun8i SOCs.
Signed-off-by: Vishnu Patekar
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 243 ++
1 file changed, 243 insertions(+)
Allwinner A83T is octa-core cortex-a7 based SoC.
It's clock control unit and prcm, pinmux are different from previous sun8i
series.
Its processor cores are arragned in two clusters 4 cores each,
similar to A80.
Signed-off-by: Vishnu Patekar
---
On Mon, Sep 21, 2015 at 12:21 AM, Maxime Ripard <
maxime.rip...@free-electrons.com> wrote:
> Hi Lawrence,
>
> Please add the linux-arm-kernel mailing list for your next patch (or
> any recipient returned by get_maintainers.pl)
>
>
Will do on the next new patch.
On Fri, Sep 18, 2015 at 09:42:55PM
On Tue, Sep 22, 2015 at 11:38 PM, Vishnu Patekar
wrote:
> Allwinner A83T is octa-core cortex-a7 based SoC.
> It's clock control unit and prcm, pinmux are different from previous sun8i
> series.
> Its processor cores are arragned in two clusters 4 cores each,
> similar
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