Hi,
On 02/24/2015 10:15 AM, Siarhei Siamashka wrote:
On Tue, 24 Feb 2015 04:18:40 +0200
Siarhei Siamashka siarhei.siamas...@gmail.com wrote:
This is the fix for the previously non-working 'fel spl' command
on Allwinner A13. And some other improvements.
Also available at:
Hi,
On 02/24/2015 08:04 PM, Siarhei Siamashka wrote:
On Tue, 24 Feb 2015 18:11:22 +0100
Hans de Goede hdego...@redhat.com wrote:
Hi,
On 02/24/2015 03:18 AM, Siarhei Siamashka wrote:
This is needed to have feature parity with the normal boot mode,
where the L2EN bit in the CP15 Auxiliary
On Tue, 24 Feb 2015 04:18:40 +0200
Siarhei Siamashka siarhei.siamas...@gmail.com wrote:
This is the fix for the previously non-working 'fel spl' command
on Allwinner A13. And some other improvements.
Also available at:
https://github.com/ssvb/sunxi-tools/commits/20150223-fel-fixes
BTW,
Hi
Wonder if they're willing to help out with the Cyanogenmod efforts.
A dude going by the name of Christian Troy was claimed to have worked with
Allwinner employees and released several Cyanogenmod distros for the A31,
but the problem is he hasn't released any complete source archives,
and others
On Sat, 21 Feb 2015 16:47:20 +0100
Hans de Goede hdego...@redhat.com wrote:
Hi all,
Newer u-boot versions may chose a different (better) PLL6 / PLL5 setting
and/or different voltage settings. Unfortunately the old linux-sunxi-3.4
kernels have a number of hardcoded assumptions about PLL5
On Tue, 2015-02-24 at 11:31 +0200, Siarhei Siamashka wrote:
On Mon, 23 Feb 2015 13:12:32 +
Ian Campbell ijc+ub...@hellion.org.uk wrote:
On Sun, 2015-02-22 at 18:55 +0200, Siarhei Siamashka wrote:
We might want to push sunxi-tools into more Linux distributions than
just Debian and
Reduced Serial Bus (RSB) is an SMBus like bus used to communicate
with some PMICs (like the AXP223) or other peripherals.
The RSB DT bindings are pretty much the same as the one defined for
the marvell's mv64xxx controller, with the additional RSB specific
allwinner,rsb-hw-addr property for slave
This patch adds a device node for the Reduced Serial Bus (RSB)
controller and the defacto pinmux setting to the A23 dtsi.
Since there is only one possible pinmux setting for RSB, just
set it in the dtsi.
Signed-off-by: Chen-Yu Tsai w...@csie.org
---
arch/arm/boot/dts/sun8i-a23.dtsi | 21
The Reduced Serial Bus controller is used to talk to the onboard PMIC.
Signed-off-by: Chen-Yu Tsai w...@csie.org
---
arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a23-ippo-q8h-v5.dts
On Mon, 23 Feb 2015 14:35:06 +0100
Benjamin Henrion zoo...@gmail.com wrote:
I am waiting for binary cross-compilers in debian for at least 10
years now, since I followed emdebian project.
For gentooers around, the ebuild is 18 lines:
Also you can find the patches here btw:
https://github.com/christiantroy/allwinner_a31
Cheers
--
David Lanzendörfer
OpenSourceSupport GmbH
System engineer and supporter
http://www.o2s.ch/
--
You received this message because you are subscribed to the Google Groups
linux-sunxi group.
To
The RSB controller looks like an SMBus controller which only supports byte
and word data transfers. It can also do double-word data transfers, but the
I2C subsystem does not support this, nor have we seen devices using this.
The RSB differs from standard SMBus protocol on several aspects:
- it
On Tuesday, February 24, 2015 at 8:24:32 AM UTC+11, Al Thomas wrote:
Your description of handshaking made me wonder if that was the problem.
Are you aware there are two serial protocols available on the chip? H4 uses
the control lines and H5 that seems to use SLIP. Page 30 of the BCM20710
On 24 February 2015 at 11:00, Ian Campbell ijc+ub...@hellion.org.uk wrote:
On Tue, 2015-02-24 at 11:31 +0200, Siarhei Siamashka wrote:
On Mon, 23 Feb 2015 13:12:32 +
Ian Campbell ijc+ub...@hellion.org.uk wrote:
On Sun, 2015-02-22 at 18:55 +0200, Siarhei Siamashka wrote:
We might want
On Tuesday 24 February 2015 18:29:02 Chen-Yu Tsai wrote:
+ rsb@01f03400 {
+ compatible = allwinner,sun8i-a23-rsb;
+ reg = 0x01f03400 0x400;
+ interrupts = 0 39 4;
+ clocks = apb0_gates 3;
+ clock-frequency =
Ugh, I knew it. Chris disabled private messaging on his XDA profile. :'(
On Sunday, February 15, 2015 at 5:02:38 AM UTC+8, David Lanzendörfer wrote:
Hello
As you have maybe already heard in IRC I've taken a trip to Zhuhai and met
the
engineers of Allwinner Technology (全志科技) in person.
That's quite a drag. Also, I have to admit that I'm no programmer, but it would
be nice if someone can at least give some pointers on how to use Christian's CM
patches. Not to mention that he seems to have moved on from developing for
Allwinner, and I'm afraid he might not even reply to my mail
Wonder if they're willing to help out with the Cyanogenmod efforts. A dude
going by the name of Christian Troy was claimed to have worked with
Allwinner employees and released several Cyanogenmod distros for the A31,
but the problem is he hasn't released any complete source archives, and
On Tuesday 24 February 2015 22:01:26 Chen-Yu Tsai wrote:
On Tue, Feb 24, 2015 at 6:37 PM, Arnd Bergmann a...@arndb.de wrote:
On Tuesday 24 February 2015 18:29:02 Chen-Yu Tsai wrote:
+ rsb@01f03400 {
+ compatible = allwinner,sun8i-a23-rsb;
+ reg =
On Tue, Feb 24, 2015 at 10:17 PM, Arnd Bergmann a...@arndb.de wrote:
On Tuesday 24 February 2015 22:01:26 Chen-Yu Tsai wrote:
On Tue, Feb 24, 2015 at 6:37 PM, Arnd Bergmann a...@arndb.de wrote:
On Tuesday 24 February 2015 18:29:02 Chen-Yu Tsai wrote:
+ rsb@01f03400 {
+
On Tue, Feb 24, 2015 at 6:37 PM, Arnd Bergmann a...@arndb.de wrote:
On Tuesday 24 February 2015 18:29:02 Chen-Yu Tsai wrote:
+ rsb@01f03400 {
+ compatible = allwinner,sun8i-a23-rsb;
+ reg = 0x01f03400 0x400;
+ interrupts = 0 39 4;
+
From: Steven Saunderson essat2...@gmail.com
Sent: Tuesday, 24 February 2015, 10:28
Subject: Re: [linux-sunxi] CubieTruck internal UARTs with 3.19 kernel for
Bluetooth
Today I've tested asserting and negating RTS at various times.
Host RTS must be asserted at the end of the reset pulse and
On Tue, 24 Feb 2015 18:08:55 +0100
Hans de Goede hdego...@redhat.com wrote:
Hi,
On 02/24/2015 03:18 AM, Siarhei Siamashka wrote:
The FEL BROM code has the MMU enabled for some reason (while
I-cache and D-cache are disabled). Most likely the intention was
to get a somewhat better
On Tue, 24 Feb 2015 04:18:43 +0200
Siarhei Siamashka siarhei.siamas...@gmail.com wrote:
By adjusting the MMU translation table before restoring it
and by enabling the I-cache with branch prediction, we can
improve performance. The DRAM area (0x4000-0xC000)
becomes write-combine mapped
Hi,
On 02/24/2015 03:18 AM, Siarhei Siamashka wrote:
Trying to use oversized initrd files (20 MB or more) can fail
with the libusb usb_bulk_send error -1 error message.
To address this problem, we can split the transfer into smaller
chunks and the problem disappears. Effectively, this is a
Hi,
On 02/24/2015 03:18 AM, Siarhei Siamashka wrote:
By adjusting the MMU translation table before restoring it
and by enabling the I-cache with branch prediction, we can
improve performance. The DRAM area (0x4000-0xC000)
becomes write-combine mapped and the BROM code becomes mapped
as
Hi,
On 02/24/2015 03:18 AM, Siarhei Siamashka wrote:
The FEL BROM code has the MMU enabled for some reason (while
I-cache and D-cache are disabled). Most likely the intention was
to get a somewhat better performance. Everything is mapped as
TEXCB=0 (strongly ordered), except for the
Hi,
On 02/24/2015 03:53 AM, Siarhei Siamashka wrote:
On Mon, 23 Feb 2015 20:44:10 +
Adam Sampson a...@offog.org wrote:
The tpr3 (timing skew) parameter is used in all supported versions of
the sunxi DRAM controller, but it was only enabled for sun4i in
Hi,
On 02/24/2015 03:18 AM, Siarhei Siamashka wrote:
This allows to measure the USB data transfer speed for performance
tuning purposes.
Signed-off-by: Siarhei Siamashka siarhei.siamas...@gmail.com
Looks good:
Acked-by: Hans de Goede hdego...@redhat.com
Regards,
Hans
---
fel.c | 38
Hi,
On 02/24/2015 03:18 AM, Siarhei Siamashka wrote:
This is needed to have feature parity with the normal boot mode,
where the L2EN bit in the CP15 Auxiliary Control Register is set
by the BROM code right from the start. And if L2EN is not set,
then the Linux system ends up booted with the L2
On Tue, 24 Feb 2015 18:11:22 +0100
Hans de Goede hdego...@redhat.com wrote:
Hi,
On 02/24/2015 03:18 AM, Siarhei Siamashka wrote:
This is needed to have feature parity with the normal boot mode,
where the L2EN bit in the CP15 Auxiliary Control Register is set
by the BROM code right from
On Wednesday, February 25, 2015 at 12:51:13 AM UTC+11, Al Thomas wrote:
Host RTS must be asserted at the end of the reset pulse and for 30ms after
to get the device to assert its RTS (our CTS). Since I check for CTS
before sending this causes the program to time out.
The timing is
This was just posted on the allwinner github account:
https://github.com/allwinner-zh/media-codec
This contains:
https://github.com/allwinner-zh/media-codec/blob/master/sunxi-cedarx/LIBRARY/CODEC/VIDEO/DECODER/libvdecoder.so
This binary contains symbols from both ffmpeg (LGPL, but
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