Hi,
On 27-01-16 09:34, Chen-Yu Tsai wrote:
On the A83T and H3, the SID block is at a different address.
Furthurmore, the e-fuses are at an offset of 0x200 within the
hardware's address space.
Signed-off-by: Chen-Yu Tsai
Thanks, applied to my tree and this will go out with the
next pull-req.
On Tue, Mar 08, 2016 at 12:15:15PM +0100, Boris Brezillon wrote:
> Document dmas and dma-names properties.
>
> Signed-off-by: Boris Brezillon
> ---
> Documentation/devicetree/bindings/mtd/sunxi-nand.txt | 4
> 1 file changed, 4 insertions(+)
Acked-by: Rob Herring
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Changes in v2:
- Renamed "char *dev" to "char *dev_arg", to make it clearer that we're working
on the device argument. Use strspn(dev_arg,...) instead of strspn(argv[1],...)
Changes in v3:
- Protect against segfault when trying to access non-existant argv[2]
- Moved "handle == NULL" error handle
This patch adds a device node for the Reduced Serial Bus (RSB)
controller and the defacto pinmux setting to the A83T dtsi.
Since there is only one possible pinmux setting for RSB, just
set it in the dtsi.
Signed-off-by: Vishnu Patekar
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 21 +
On Wed, Mar 16, 2016 at 10:19 PM, Hans de Goede wrote:
> u-boot uses the kernel as the canonical source for its sunxi dts files
> and u-boot needs these.
>
> Signed-off-by: Hans de Goede
Acked-by: Chen-Yu Tsai
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On Wed, Mar 09, 2016 at 11:50:11AM +0100, Maxime Ripard wrote:
> The AXP209 PMIC has a bunch of GPIOs accessible, that are usually used to
> control LEDs or backlight.
>
> Add a driver for them
>
> Signed-off-by: Maxime Ripard
> ---
> .../devicetree/bindings/gpio/gpio-axp209.txt | 30 +++
On Thu, 17 Mar 2016 00:56:40 +0100
Bert Lindner wrote:
> On 2016-03-16 18:42, Marc Zyngier wrote:
> > On 16/03/16 15:10, Bert Lindner wrote:
> >> On 2016-03-16 14:10, Andreas Färber wrote:
> >>> Am 16.03.2016 um 13:09 schrieb Robin Murphy:
> On 16/03/16 11:39, Marc Zyngier wrote:
> > On
On 16/03/16 12:09, Robin Murphy wrote:
> On 16/03/16 11:39, Marc Zyngier wrote:
>> On 16/03/16 11:19, Bert Lindner wrote:
>>> Hi,
>>>
>>> Hopefully this is the correct place and way to report this.
>>>
>>> For the board sun7i-a20-olinuxino-lime2, there seems to be a problem
>>> with the eth0 PHY in
On Saturday, March 19, 2016 5:43:52 PM CDT Dennis Gilmore wrote:
> Hans,
>
> What is the status of this patch?
>
> Dennis
With the patch applied building for Cubietruck_plus fails with
ld.bfd -pie --gc-sections -Bstatic -Ttext 0x4a00 -o u-boot -T u-
boot.lds arch/arm/cpu/armv7/start.o
Hello,
This is v4 of series which adds further support for A83T, mainly adds clock
support.Also adds R_PIO, PRCM related clocks, mmc, rsb support.
A83T difference in short:
R_PIO is slightly different from A23 r_pio. AHB1 has different parents as
compared to a31-ahb1, APB1 has different dividers.
Hans,
What is the status of this patch?
Dennis
On Wednesday, January 27, 2016 4:34:44 PM CDT Chen-Yu Tsai wrote:
> Cubietruck Plus is a A83T/H8 based development board. The board has
> standard DDR3 SDRAM, AXP818 PMIC/codec, SD/MMC, eMMC, USB 2.0 host
> via HSIC USB Hub, USB OTG, SATA via USB br
On 16/03/16 11:19, Bert Lindner wrote:
> Hi,
>
> Hopefully this is the correct place and way to report this.
>
> For the board sun7i-a20-olinuxino-lime2, there seems to be a problem
> with the eth0 PHY in mainline kernel 4.5.0 that developed since
> 4.5.0-rc7. Ethernet does not work, although e
On Thu, 2016-03-17 at 00:04 +0800, Vishnu Patekar wrote:
> This patch adds Kconfig for sunxi clocks.
> Currently, only sun8i-apb0 and sun9i-cpus clocks are added.
> It'll help to use common clocks across different SOCs.
> We can switch to kconfig for other clocks in future.
>
> Signed-off-by: Vish
On 2016-03-16 14:10, Andreas Färber wrote:
Am 16.03.2016 um 13:09 schrieb Robin Murphy:
On 16/03/16 11:39, Marc Zyngier wrote:
On 16/03/16 11:19, Bert Lindner wrote:
Hopefully this is the correct place and way to report this.
The main discussion is on netdev list actually, CC'ed.
For the b
On Thu, Mar 17, 2016 at 12:04:25AM +0800, Vishnu Patekar wrote:
> AHB1 on A83T is similar to ahb1 on A31, except parents are different.
> clock index 0b1x is PLL6.
>
> Signed-off-by: Vishnu Patekar
> Acked-by: Chen-Yu Tsai
> Acked-by: Rob Herring
> ---
> Documentation/devicetree/bindings/clock
Changes in v2:
- Renamed "char *dev" to "char *dev_arg", to make it clearer that we're working
on the device argument. Use strspn(dev_arg,...) instead of strspn(argv[1],...)
Changes in v3:
- Protect against segfault when trying to access non-existant argv[2]
- Moved "handle == NULL" error handle
On Sat, Mar 12, 2016 at 7:44 PM, Hans de Goede wrote:
> pinctrl-sun8i-a33.c (and the dts) declare only 2 interrupt banks,
> where as the closely related a23 has 3 banks. This matches with the
> datasheet for the A33 where only interrupt banks B and G are specified
> where as the A23 has banks A,
Hello Bernhard,
Thanks, this is clearly a useful feature.
On Wed, 16 Mar 2016 16:43:18 +0100
Bernhard Nortmann wrote:
> See https://github.com/linux-sunxi/sunxi-tools/issues/37
>
> The patch introduces a "--dev" (-d) option to specify the
> desired FEL device. This is useful if multiple target
mmc clocks are compatible with that of earlier sun8i socs.
This adds mmc0, mmc1, and mmc2 clock nodes for A83T.
Signed-off-by: Vishnu Patekar
Acked-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 30 ++
1 file changed, 30 insertions(+)
diff --git a/arch/arm
Changes in v2:
- Renamed "char *dev" to "char *dev_arg", to make it clearer that we're working
on the device argument. Use strspn(dev_arg,...) instead of strspn(argv[1],...)
Changes in v3:
- Protect against segfault when trying to access non-existant argv[2]
- Moved "handle == NULL" error handle
This patch adds support for Sinovoip BPI-M3 A83T based board.
It has 2G LPDDR3, UART, ethernet, USB, HDMI, USB Sata, MIPI DSI,
mic, AP6212 Wifi, etc on it.
It is paired with AXP813 PMIC which is almost same as AXP818.
Signed-off-by: Vishnu Patekar
---
arch/arm/boot/dts/Makefile
Hi,
On 14-03-16 07:59, Chen-Yu Tsai wrote:
On Sat, Mar 12, 2016 at 4:12 AM, Hans de Goede wrote:
The minium voltage of 1800mV is a copy and paste error from the axp20x
regulator info. The correct minimum voltage for the ldo_io regulators
on the axp22x is 700mV.
Signed-off-by: Hans de Goede
APB1 is similar to sun4i-a10-apb0-clk, except different dividers.
This adds support for apb1 on A83T.
Signed-off-by: Vishnu Patekar
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/clock/sunxi.txt | 1 +
drivers/clk/sunxi/clk-sunxi.c | 13 +
2 files
Am 17.03.2016 um 13:55 schrieb Bernhard Nortmann:
I can confirm/reproduce this behaviour on my A20 when accessing the
SID register. Interesting enough, the bytes that actually do get read
(i.e. end up != 0) are "correct", as if the aw_usb_read() somehow
truncates everything down to single-byt
Hi Maxime,
> IIRC, in order to have shared controls, you just needed to share the
> controls structure.
Yeah. I did this and it actually works in a way, but in doesn't do all that I
want.
There are two different kinds of sharing I mean:
The one kind with the controls structure causes the contr
Hi Mark,
my question is whether it's possible to group together the left and right
channel into one selem, and also if it's possible to reuse volumes then. For
example:
For sun4i-codec Mic there's right now:
- Left Mixer Mic1 Playback Switch
- Left Mixer Mic2 Playback Switch
- Right Mixer Mic1
Hi,
Hopefully this is the correct place and way to report this.
For the board sun7i-a20-olinuxino-lime2, there seems to be a problem
with the eth0 PHY in mainline kernel 4.5.0 that developed since
4.5.0-rc7. Ethernet does not work, although eth0 is reported:
root@lime2-079f:~# ip a l eth0
2:
Hi,
On Fri, Mar 18, 2016 at 5:44 PM, Andre Przywara wrote:
> From: Jens Kuske
>
> Currently, the sunxi clock driver gets the name for the base factor clock
> of divs clocks from the name field in factors_data. This prevents reusing
> of the factor clock for clocks with same properties, but diffe
# insmod /lib/modules/3.4.39/mali.ko
[ 315.790108] mali_platform_init(184): get ahb_mali handle success!
[ 315.797536] mali_platform_init(192): get mali handle success!
[ 315.803983] mali_platform_init(199): get ve_pll handle success!
[ 315.810945] mali_platform_init(206): set mali clock source
On Sat, Mar 19, 2016 at 3:53 PM, Hans de Goede wrote:
> The Dserve DSRV9703C is a 9.7" A10 tablet with a 1024x768 ips LCD,
> 1G RAM, 4GB flash, a Focaltech FT5406EE8 touchscreen and rtl8188ctv wifi.
>
> Signed-off-by: Hans de Goede
Acked-by: Chen-Yu Tsai
> ---
> arch/arm/boot/dts/Makefile
See https://github.com/linux-sunxi/sunxi-tools/issues/37
The patch introduces a "--dev" (-d) option to specify the
desired FEL device. This is useful if multiple target devices
are connected to the same host.
Signed-off-by: Bernhard Nortmann
---
fel.c | 101 +
u-boot uses the kernel as the canonical source for its sunxi dts files
and u-boot needs these.
Signed-off-by: Hans de Goede
---
arch/arm/boot/dts/sun6i-a31s-primo81.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/sun6i-a31s-primo81.dts
b/arch/arm/boot/dts/sun6i
On 16/03/16 15:10, Bert Lindner wrote:
> On 2016-03-16 14:10, Andreas Färber wrote:
>> Am 16.03.2016 um 13:09 schrieb Robin Murphy:
>>> On 16/03/16 11:39, Marc Zyngier wrote:
On 16/03/16 11:19, Bert Lindner wrote:
> Hopefully this is the correct place and way to report this.
>>
>> The main
From: Marcus Cooper
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/sun7i-a20-itead-core-evb.dts | 316 ++
configs/Itead_Core_EVB_defconfig | 22 +++
3 files changed, 339 insertions(+)
create mode 100644 arch/arm/dts/sun7i-a20-itead-core
Hi,
On 15-03-16 18:47, codekip...@gmail.com wrote:
From: Marcus Cooper
Add dts and defconfig for the multi board device based on the
Allwinner A20 SoC. It contains the A20 Itead Core module and a
base board for the external interfaces.
The core module comes with 4GB NAND and 1GB DDR RAM. As t
The axp209 ldo4 regulator has a hole at (skips) 2600 mV and 2900 mV, fix
its range table to match.
Fixes: 13d57e64352a ("regulator: axp20x: Use linear voltage ranges for AXP20X
LDO4")
Signed-off-by: Hans de Goede
Acked-by: Chen-Yu Tsai
---
Changes in v2:
-Add Fixes, Acked-by Chen-Yu tags
---
d
From: Jens Kuske
Currently, the sunxi clock driver gets the name for the base factor clock
of divs clocks from the name field in factors_data. This prevents reusing
of the factor clock for clocks with same properties, but different name.
This commit makes the divs setup function try to get a nam
A83T Boards BPI-m3 and Allwinner H8Homletv2 boards use PF6 as
Card Detect pin., so use PF6 as reference design CD pin in dtsi.
Signed-off-by: Vishnu Patekar
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi
b/arch/
Hi,
On 18-03-16 18:48, Maxime Ripard wrote:
On Thu, Mar 17, 2016 at 02:28:03PM +0800, Chen-Yu Tsai wrote:
On Wed, Mar 16, 2016 at 10:19 PM, Hans de Goede wrote:
u-boot uses the kernel as the canonical source for its sunxi dts files
and u-boot needs these.
Signed-off-by: Hans de Goede
Acke
The minium voltage of 1800mV is a copy and paste error from the axp20x
regulator info. The correct minimum voltage for the ldo_io regulators
on the axp22x is 700mV.
Fixes: 1b82b4e4f954 ("regulator: axp20x: Add support for AXP22X regulators")
Signed-off-by: Hans de Goede
Acked-by: Chen-Yu Tsai
--
Now that we have a driver for the R_PIO controller,
add the corresponding device node to the dtsi.
Signed-off-by: Vishnu Patekar
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t.dtsi
b/arch/arm/boot/dts/sun8i-a8
Can't be this workaround that eliminates the problem is used until a real fix
is possible?
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On 2016-03-16 18:42, Marc Zyngier wrote:
On 16/03/16 15:10, Bert Lindner wrote:
On 2016-03-16 14:10, Andreas Färber wrote:
Am 16.03.2016 um 13:09 schrieb Robin Murphy:
On 16/03/16 11:39, Marc Zyngier wrote:
On 16/03/16 11:19, Bert Lindner wrote:
Hopefully this is the correct place and way to
Hi Thierry,
Can you please apply this patch?
It's completely independent from the rest of the series.
Thanks,
Boris
On Mon, 16 Nov 2015 09:56:24 +0100
Boris Brezillon wrote:
> Commit 5c31252c4a86 ("pwm: Add the pwm_is_enabled() helper") introduced a
> new function to test whether a PWM device
AHB1 on A83T is similar to ahb1 on A31, except parents are different.
clock index 0b1x is PLL6.
Signed-off-by: Vishnu Patekar
Acked-by: Chen-Yu Tsai
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/clock/sunxi.txt | 1 +
drivers/clk/sunxi/clk-sunxi.c | 76 ++
See https://github.com/linux-sunxi/sunxi-tools/issues/37
The patch was originally inspired by
https://github.com/NextThingCo/sunxi-tools/commit/16386a7
and
https://github.com/NextThingCo/sunxi-tools/commit/47bafaf
It introduces a "--dev" (-d) option to specify the desired FEL
device. This is usef
From: Yassin Jaffer
This patch adds a composite clock type consisting of
a clock gate, mux, configurable dividers, and a reset control.
Signed-off-by: Yassin Jaffer
---
Documentation/devicetree/bindings/clock/sunxi.txt | 1 +
drivers/clk/sunxi/Makefile| 1 +
drivers
This picks up a long-standing pull request from the github repo that seemingly
noone cared to take forward to the mailing list. The one-line change looks sane,
and reportedly is needed for proper operation when issuing repeated sunxi-fel
commands on Mac OS X. NextThingCo also uses it in their
https
The Dserve DSRV9703C is a 9.7" A10 tablet with a 1024x768 ips LCD,
1G RAM, 4GB flash, a Focaltech FT5406EE8 touchscreen and rtl8188ctv wifi.
Signed-off-by: Hans de Goede
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/sun4i-a10-dserve-dsrv9703c.dts | 281 +
A83T mmc is compatible with earliers sunxi socs.
This adds mmc0, mmc1, and mmc2 controller nodes for A83T.
Signed-off-by: Vishnu Patekar
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 57 +++
1 file changed, 57 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t
On Tue, 8 Mar 2016 12:15:14 +0100
Boris Brezillon wrote:
> The sunxi NAND controller is able to pipeline ECC operations only when
> operated in DMA mode, which improves a lot NAND throughput while keeping
> CPU usage low.
>
> Signed-off-by: Boris Brezillon
> ---
> drivers/mtd/nand/sunxi_nand.
This enables mmc0.
Signed-off-by: Vishnu Patekar
Tested-by: LABBE Corentin
---
arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t-allwinner-h8homlet-v2.dts
b/arch/arm/boot/dts/sun8i-a83t-allwinner
Hello Linus,
On Thu, Mar 17, 2016 at 10:51 PM, Linus Walleij
wrote:
> On Wed, Mar 16, 2016 at 5:04 PM, Vishnu Patekar
> wrote:
>
>> The A83T has R_PIO pin controller, it's same as A23, execpt A83T
>> interrupt bit is 6th and A83T has one extra pin PL12.
>>
>> Signed-off-by: Vishnu Patekar
>> Ac
This adds A83T PRCM related clocks, clock resets.
As a83t apb0 gates clock support is added earlier, this enables it.
Apart from apb0 gates, other added clocks are compatible with
earlier sun8i socs.
Signed-off-by: Vishnu Patekar
Acked-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun8i-a83t.dtsi | 4
This patch adds Kconfig for sunxi clocks.
Currently, only sun8i-apb0 and sun9i-cpus clocks are added.
It'll help to use common clocks across different SOCs.
We can switch to kconfig for other clocks in future.
Signed-off-by: Vishnu Patekar
---
drivers/clk/Kconfig| 1 +
drivers/clk/sunxi/
Am Montag, 25. Januar 2016 05:51:02 UTC+1 schrieb Siarhei Siamashka:
Doing certain operations may need uploading and executing code
on the device. For example, such operations right now are
reading/writing ARM CP15 coprocessor registers. Uploading the
code to the device is naturally overwriting s
Am Montag, 25. Januar 2016 05:51:02 UTC+1 schrieb Siarhei Siamashka:
The read/write operations done by FEL are not suitable for accessing
hardware registers. For example, trying to read a SID value using
the "read" or "hexdump" commands results in the following:
$ sunxi-fel hexdump 0x01c23800
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