On Tue, Sep 26, 2017 at 5:56 PM, Maxime Ripard
wrote:
> Hi,
>
> On Tue, Sep 26, 2017 at 06:59:09AM +, Chen-Yu Tsai wrote:
>> On systems with 2 TCONs such as the A31, it is possible to demux the
>> output of the TCONs to one encoder.
>>
>> Add support for this
On Tue, Sep 26, 2017 at 5:32 PM, Maxime Ripard
wrote:
> On Tue, Sep 26, 2017 at 06:59:08AM +, Chen-Yu Tsai wrote:
>> The HDMI DDC clock found in the CCU is the parent of the actual DDC
>> clock within the HDMI controller. That clock is also named "hdmi-ddc".
Hi Stefan,
[auto build test WARNING on next-20170926]
[also build test WARNING on v4.14-rc2]
[cannot apply to linus/master robh/for-next v4.14-rc2 v4.14-rc1 v4.13]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day
Hi Stefan,
[auto build test ERROR on next-20170926]
[also build test ERROR on v4.14-rc2]
[cannot apply to linus/master robh/for-next v4.14-rc2 v4.14-rc1 v4.13]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci
On Tue, Sep 26, 2017 at 8:17 PM, Quentin Schulz
wrote:
> From: Maxime Ripard
>
> The AXP813 PMIC is used with some Allwinner SoCs. Create a dtsi to
> include in each board embedding it.
>
> Signed-off-by: Quentin Schulz
On Tue, Sep 26, 2017 at 01:17:05PM +, Quentin Schulz wrote:
> Hi Maxime,
>
> On 26/09/2017 15:01, Maxime Ripard wrote:
> > On Tue, Sep 26, 2017 at 12:17:13PM +, Quentin Schulz wrote:
> >> Instead of using a function to retrieve each pin's correct control
> >> register, use drv_data within
On 26/09/2017 15:27, Maxime Ripard wrote:
> On Tue, Sep 26, 2017 at 01:08:21PM +, Quentin Schulz wrote:
>> Hi Maxime,
>>
>> On 26/09/2017 15:00, Maxime Ripard wrote:
>>> On Tue, Sep 26, 2017 at 12:17:12PM +, Quentin Schulz wrote:
+static const struct axp20x_desc_pin axp209_pins[] = {
On Tue, Sep 26, 2017 at 01:08:21PM +, Quentin Schulz wrote:
> Hi Maxime,
>
> On 26/09/2017 15:00, Maxime Ripard wrote:
> > On Tue, Sep 26, 2017 at 12:17:12PM +, Quentin Schulz wrote:
> >> +static const struct axp20x_desc_pin axp209_pins[] = {
> >> + AXP20X_PIN(AXP20X_PINCTRL_PIN(0,
On Tue, Sep 26, 2017 at 12:52:19PM +, Quentin Schulz wrote:
> Before this patch, forgetting to put a thermal-zones DT node would
> result in the driver failing to probe.
>
> It should be perfectly acceptable to have the driver probe even if no
> thermal-zones DT is found. However, it
Hi Maxime,
On 26/09/2017 15:01, Maxime Ripard wrote:
> On Tue, Sep 26, 2017 at 12:17:13PM +, Quentin Schulz wrote:
>> Instead of using a function to retrieve each pin's correct control
>> register, use drv_data within pinctrl_pin_desc to store the ctrl reg.
>>
>> Remove axp20x_gpio_get_reg
On Tue, Sep 26, 2017 at 12:17:18PM +, Quentin Schulz wrote:
> From: Maxime Ripard
>
> The AXP813 PMIC is used with some Allwinner SoCs. Create a dtsi to
> include in each board embedding it.
>
> Signed-off-by: Quentin Schulz
On Tue, Sep 26, 2017 at 12:17:17PM +, Quentin Schulz wrote:
> As pinctrl and GPIO driver now supports AXP813, add a cell for it.
>
> Signed-off-by: Quentin Schulz
> ---
> drivers/mfd/axp20x.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git
On Tue, Sep 26, 2017 at 12:17:16PM +, Quentin Schulz wrote:
> The AXP813 has only two GPIOs. GPIO0 can either be used as a GPIO, an
> LDO regulator or an ADC. GPIO1 can be used either as a GPIO or an LDO
> regulator.
>
> Moreover, the status bit of the GPIOs when in input mode is not offset
>
Hi Stefan,
On 31 August 2017 at 15:20, Stefan Mavrodiev wrote:
> On 08/30/2017 05:37 PM, Maxime Ripard wrote:
>>
>> Hi,
>>
>> On Mon, Aug 28, 2017 at 09:32:42AM +0300, Stefan Mavrodiev wrote:
>>>
>>> From revision J the board uses new phy chip LAN8710. Compared
>>>
On Tue, Sep 26, 2017 at 8:59 PM, Quentin Schulz
wrote:
> Hi Maxime,
>
> On 26/09/2017 14:55, Maxime Ripard wrote:
>> On Tue, Sep 26, 2017 at 12:17:11PM +, Quentin Schulz wrote:
>>> To prepare the driver for the upcoming pinctrl features, move the GPIO
>>>
Hi Maxime,
On 26/09/2017 15:00, Maxime Ripard wrote:
> On Tue, Sep 26, 2017 at 12:17:12PM +, Quentin Schulz wrote:
>> +static const struct axp20x_desc_pin axp209_pins[] = {
>> +AXP20X_PIN(AXP20X_PINCTRL_PIN(0, "GPIO0"),
>> + AXP20X_FUNCTION(0x0, "gpio_out"),
>> +
On Tue, Sep 26, 2017 at 12:17:13PM +, Quentin Schulz wrote:
> Instead of using a function to retrieve each pin's correct control
> register, use drv_data within pinctrl_pin_desc to store the ctrl reg.
>
> Remove axp20x_gpio_get_reg and replace every occurrence by a get from
> drv_data.
Why
On Tue, Sep 26, 2017 at 12:17:12PM +, Quentin Schulz wrote:
> +static const struct axp20x_desc_pin axp209_pins[] = {
> + AXP20X_PIN(AXP20X_PINCTRL_PIN(0, "GPIO0"),
> +AXP20X_FUNCTION(0x0, "gpio_out"),
> +AXP20X_FUNCTION(0x2, "gpio_in"),
> +
Hi Maxime,
On 26/09/2017 14:55, Maxime Ripard wrote:
> On Tue, Sep 26, 2017 at 12:17:11PM +, Quentin Schulz wrote:
>> To prepare the driver for the upcoming pinctrl features, move the GPIO
>> driver AXP209 from GPIO to pinctrl subsystem.
>>
>> Signed-off-by: Quentin Schulz
On Tue, Sep 26, 2017 at 12:17:11PM +, Quentin Schulz wrote:
> To prepare the driver for the upcoming pinctrl features, move the GPIO
> driver AXP209 from GPIO to pinctrl subsystem.
>
> Signed-off-by: Quentin Schulz
I'm not sure we actually need to do this.
This driver has a get_temp function used by the thermal framework that
uses pm functions.
However, the driver isn't registered in pm before it is registered in
thermal framework, resulting in the pm_resume not being called and thus
the IP not enabled.
When the IP is disabled, the raw temp value
Before this patch, forgetting to put a thermal-zones DT node would
result in the driver failing to probe.
It should be perfectly acceptable to have the driver probe even if no
thermal-zones DT is found. However, it shouldn't want to fail if the
thermal registering fail for any other reason
This board has an AXP813 PMIC so let's include its dtsi.
Signed-off-by: Quentin Schulz
---
arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-a83t-tbs-a711.dts
Instead of using a function to retrieve each pin's correct control
register, use drv_data within pinctrl_pin_desc to store the ctrl reg.
Remove axp20x_gpio_get_reg and replace every occurrence by a get from
drv_data.
Signed-off-by: Quentin Schulz
---
This driver used to do only GPIO features of the GPIOs in X-Powers
AXP20X. Now that we have migrated everything to the pinctrl subsystem
and added pinctrl features, rename everything related to pinctrl from
gpio to pctl to ease the understanding of differences between GPIO
and pinctrl features.
The AXP813 has only two GPIOs. GPIO0 can either be used as a GPIO, an
LDO regulator or an ADC. GPIO1 can be used either as a GPIO or an LDO
regulator.
Moreover, the status bit of the GPIOs when in input mode is not offset
by 4 unlike the AXP209.
Signed-off-by: Quentin Schulz
To prepare the driver for the upcoming pinctrl features, move the GPIO
driver AXP209 from GPIO to pinctrl subsystem.
Signed-off-by: Quentin Schulz
---
Documentation/devicetree/bindings/gpio/gpio-axp209.txt | 30 +-
The AXP209 and AXP813 PMICs have several pins (respectively 3 and 2) that can
be used either as GPIOs or for other purposes (ADC or LDO here).
We already have a GPIO driver for the GPIO use of those pins on the AXP209.
Let's "upgrade" this driver to support all the functions these pins can have.
As pinctrl and GPIO driver now supports AXP813, add a cell for it.
Signed-off-by: Quentin Schulz
---
drivers/mfd/axp20x.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/mfd/axp20x.c b/drivers/mfd/axp20x.c
index 336de66..a457528 100644
---
From: Maxime Ripard
The AXP813 PMIC is used with some Allwinner SoCs. Create a dtsi to
include in each board embedding it.
Signed-off-by: Quentin Schulz
---
arch/arm/boot/dts/axp813.dtsi | 58
To prepare for patches that will add support for a new PMIC that has a
different GPIO input status register, add a gpio_status_offset within
axp20x_pctl structure and use it.
Signed-off-by: Quentin Schulz
---
drivers/pinctrl/pinctrl-axp209.c | 4 +++-
1 file
The X-Powers AXP209 has 3 GPIOs. GPIO0/1 can each act either as a GPIO,
an ADC or a LDO regulator. GPIO2 can only act as a GPIO.
This adds the pinctrl features to the driver so GPIO0/1 can be used as
ADC or LDO regulator.
Signed-off-by: Quentin Schulz
---
This board has an AXP813 PMIC so let's include its dtsi.
Signed-off-by: Quentin Schulz
---
arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sun8i-a83t-bananapi-m3.dts
Hi,
On 26 September 2017 at 21:39, Jonathan Liu wrote:
> This fixes a kernel oops when unloading the driver due to usb_put_phy
> being called after usb_phy_generic_unregister when the device is
> detached. Calling usb_phy_generic_unregister causes x->dev->driver to
> be NULL in
This fixes a kernel oops when unloading the driver due to usb_put_phy
being called after usb_phy_generic_unregister when the device is
detached. Calling usb_phy_generic_unregister causes x->dev->driver to
be NULL in usb_put_phy and results in a NULL pointer dereference.
As we are now explicitly
On Tue, Sep 26, 2017 at 06:59:17AM +, Chen-Yu Tsai wrote:
> The HDMI controller found in the A31 SoCs is slightly different
> from the one already supported, which is found in the A10s:
>
> - Need different initial values for the PLL related registers
>
> - Different behavior of the DDC
On Tue, Sep 26, 2017 at 06:59:16AM +, Chen-Yu Tsai wrote:
> The DDC block for the HDMI controller is different on the A31.
>
> This patch adds the register definitions.
>
> Signed-off-by: Chen-Yu Tsai
Acked-by: Maxime Ripard
Maxime
--
On Tue, Sep 26, 2017 at 06:59:15AM +, Chen-Yu Tsai wrote:
> The HDMI controller found in earlier Allwinner SoCs have slight
> differences between the A10, A10s, and the A31:
>
> - Need different initial values for the PLL related registers
>
> - Different behavior of the DDC and TMDS
On Tue, Sep 26, 2017 at 06:59:12AM +, Chen-Yu Tsai wrote:
> Allwinner SoCs typically have two PLLs reserved for video related usage.
> At the moment we only support using the first one to feed the HDMI
> transmitter block's TMDS clock.
>
> Let the HDMI encoder's TMDS clock go through all of
On Tue, Sep 26, 2017 at 06:59:11AM +, Chen-Yu Tsai wrote:
> The HDMI driver is written with readl/writel I/O to the registers.
> However, to support the A31 variant, which has a different layout
> for the DDC registers, it was recommended to use regfields to have
> a cleaner implementation. To
On Tue, Sep 26, 2017 at 06:59:10AM +, Chen-Yu Tsai wrote:
> The HDMI driver enables the bus and mod clocks in the bind function, but
> does not disable them if it then bails our due to any errors. Neither
> does it disable the clocks in the unbind function.
>
> Fix this by adding a proper
Hi,
On Tue, Sep 26, 2017 at 06:59:09AM +, Chen-Yu Tsai wrote:
> On systems with 2 TCONs such as the A31, it is possible to demux the
> output of the TCONs to one encoder.
>
> Add support for this for the A31.
>
> Signed-off-by: Chen-Yu Tsai
> ---
>
On Tue, Sep 26, 2017 at 06:59:07AM +, Chen-Yu Tsai wrote:
> The 2x outputs of the 2 video PLL clocks are directly used by the
> HDMI controller block.
>
> Export them so they can be referenced in the device tree.
>
> Fixes: c6e6c96d8fa6 ("clk: sunxi-ng: Add A31/A31s clocks")
> Signed-off-by:
On Tue, Sep 26, 2017 at 02:36:20AM +, Chen-Yu Tsai wrote:
> Until now we were not providing a way to read back the status of our
> reset controls. Consumers had no real way to be certain whether a
> peripheral was held in reset or not.
>
> Implement the status callback to complete the API
The HDMI driver is written with readl/writel I/O to the registers.
However, to support the A31 variant, which has a different layout
for the DDC registers, it was recommended to use regfields to have
a cleaner implementation. To use regfields, we need to create an
underlying regmap.
This patch
The HDMI controller found in earlier Allwinner SoCs have slight
differences between the A10, A10s, and the A31:
- Need different initial values for the PLL related registers
- Different behavior of the DDC and TMDS clocks
- Different register layout for the DDC portion
- Separate DDC
The HDMI controller in the A31 SoC is slightly different from the
earlier version. In addition to the TMDS clock and DDC controls,
this version now takes a second DDC clock input.
Add a compatible string for it, and add the DDC clock input to the
list of clocks required.
Signed-off-by: Chen-Yu
On systems with 2 TCONs such as the A31, it is possible to demux the
output of the TCONs to one encoder.
Add support for this for the A31.
Signed-off-by: Chen-Yu Tsai
---
drivers/gpu/drm/sun4i/sun4i_tcon.c | 61 ++
1 file changed, 61
The HDMI driver enables the bus and mod clocks in the bind function, but
does not disable them if it then bails our due to any errors. Neither
does it disable the clocks in the unbind function.
Fix this by adding a proper error path to the bind function, and
clk_disable_unprepare calls to the
The HDMI controller found in the A31 SoCs is slightly different
from the one already supported, which is found in the A10s:
- Need different initial values for the PLL related registers
- Different behavior of the DDC and TMDS clocks
- Different register layout for the DDC portion
-
This patch adds a macro regmap_field_read_poll_timeout that works
similar to the readx_poll_timeout defined in linux/iopoll.h, except
that this can also return the error value returned by a failed
regmap_field_read.
Signed-off-by: Chen-Yu Tsai
---
include/linux/regmap.h | 39
Allwinner SoCs typically have two PLLs reserved for video related usage.
At the moment we only support using the first one to feed the HDMI
transmitter block's TMDS clock.
Let the HDMI encoder's TMDS clock go through all of its parents when
calculating possible clock rates. This allows usage of
Hi everyone,
This is v2 of my A31 HDMI support series. As it's been some time
since the first version and I've rebased my series a couple times
to merge newer changes done by others, the changelog might not be
complete.
Changes since v1:
- Core changes to sun4i-drm to support two display
The HDMI DDC clock found in the CCU is the parent of the actual DDC
clock within the HDMI controller. That clock is also named "hdmi-ddc".
Rename the one in the CCU to "hdmi-ddc-parent". This makes more sense
than renaming the one in the HDMI controller to something else.
Fixes: c6e6c96d8fa6
The DDC block for the HDMI controller is different on the A31.
This patch adds the register definitions.
Signed-off-by: Chen-Yu Tsai
---
drivers/gpu/drm/sun4i/sun4i_hdmi.h | 31 +++
1 file changed, 31 insertions(+)
diff --git
The 2x outputs of the 2 video PLL clocks are directly used by the
HDMI controller block.
Export them so they can be referenced in the device tree.
Fixes: c6e6c96d8fa6 ("clk: sunxi-ng: Add A31/A31s clocks")
Signed-off-by: Chen-Yu Tsai
---
drivers/clk/sunxi-ng/ccu-sun6i-a31.h
Now that we support the HDMI controller on the A31 SoC, we can add it
to the device tree.
This adds a device node for the HDMI controller, and the of_graph nodes
connecting it to the 2 TCONs.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/boot/dts/sun6i-a31.dtsi | 55
All the A31/A31s devices I own have some kind of HDMI connector wired
to the dedicated HDMI pins on the SoC:
- A31 Hummingbird (standard HDMI connector, display already enabled)
- Sinlinx SinA31s (standard HDMI connector)
- MSI Primo81 tablet (micro HDMI connector)
Enable the display
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