Hi,
On Fri, Mar 09, 2018 at 07:19:33AM +0100, Jernej Škrabec wrote:
> Hi,
>
> Dne petek, 09. marec 2018 ob 01:44:55 CET je Ondřej Jirman napisal(a):
> > Hi,
> >
> > I've debugged this further and it seems that the code has incorrect
> > assumptions. See docs for mode_set_nofb.
> >
> >
Hi,
Dne petek, 09. marec 2018 ob 01:44:55 CET je Ondřej Jirman napisal(a):
> Hi,
>
> I've debugged this further and it seems that the code has incorrect
> assumptions. See docs for mode_set_nofb.
>
> https://elixir.bootlin.com/linux/v4.16-rc4/source/include/drm/drm_modeset_he
>
Hi,
On Tue, 6 Mar 2018 17:14:18 +0200
Sakari Ailus wrote:
> Hi Yong,
>
> Thanks for the patchset; please see my comments below.
>
> On Tue, Mar 06, 2018 at 10:16:02AM +0800, Yong Deng wrote:
> > Allwinner V3s SoC features two CSI module. CSI0 is used for MIPI
Hi,
I've debugged this further and it seems that the code has incorrect assumptions.
See docs for mode_set_nofb.
https://elixir.bootlin.com/linux/v4.16-rc4/source/include/drm/drm_modeset_helper_vtables.h#L209
I've added traces to a few functions that call clk_.*exclusive.*() functions,
and I
Hi Jernej,
On Thu, Mar 08, 2018 at 11:57:40PM +0100, Jernej Škrabec wrote:
> Hi,
>
> Dne četrtek, 08. marec 2018 ob 23:47:17 CET je Ondřej Jirman napisal(a):
> > Hi,
> >
> > On Thu, Mar 01, 2018 at 10:34:32PM +0100, Jernej Skrabec wrote:
> > > Currently exclusive TCON clock lock is never
Hi,
Dne četrtek, 08. marec 2018 ob 23:47:17 CET je Ondřej Jirman napisal(a):
> Hi,
>
> On Thu, Mar 01, 2018 at 10:34:32PM +0100, Jernej Skrabec wrote:
> > Currently exclusive TCON clock lock is never released, which, for
> > example, prevents changing resolution on HDMI.
> >
> > In order to fix
Hi,
On Thu, Mar 01, 2018 at 10:34:32PM +0100, Jernej Skrabec wrote:
> Currently exclusive TCON clock lock is never released, which, for
> example, prevents changing resolution on HDMI.
>
> In order to fix that, release clock when disabling TCON. TCON is always
> disabled first before new mode is
Hi,
Dne četrtek, 08. marec 2018 ob 15:15:39 CET je @lex napisal(a):
> These are my
> changes: https://gist.github.com/avafinger/40e7751f5d8e8fbe0225e3ad4c5da0bf
>
> On Thursday, March 8, 2018 at 10:57:13 AM UTC-3, @lex wrote:
> > Ok, will test Ondřej and your branch. This can take some time, I
Hi,
On 08/03/18 14:37, Rob Herring wrote:
> On Thu, Mar 8, 2018 at 3:09 AM, Andre Przywara wrote:
>> Hi,
>>
>> On 08/03/18 02:08, Rob Herring wrote:
>>> On Wed, Mar 07, 2018 at 02:07:18AM +, Andre Przywara wrote:
The PWM controllers found in the Allwinner A64, H5
On Thu, Mar 8, 2018 at 3:09 AM, Andre Przywara wrote:
> Hi,
>
> On 08/03/18 02:08, Rob Herring wrote:
>> On Wed, Mar 07, 2018 at 02:07:18AM +, Andre Przywara wrote:
>>> The PWM controllers found in the Allwinner A64, H5 and H6 SoCs are fully
>>> compatible to the PWM
These are my
changes: https://gist.github.com/avafinger/40e7751f5d8e8fbe0225e3ad4c5da0bf
On Thursday, March 8, 2018 at 10:57:13 AM UTC-3, @lex wrote:
>
> Ok, will test Ondřej and your branch. This can take some time, I think
> this weekend I can build and test both.
>
> But this raised some
在 2018-03-08四的 21:18 +0800,Icenowy Zheng写道:
> 在 2018-03-08四的 12:55 +0100,Marc Gonzalez写道:
> > On 08/03/2018 06:48, Icenowy Zheng wrote:
> >
> > > I'm trying to implement a driver for the quirky (DW) PCIe RC in
> > > the
> > > Allwinner H6 SoC.
> > >
> > > The quirk is that only the "dbi" space
Ok, will test Ondřej and your branch. This can take some time, I think
this weekend I can build and test both.
But this raised some questions:
a) How is this going to help you guys fix the stable 4.15.y ?
b) I applied the significant changes on DRM and sun4i (that i think would
fix) on my 4.15
在 2018-03-08四的 12:55 +0100,Marc Gonzalez写道:
> On 08/03/2018 06:48, Icenowy Zheng wrote:
>
> > I'm trying to implement a driver for the quirky (DW) PCIe RC in the
> > Allwinner H6 SoC.
> >
> > The quirk is that only the "dbi" space is always mapped, but at
> > the
> > same time only 64KiB of
Hi,
On 08/03/18 02:08, Rob Herring wrote:
> On Wed, Mar 07, 2018 at 02:07:18AM +, Andre Przywara wrote:
>> The PWM controllers found in the Allwinner A64, H5 and H6 SoCs are fully
>> compatible to the PWM controllers found in the A13 and H3.
>
> If fully compatible, then shouldn't there be a
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