Le 12/04/2014 06:25, zerat...@gmail.com a écrit :
Hi, I would like to know if, for an Olimex A20, there is some specific
hardware acceleration :
- jpeg decoding acceleration
- hash acceleration (such as sha1 or md5)
And if yes, does it need some manual configuration or specific
On 05/18/14 16:06, Hans de Goede wrote:
Hi Corentin,
While building the sunxi-devel branch of my personal repo, to
which I've added your sunxi-ss.c driver, I got the following warning:
WARNING: vmlinux.o(.data+0xa1654): Section mismatch in reference from the
variable sunxi_ss_driver to
On 05/26/14 04:17, Kenny MacDermid wrote:
Hello,
I just tried to build Hans sunxi-devel branch with the hardware crypto
code enabled. The build failed with:
undefined reference to `crypto_blkcipher_type'
I patched the Kconfig to make it compile, but maybe it should just be
added to the
On 06/10/14 08:53, Chen-Yu Tsai wrote:
Hi,
On Mon, Jun 9, 2014 at 6:59 PM, LABBE Corentin
clabbe.montj...@gmail.com wrote:
Add support for the Security System included in Allwinner SoC A20.
The Security System is a hardware cryptographic accelerator that support
AES/MD5/SHA1/DES/3DES/PRNG
+1,118 @@
+/*
+ * sunxi-ss.c - hardware cryptographic accelerator for Allwinner A20 SoC
+ *
+ * Copyright (C) 2013-2014 Corentin LABBE clabbe.montj...@gmail.com
+ *
+ * Support AES cipher with 128,192,256 bits keysize.
+ * Support MD5 and SHA1 hash algorithms.
+ * Support DES and 3DES
On 10/21/14 01:28, Vladimir Zapolskiy wrote:
Hello LABBE,
On 19.10.2014 17:16, LABBE Corentin wrote:
Add support for the Security System included in Allwinner SoC A20.
The Security System is a hardware cryptographic accelerator that support
AES/MD5/SHA1/DES/3DES/PRNG algorithms.
[]
+
+
On 01/28/15 23:42, Alejandro Mery wrote:
Hi, sorry for the inconvenient and most importantly, the silence. I was away
from a computer almost all day preparing my departure from DE this weekend.
(I really hate not been able to go to FOSDEM for the same reason)
On 28.01.2015 23:06,
hello
I am trying to add the CTR (counter) block cipher mode for AES on my Security
System driver.
When testing with the tcrypt module I got the following result:
[ 1256.986989] alg: skcipher: Test 1 failed on encryption for ctr-aes-sunxi-ss
[ 1256.987004] : 87 4d 61 91 b6 20 e3 26 1b
On 04/01/15 04:06, kevin.z.m...@gmail.com wrote:
Dear All,
About the SS module, there is some detail information.
There is some issues on the SS hardware module, the issues make the some
AES/DES/3DS algorithm be not available.
1. The byte order of the counter is wrong, make the result
Le 30/03/2015 20:08, Markus Stockhausen a écrit :
Von: linux-crypto-ow...@vger.kernel.org
[linux-crypto-ow...@vger.kernel.org]quot; im Auftrag von quot;Corentin
LABBE [clabbe.montj...@gmail.com]
Gesendet: Montag, 30. März 2015 19:59
An: linux-cry...@vger.kernel.org
Cc: linux-sunxi
,
kevin.z.m...@gmail.com
*From:* Corentin LABBE mailto:clabbe.montj...@gmail.com
Le 26/03/2015 19:31, Boris Brezillon a écrit :
Hi Corentin,
Here is a quick review, there surely are a lot of other things I didn't
spot.
On Mon, 16 Mar 2015 20:01:22 +0100
LABBE Corentin clabbe.montj...@gmail.com wrote:
Add support for the Security System included in Allwinner SoC
Le 23/05/2015 16:35, Boris Brezillon a écrit :
Hi Corentin,
On Sat, 23 May 2015 15:12:23 +0200
Corentin LABBE clabbe.montj...@gmail.com wrote:
Le 17/05/2015 10:45, Boris Brezillon a écrit :
Hi Corentin,
I started to review this new version, and I still think there's
something wrong
Le 15/05/2015 09:31, Maxime Ripard a écrit :
On Thu, May 14, 2015 at 02:58:58PM +0200, LABBE Corentin wrote:
The Security System is a hardware cryptographic accelerator that support
AES/MD5/SHA1/DES/3DES/PRNG algorithms.
It could be found on many Allwinner SoC.
This patch enable the Security
Le 15/05/2015 08:49, Herbert Xu a écrit :
On Thu, May 14, 2015 at 02:59:01PM +0200, LABBE Corentin wrote:
+err = crypto_ablkcipher_setkey(op-fallback, kkey, op-keylen);
+if (err != 0) {
+dev_err(ss-dev, Cannot set key on fallback\n);
+return -EINVAL;
+}
Le 22/05/2015 03:35, lyc.ac...@gmail.com a écrit :
hi,all,
which kernel branch support dm-crypt on a20 platform.
BR,
Lyric.
--
For dm-crypt all kernel have it.
But I think you speak about hardware accelerated ciphers and for this you need
the security system driver.
No kernel
Hello
I am working on some tools for checking the good working of crypto device (and
benching them).
One of the tool use cryptodev (http://cryptodev-linux.org/) for using the
kernel crypto API
(and so any hardware accelerated crypto).
The tool compare the results of an AES cipher via cryptodev
Le 22/12/2015 13:27, Andre Przywara a écrit :
> The length parameter in this dev_dbg() call is actually a size_t,
> so use the proper type to avoid warnings when compiling for 64-bit
> architectures.
>
> Signed-off-by: Andre Przywara
> ---
>
Le 08/01/2016 12:24, Andre Przywara a écrit :
> (resending to add linux-crypto, patches unchanged)
>
> Hi,
>
> these two patches provide a different approach to an issue I tried
> to fix lately [1].
> Instead of casting everything I now promote local types to size_t, so
> that the min3()
Le 22/02/2016 17:10, txsan...@gmail.com a écrit :
> 2016. február 22., hétfő 11:24:25 UTC+1 időpontban clabbe.montjoie a
> következőt írta:
>> On Sun, Feb 21, 2016 at 07:24:36AM -0800, m.silentcr...@gmail.com wrote:
>>> Hi,
>>>
>>> Am Mittwoch, 17. Februar 2016 18:16:09 UTC+1 schrieb
Le 13/03/2016 23:35, Timo S. a écrit :
> Hi Corentin,
>
> Am 13.03.2016 17:32 schrieb "Corentin LABBE" <clabbe.montj...@gmail.com
> <mailto:clabbe.montj...@gmail.com>>:
>>
>> Le 13/03/2016 16:21, txsan...@gmail.com <mailto:txsan...@gmail.com&g
Hello
I had some report of random data corruption of people using cryptsetup with my
sun4i-ss driver (via AF_ALG).
Even if it is hard to hit, I could confirm it by continuously moving files on a
LUKS encrypted FS and comparing hash of it before and after.
The corruption is always when
Le 06/03/2016 13:32, txsan...@gmail.com a écrit :
> 2016. február 17., szerda 18:16:09 UTC+1 időpontban txsa...@gmail.com a
> következőt írta:
>> Hi
>>
>> I have a Cubieboard2 device, is Allwinner A20 SOC, running and Armbian 5.00
>> with kernel 4.4.1.
>>
>> As in the latest version the sun4i-ss
On Thu, Feb 16, 2017 at 12:58:46PM -0800, Florian Fainelli wrote:
> On 02/16/2017 04:48 AM, Corentin Labbe wrote:
> > +
> > +Optional properties:
> > +- allwinner,tx-delay: TX clock delay chain value. Range value is 0-0x07.
> > Default is 0)
> > +- allwinner,rx-
The dwmac-sun8i is a heavy hacked version of stmmac hardware by
allwinner.
In fact the only common part is the descriptor management and the first
register function.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
drivers/net/ethernet/stmicro/stmmac/Kconfig| 11 +
d
The dwmac-sun8i hardware is present on the pine64 plus.
It uses an external PHY rtl8211e via RGMII.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts | 16 +++-
1 file changed, 15 insertions(+), 1 deletion(-)
For dwmac-sun8i, some actions must be done for enabling attached PHY.
Thoses actions must be done after stmmac_probe_config_dt() and
at start of stmmac_init_phy().
The best way to handle that is to add an optional init_phy() function.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.
On the Orange Pi PC Plus, the polarity of the LEDs on the RJ45 Ethernet
port were changed from active low to active high.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts | 5 +
The dwmac-sun8i hardware is present on the Orange PI One.
It uses the internal PHY.
This patch create the needed emac node.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 8
1 file changed, 8 insertions(+)
diff --git
Instead of ading more ifthen login for adding a new mac_device_info
setup function, it is easier to add a function pointer to the function
needed.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 7 ++-
include/linux/st
are DT patch enabling it.
Regards
Corentin Labbe
Corentin Labbe (16):
net-next: stmmac add optional init_phy function
net-next: stmmac: export stmmac_set_mac_addr/stmmac_get_mac_addr
net-next: stmmac: add optional setup function
ARM: sun8i: dt: Add DT bindings documentation for Allwinner
The dwmac-sun8i hardware is present on the Orange PI 2.
It uses the internal PHY.
This patch create the needed emac node.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 8
1 file changed, 8 insertions(+)
diff --git a/ar
The dwmac-sun8i hardware is present on the BananaPi M64.
It uses an external PHY rtl8211e via RGMII.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 14 ++
1 file changed, 14 insertions(+)
diff --git
This patch add the dt node for the syscon register present on the
Allwinner A64.
Only two register are present in this syscon and the only one useful is
the one dedicated to EMAC clock.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm64/boot/dts/allwinner/sun50i-a6
This patch adds documentation for Device-Tree bindings for the
Allwinner dwmac-sun8i driver.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
.../devicetree/bindings/net/dwmac-sun8i.txt| 86 ++
1 file changed, 86 insertions(+)
create mode
From: LABBE Corentin <clabbe.montj...@gmail.com>
The dwmac-sun8i hardware is present on the Orange PI PC.
It uses the internal PHY.
This patch create the needed emac node.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 8
Thoses symbol will be needed for the dwmac-sun8i ethernet driver.
For letting it to be build as module, they need to be exported.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c | 3 ++-
1 file changed, 2 insertions(+), 1 de
The dwmac-sun8i hardware is present on the Orange PI plus.
It uses an external PHY rtl8211e via RGMII.
This patch create the needed regulator, emac and phy nodes.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm/boot/dts/sun8i-h3-orangepi-plus.dt
The dwmac-sun8i hardware is present on the pine64
It uses an external PHY via RMII.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 15 +++
1 file changed, 15 insertions(+)
diff --git a/arch/arm64/boot/dts/all
From: LABBE Corentin <clabbe.montj...@gmail.com>
This patch add the dt node for the syscon register present on the
Allwinner H3.
Only two register are present in this syscon and the only one useful is
the one dedicated to EMAC clock.
Signed-off-by: Corentin Labbe <clabbe.montj...@
This patch add pinctrl node for dwmac-sun8i on H3.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm/boot/dts/sun8i-h3.dtsi | 11 +++
1 file changed, 11 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 6
From: LABBE Corentin <clabbe.montj...@gmail.com>
The dwmac-sun8i is an ethernet MAC hardware that support 10/100/1000
speed.
This patch enable the dwmac-sun8i on the Allwinner H3 SoC Device-tree.
The SoC H3 have an internal PHY, so optionals syscon and ephy are set.
Signed-off-by: Co
at this level.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 37 +++
1 file changed, 37 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
From: LABBE Corentin <clabbe.montj...@gmail.com>
The dwmac-sun8i hardware is present on the Banana Pi M2+
It uses an external PHY rtl8211e via RGMII.
This patch create the needed regulator, emac and phy nodes.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/
From: LABBE Corentin <clabbe.montj...@gmail.com>
Enable the dwmac-sun8i driver in the sunxi default configuration
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm/configs/sunxi_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/sunxi
Enable the dwmac-sun8i driver in the multi_v7 default configuration
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm/configs/multi_v7_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/multi_v7_defconfig
b/arch/arm/configs/multi_v7_def
On Thu, Feb 16, 2017 at 09:38:33PM +0100, Peter Korsgaard wrote:
> >>>>> "Corentin" == Corentin Labbe <clabbe.montj...@gmail.com> writes:
>
> > Instead of ading more ifthen login for adding a new mac_device_info
>
> s/login/logic/
>
> -
On Thu, Feb 16, 2017 at 08:06:32PM +0100, Maxime Ripard wrote:
> On Thu, Feb 16, 2017 at 01:48:46PM +0100, Corentin Labbe wrote:
> > This patch add pinctrl node for dwmac-sun8i on H3.
> >
> > Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
> > ---
>
On Thu, Feb 16, 2017 at 08:08:27PM +0100, Maxime Ripard wrote:
> Hi,
>
> On Thu, Feb 16, 2017 at 01:48:58PM +0100, Corentin Labbe wrote:
> > From: LABBE Corentin <clabbe.montj...@gmail.com>
> >
> > Enable the dwmac-sun8i driver in the sunxi default configuration
On Thu, Feb 16, 2017 at 07:48:18PM +0100, Maxime Ripard wrote:
> Hi,
>
> On Thu, Feb 16, 2017 at 01:48:42PM +0100, Corentin Labbe wrote:
> > This patch adds documentation for Device-Tree bindings for the
> > Allwinner dwmac-sun8i driver.
> >
> > Signed-off
id)
> > +{
> > + struct mac_device_info *mac;
> > +
> > + mac = kzalloc(sizeof(const struct mac_device_info), GFP_KERNEL);
> > + if (!mac)
> > + return NULL;
>
> Do you ever free that memory?
>
Good catch, I believed that the "
found a patch by Wens in his sunxi-next tree.
>
> After cherry-picking and fixing the conflicts, it seems to fix booting
> from the sdcard on 4.10-rc (or current mainline master).
>
>
> Päikest,
> Priit
>
Tested on my OpiPc with 4.10-rc4, now it can use mmc.
Th
This patch add support for the sunxi-sid driver to the device tree for sun8i-h3.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm/boot/dts/sun8i-h3.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/su
Hello
Thanks for your review, I will fix all your reports for next version.
On 12/08/2016 21:06, Bjorn Andersson wrote:
> On Fri 12 Aug 04:46 PDT 2016, LABBE Corentin wrote:
>
>> Add hwspinlock support for the Allwinner Hardware Spinlock device
>> present on the A83T, H3 and A64 SoCs.
>>
>>
On 24/08/2016 20:23, Maxime Ripard wrote:
> Hi,
>
> On Thu, Aug 18, 2016 at 02:14:17PM +0200, LABBE Corentin wrote:
>> All discutions about sunxi architecture is done
>> on linux-sunxi@googlegroups.com.
>> This patch add it as list on drivers for this arch.
>>
>> Signed-off-by: LABBE Corentin
On Mon, Nov 07, 2016 at 11:15:00AM +0100, Maxime Ripard wrote:
> On Mon, Nov 07, 2016 at 10:59:53AM +0100, Corentin Labbe wrote:
> > On Mon, Nov 07, 2016 at 10:56:12AM +0100, Maxime Ripard wrote:
> > > On Mon, Nov 07, 2016 at 05:48:43PM +0800, Chen-Yu Tsai
On Mon, Nov 07, 2016 at 10:56:12AM +0100, Maxime Ripard wrote:
> On Mon, Nov 07, 2016 at 05:48:43PM +0800, Chen-Yu Tsai wrote:
> > Hi,
> >
> > On Mon, Nov 7, 2016 at 4:18 PM, LABBE Corentin
> > wrote:
> > > Hello
> > >
> > > With CONFIG_DEBUG_TEST_DRIVER_REMOVE=y
AXP202 and AXP209 can report voltages and current readings for its
various power inputs, the LiPo battery, and also the chip's internal
temperature.
This patch add basic support for these sensors.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
Signed-off-by: Corentin Labbe <clabbe.montj...@
Instead of adding more ifthen logic for adding a new mac_device_info
setup function, it is easier to add a function pointer to the function
needed.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
drivers/net/ethernet/stmicro/stmmac/stmmac_main.c | 4 +++-
include/linux/st
The dwmac-sun8i is a heavy hacked version of stmmac hardware by
allwinner.
In fact the only common part is the descriptor management and the first
register function.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
drivers/net/ethernet/stmicro/stmmac/Kconfig| 11 +
d
The dwmac-sun8i is an ethernet MAC hardware that support 10/100/1000
speed.
This patch enable the dwmac-sun8i on Allwinner H3/H5 SoC Device-tree.
SoC H3/H5 have an internal PHY, so optionals syscon and ephy are set.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm/bo
The dwmac-sun8i hardware is present on the Orange PI 2.
It uses the internal PHY.
This patch create the needed emac node.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 8
1 file changed, 8 insertions(+)
diff --git a/ar
Thoses symbol will be needed for the dwmac-sun8i ethernet driver.
For letting it to be build as module, they need to be exported.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
drivers/net/ethernet/stmicro/stmmac/dwmac_lib.c | 3 ++-
1 file changed, 2 insertions(+), 1 de
.
The remaining are DT patch enabling it.
Regards
Corentin Labbe
Changes since v3:
- Renamed tx-delay/rx-delay to tx-delay-ps/rx-delay-ps
- fix syscon compatible example
- Changed parameter type for setup() function
- Dropped some DT patchs for boards which I could not test further
Changes since v2
Enable the dwmac-sun8i driver in the sunxi default configuration
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm/configs/sunxi_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/sunxi_defconfig b/arch/arm/configs/sunxi_defconfig
index 5c
The dwmac-sun8i hardware is present on the pine64 plus.
It uses an external PHY rtl8211e via RGMII.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
.../arm64/boot/dts/allwinner/sun50i-a64-pine64-plus.dts | 17 -
1 file changed, 16 insertions(+), 1 deletion(-)
This patch adds documentation for Device-Tree bindings for the
syscon present in allwinner devices.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
.../devicetree/bindings/misc/allwinner,syscon.txt | 19 +++
1 file changed, 19 insertions(+)
create mode
The dwmac-sun8i hardware is present on the Orange PI PC.
It uses the internal PHY.
This patch create the needed emac node.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 8
1 file changed, 8 insertions(+)
diff --git
Enable the dwmac-sun8i driver in the multi_v7 default configuration
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm/configs/multi_v7_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/configs/multi_v7_defconfig
b/arch/arm/configs/multi_v7_def
This patch adds documentation for Device-Tree bindings for the
Allwinner dwmac-sun8i driver.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
Acked-by: Rob Herring <r...@kernel.org>
---
.../devicetree/bindings/net/dwmac-sun8i.txt| 77 ++
1 file
at this level.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 37 +++
1 file changed, 37 insertions(+)
diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
On the Orange Pi PC Plus, the polarity of the LEDs on the RJ45 Ethernet
port were changed from active low to active high.
Signed-off-by: Chen-Yu Tsai <w...@csie.org>
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts | 5 +
This patch add the dt node for the syscon register present on the
Allwinner H3/H5
Only two register are present in this syscon and the only one useful is
the one dedicated to EMAC clock..
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm/boot/dts/sunxi-h3-h5.dt
The dwmac-sun8i hardware is present on the pine64
It uses an external PHY via RMII.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/bo
This patch add the dt node for the syscon register present on the
Allwinner A64.
Only two register are present in this syscon and the only one useful is
the one dedicated to EMAC clock.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm64/boot/dts/allwinner/sun50i-a6
The dwmac-sun8i hardware is present on the Orange PI One.
It uses the internal PHY.
This patch create the needed emac node.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 8
1 file changed, 8 insertions(+)
diff --git
The dwmac-sun8i hardware is present on the BananaPi M64.
It uses an external PHY rtl8211e via RGMII.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm64/boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 15 +++
1 file changed, 15 insertions(+)
diff --git
On Thu, Apr 20, 2017 at 12:38:50AM +0100, André Przywara wrote:
> On 12/04/17 12:13, Corentin Labbe wrote:
> > This patch adds documentation for Device-Tree bindings for the
> > syscon present in allwinner devices.
> >
> > Signed-off-by: Corentin Labbe
On Fri, Jul 28, 2017 at 04:36:00PM +0200, Andrew Lunn wrote:
> > > I've probably asked this before: Does the internal PHY use a different
> > > PHY ID in registers 2 and 3?
> > >
> >
> > yes
> >
> > reg2: 0x0044
> > reg3: 0X1500
Copy/paste error, its 1400
>
> So this is not about loading the
On Fri, Jul 28, 2017 at 03:55:44PM +0200, Andrew Lunn wrote:
> On Fri, Jul 28, 2017 at 11:28:15AM +0200, Corentin Labbe wrote:
> > Hello
> >
> > The current way to find if the phy is internal is to compare DT phy-mode
> > and emac_variant/internal_phy.
> > But it
compatible.
Corentin Labbe (3):
dt-bindings: net: add compatible for internal sun8i-h3/sun8i-v3s PHYs
ARM: sunxi: h3/h5: Add sun8i-h3-ephy compatible
net-next: stmmac: dwmac-sun8i: choose internal PHY via compatible
Documentation/devicetree/bindings/net/dwmac-sun8i.txt | 4 ++--
arch/arm/boot
This patch adds the sun8i-h3-ephy compatible to the internal PHY.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm/boot/dts/sunxi-h3-h5.dtsi | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/sunxi-h3-h5.dtsi
b/arch/arm/boot/dts
the phy_mode of the internal PHY does need to be know, the
variant internal_phy member is converted to a boolean.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 16 ++--
1 file changed, 10 insertions(+), 6 del
The internal PHYs for H3 ans V3S now need to have their own compatible.
This patch rename them in the binding documentation.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
Documentation/devicetree/bindings/net/dwmac-sun8i.txt | 4 ++--
1 file changed, 2 insertions(+), 2 del
On Fri, Jul 28, 2017 at 05:49:55PM +0800, Chen-Yu Tsai wrote:
> On Fri, Jul 28, 2017 at 5:28 PM, Corentin Labbe
> <clabbe.montj...@gmail.com> wrote:
> > The current way to find if the phy is internal is to compare DT phy-mode
> > and emac_variant/internal_phy.
> >
On Thu, Jun 29, 2017 at 12:23:49PM -0400, David Miller wrote:
> From: Corentin Labbe <clabbe.montj...@gmail.com>
> Date: Tue, 27 Jun 2017 11:28:01 +0200
>
> > The current way to find if the phy is internal is to compare DT phy-mode
> > and emac_variant/internal_
On Tue, Jun 27, 2017 at 10:37:34AM -0700, Florian Fainelli wrote:
> On 06/27/2017 10:29 AM, Maxime Ripard wrote:
> > On Tue, Jun 27, 2017 at 02:37:48PM +0200, Corentin Labbe wrote:
> >> On Tue, Jun 27, 2017 at 11:33:56AM +0100, Andre Przywara wrote:
> >>> Hi,
> >
Since internal phy-mode is reserved for non-xMII protocol we cannot use
it with dwmac-sun8i
This reverts commit 1c2fa5f84683 ("net: stmmac: support future possible
different internal phy mode")
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
drivers/net/etherne
Since internal phy-mode is reserved for non-xMII protocol we cannot use
it with dwmac-sun8i
This reverts commit bdcc005beac9 ("arm: sun8i: nanopi-neo: use internal
phy-mode")
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm/boot/dts/sun8i-h3-nanopi-neo.dt
l phy-mode
is reserved for non-xMII protocol we cannot use it with dwmac-sun8i
I will send an additionnal patch for documenting more phy-mode = "internal"
Corentin Labbe (6):
arm: sun8i: nanopi-neo: revert use internal phy-mode
arm: sun8i: orangepi-2: revert "use internal phy-mod
Since internal phy-mode is reserved for non-xMII protocol we cannot use
it with dwmac-sun8i
This reverts commit 4ac57180eab2 ("arm: sun8i: orangepi-one: use internal
phy-mode")
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm/boot/dts/sun8i-h3-orangepi-o
Since internal phy-mode is reserved for non-xMII protocol we cannot use
it with dwmac-sun8i
This reverts commit 3432a86e641c ("arm: sun8i: orangepipc: use internal
phy-mode")
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm/boot/dts/sun8i-h3-orangepi-pc.dt
Since internal phy-mode is reserved for non-xMII protocol we cannot use
it with dwmac-sun8i
This reverts commit 6066de6848d4 ("arm: sun8i: orangepi-zero: use internal
phy-mode")
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm/boot/dts/sun8i-h2-plus-orang
Since internal phy-mode is reserved for non-xMII protocol we cannot use
it with dwmac-sun8i
This reverts commit 5a79b4f2a5e7 ("arm: sun8i: orangepi-2: use internal
phy-mode")
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
arch/arm/boot/dts/sun8i-h3-orangepi-2.dt
On Sat, Jul 01, 2017 at 02:42:14PM -0700, Florian Fainelli wrote:
> On 30/06/2017 23:53, Corentin Labbe wrote:
> > On Tue, Jun 27, 2017 at 10:37:34AM -0700, Florian Fainelli wrote:
> >> On 06/27/2017 10:29 AM, Maxime Ripard wrote:
> >>> On Tue, Jun 27, 2017 at 02
On Mon, Jun 26, 2017 at 02:36:43PM +0200, Frans Klaver wrote:
> Hi,
>
> On Mon, Jun 26, 2017 at 2:20 PM, Corentin Labbe
> <clabbe.montj...@gmail.com> wrote:
> > The Security System have a PRNG, this patch add support for it via
> > crypto_rng.
>
> s,have,has,
The Security System has a PRNG, this patch adds support for it via
crypto_rng.
Signed-off-by: Corentin Labbe <clabbe.montj...@gmail.com>
---
Change since v4
- Fixed some spelling issue in Kconfig and patch description
Changes since v3 (note: the v3 miss changes and version tag sorry)
- Re
On Sun, Jul 02, 2017 at 02:31:59PM +0200, Corentin Labbe wrote:
> Since internal phy-mode is reserved for non-xMII protocol we cannot use
> it with dwmac-sun8i
> This reverts commit 1c2fa5f84683 ("net: stmmac: support future possible
> different internal phy mode")
>
On Wed, Apr 12, 2017 at 02:41:53PM +0200, Maxime Ripard wrote:
> On Wed, Apr 12, 2017 at 01:13:55PM +0200, Corentin Labbe wrote:
> > The dwmac-sun8i is an Ethernet MAC that supports 10/100/1000 Mbit
> > connections. It is very similar to the device found in the Allwinner
&g
On Fri, Jul 28, 2017 at 10:54:30AM -0700, Florian Fainelli wrote:
> On 07/28/2017 07:44 AM, Corentin Labbe wrote:
> > On Fri, Jul 28, 2017 at 04:36:00PM +0200, Andrew Lunn wrote:
> >>>> I've probably asked this before: Does the internal PHY use a different
> >&
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