On Fri, Aug 6, 2021 at 7:49 PM Icenowy Zheng wrote:
>
> 在 2021-07-22星期四的 10:16 +0200，Maxime Ripard写道：
> > On Thu, Jul 22, 2021 at 12:55:53AM -0500, Samuel Holland wrote:
> > > On 7/21/21 9:04 AM, Maxime Ripard wrote:
> > > > The regulator-ramp-delay property isn't documented in the binding
> > > >
rom our compatible list.
>
> Signed-off-by: Maxime Ripard
Reviewed-by: Chen-Yu Tsai
--
You received this message because you are subscribed to the Google Groups
"linux-sunxi" group.
To unsubscribe from this group and stop receiving emails from it, send an email
to linux-sunxi+uns
On Wed, Jul 21, 2021 at 10:05 PM Maxime Ripard wrote:
>
> The AXP803 compatible was introduced recently with a fallback to the
> AXP813, but it was never documented.
>
> Cc: Chen-Yu Tsai
> Cc: linux...@vger.kernel.org
> Cc: Sebastian Reichel
> Signed-off-by: Maxime Ripar
lace, let's convert the device
> > tree bindings for that driver over to a YAML schema.
> >
> > Cc: Chen-Yu Tsai
> > Cc: Lee Jones
> > Signed-off-by: Maxime Ripard
Acked-by: Chen-Yu Tsai
once Rob's suggestions are added.
--
You received this message be
Hi,
On Mon, Jun 7, 2021 at 10:17 PM Andre Przywara wrote:
>
> On Mon, 7 Jun 2021 15:22:55 +0200
> Maxime Ripard wrote:
>
> Hi Maxime,
>
> > On Tue, May 25, 2021 at 12:29:01PM +0100, Andre Przywara wrote:
> > > On Mon, 24 May 2021 13:59:46 +0200
> > > Maxime Ripard wrote:
> > >
> > > Hi Maxime,
Hi,
On Thu, Apr 29, 2021 at 6:53 AM Andre Przywara wrote:
>
> The H616 is our first supported Allwinner SoC which goes beyond the 4GB
> address space "barrier", by having more than 32 address bits.
Nit: I wouldn't say it's the first. The A80 supports up to 8GB address
space with LPAE. It just ne
Hi,
On Mon, Apr 12, 2021 at 8:08 AM Andre Przywara wrote:
>
> Commit 941432d00768 ("arm64: dts: allwinner: Drop non-removable from
> SoPine/LTS SD card") enabled the card detect GPIO for the SOPine module,
> along the way with the Pine64-LTS, which share the same base .dtsi.
>
> This was based on
On Wed, Mar 24, 2021 at 4:44 AM Jernej Skrabec wrote:
>
> Beelink X2 has power button. Add node for it.
>
> Signed-off-by: Jernej Skrabec
Acked-by: Chen-Yu Tsai
--
You received this message because you are subscribed to the Google Groups
"linux-sunxi" group.
To unsub
On Sat, Feb 6, 2021 at 12:21 AM Jernej Škrabec wrote:
>
> Dne petek, 05. februar 2021 ob 17:01:30 CET je Maxime Ripard napisal(a):
> > On Fri, Feb 05, 2021 at 11:21:22AM +0800, Chen-Yu Tsai wrote:
> > > On Fri, Feb 5, 2021 at 2:48 AM Jernej Skrabec
> wrote:
> > >
pronounced with higher frequencies.
>
> Fix that by allowing max. supported frequency in HW and fix the comment.
>
> Fixes: cd9063757a22 ("drm/sun4i: DW HDMI: Lower max. supported rate for H6")
> Tested-by: Andre Heider
> Signed-off-by: Jernej Skrabec
Reviewed-by: C
On Fri, Feb 5, 2021 at 2:48 AM Jernej Skrabec wrote:
>
> cpce value for 594 MHz is set differently in BSP driver. Fix that.
>
> Fixes: c71c9b2fee17 ("drm/sun4i: Add support for Synopsys HDMI PHY")
> Tested-by: Andre Heider
> Signed-off-by: Jernej Skrabec
Reviewe
Fix that by removing set_rate quirk and always set clock rate.
>
> Fixes: 40bb9d3147b2 ("drm/sun4i: Add support for H6 DW HDMI controller")
> Tested-by: Andre Heider
> Signed-off-by: Jernej Skrabec
Reviewed-by: Chen-Yu Tsai
--
You received this message because you are su
> Signed-off-by: Jernej Skrabec
Reviewed-by: Chen-Yu Tsai
--
You received this message because you are subscribed to the Google Groups
"linux-sunxi" group.
To unsubscribe from this group and stop receiving emails from it, send an email
to linux-sunxi+unsubscr...@googlegroups.com.
To v
NC)
> + val |= SUN4I_TCON0_IO_POL_VSYNC_POSITIVE;
> +
> + regmap_write(tcon->regs, SUN4I_TCON0_IO_POL_REG, val);
> + } else {
> + val = SUN4I_TCON1_IO_POL_UNKNOWN;
I think a comment for the origin of this is warranted.
Othe
e number returned by the platform code is
> > valid, before trying to register the irqchip. If not, we skip this
> > registration, to avoid the driver to bail out completely.
> >
> > Signed-off-by: Andre Przywara
>
> Acked-by: Maxime Ripard
Acked-by: Chen-Yu Tsai
--
On Thu, Jan 28, 2021 at 1:26 AM Andre Przywara wrote:
>
> Add the obvious compatible name to the existing RSB binding, and pair
> it with the existing A23 fallback compatible string, as the devices are
> compatible.
>
> Signed-off-by: Andre Przywara
Acked-by: Chen-Yu Tsai
Hi,
On Thu, Jan 28, 2021 at 1:26 AM Andre Przywara wrote:
>
> The AXP305 PMIC used in AXP805 seems to be fully compatible to the
^
This statement doesn't quite make sense. I assume you wanted to mention
a board or the H616 SoC here?
> AXP805 PMIC, so add the proper chai
On Wed, Jan 20, 2021 at 12:41 PM Chen-Yu Tsai wrote:
>
> Hi,
>
> On Tue, Jan 19, 2021 at 1:52 PM Samuel Holland wrote:
> >
> > As the A64 is designed for use in mobile devices without easy access to
> > a UART, MMC0, or a FEL button, it would be useful to be
Hi,
On Tue, Jan 19, 2021 at 1:52 PM Samuel Holland wrote:
>
> As the A64 is designed for use in mobile devices without easy access to
> a UART, MMC0, or a FEL button, it would be useful to be able to reboot
> to FEL mode, fastboot, etc. via a command from Linux. As reboot(2)
> supports passing a
On Mon, Jan 18, 2021 at 11:53 PM Andre Przywara wrote:
>
> On Mon, 18 Jan 2021 14:28:54 +0100
> Maxime Ripard wrote:
>
> Hi Maxime,
>
> > On Mon, Jan 18, 2021 at 02:08:29AM +, Andre Przywara wrote:
> > > From: Yangtao Li
> > >
> > > This patch adds support for A100 MMC controller, which use
On Wed, Jan 13, 2021 at 5:16 PM Chen-Yu Tsai wrote:
>
> On Thu, Jan 7, 2021 at 6:27 PM Samuel Holland wrote:
> >
> > On 1/6/21 5:38 AM, Chen-Yu Tsai wrote:
> > > On Wed, Jan 6, 2021 at 7:06 PM Maxime Ripard wrote:
> > >>
> > >> On Mon, Jan
On Sat, Jan 16, 2021 at 6:37 PM Jernej Skrabec wrote:
>
> Bluetooth module on BananaPi M2 Zero can also be used for streaming
> audio. However, for that case higher UART speed is required.
>
> Add a max-speed property.
>
> Signed-off-by: Jernej Skrabec
Acked-by: Chen-Yu Ts
On Sat, Jan 16, 2021 at 6:52 PM Jernej Skrabec wrote:
>
> Bluetooth module on BananaPi M2 Plus can also be used for streaming
> audio. However, for that case higher UART speed is required.
>
> Add a max-speed property.
>
> Signed-off-by: Jernej Skrabec
Acked-by: Chen-Yu Ts
arm64: dts: allwinner: H6: Allow up to 150 MHz MMC bus frequency
> arm64: dts: allwinner: A64: Limit MMC2 bus frequency to 150 MHz
> arm64: dts: allwinner: Pine64-LTS/SoPine: Enable HS200 eMMC mode
> arm64: dts: allwinner: Pine H64: Enable HS200 eMMC mode
Everything looks goo
On Wed, Jan 13, 2021 at 6:30 PM André Przywara wrote:
>
> On 06/01/2021 15:56, Chen-Yu Tsai wrote:
> > Hi,
> >
> > On Wed, Jan 6, 2021 at 11:05 PM Andre Przywara
> > wrote:
> >>
> >> In recent Allwinner SoCs the first USB host controller (HCI0) sh
On Thu, Jan 7, 2021 at 6:27 PM Samuel Holland wrote:
>
> On 1/6/21 5:38 AM, Chen-Yu Tsai wrote:
> > On Wed, Jan 6, 2021 at 7:06 PM Maxime Ripard wrote:
> >>
> >> On Mon, Jan 04, 2021 at 10:54:19AM +, André Przywara wrote:
> >>> On 03/01/2021 10:
On Mon, Jan 11, 2021 at 5:16 AM Jernej Skrabec wrote:
>
> PineH64 model B has wifi+bt combo module. Wifi is already supported, so
> lets add also bluetooth node.
>
> Signed-off-by: Jernej Skrabec
Acked-by: Chen-Yu Tsai
Looks good to me, though I couldn't find anything on
fail to use the right
> flag to actually activate that.
>
> Fixes: 524353ea480b ("clk: sunxi-ng: add support for the Allwinner H6 CCU")
> Reported-by: Jernej Skrabec
> Signed-off-by: Andre Przywara
Acked-by: Chen-Yu Tsai
--
You received this message because you are subsc
On Wed, Jan 6, 2021 at 11:06 PM Andre Przywara wrote:
>
> The H6 manual explicitly lists a frequency limit of 150 MHz for the bus
> frequency of the MMC controllers. So far we had no explicit limits in the
> DT, which limited eMMC to a rather conservative 52 MHz.
I'd say this is implementation sp
~80 MB/s to ~120 MB/s.
>
> Signed-off-by: Andre Przywara
Acked-by: Chen-Yu Tsai
--
You received this message because you are subscribed to the Google Groups
"linux-sunxi" group.
To unsubscribe from this group and stop receiving emails from it, send an email
to linux-sunxi+unsub
~80 MB/s to ~120 MB/s.
>
> Signed-off-by: Andre Przywara
Acked-by: Chen-Yu Tsai
--
You received this message because you are subscribed to the Google Groups
"linux-sunxi" group.
To unsubscribe from this group and stop receiving emails from it, send an email
to linux-sunxi+unsub
On Wed, Jan 6, 2021 at 11:06 PM Andre Przywara wrote:
>
> In contrast to the H6 (and later) manuals, the A64 datasheet does not
> specify any limitations in the maximum possible frequency for eMMC
> controllers.
> However experimentation has found that a 150 MHz limit similar to other
> SoCs and a
On Wed, Jan 6, 2021 at 11:05 PM Andre Przywara wrote:
>
> The SD card on the SoPine SoM module is somewhat concealed, so was
> originally defined as "non-removable".
> However there is a working card-detect pin, and in certain SoM base
> boards it might be actually accessible at runtime.
> Also th
Hi,
On Wed, Jan 6, 2021 at 11:05 PM Andre Przywara wrote:
>
> In recent Allwinner SoCs the first USB host controller (HCI0) shares
> the first PHY with the MUSB controller. Probably to make this sharing
> work, we were avoiding to declare this in the DT. This has two
> shortcomings:
> - U-Boot (w
Hi,
On Wed, Jan 6, 2021 at 11:05 PM Andre Przywara wrote:
>
> The Pine64-LTS board features a blue status LED on pin PL7.
I'd like some clarification about this.
My Pine64-LTS was a used unit personally given to me by TL Lim, which came
with LEDs that I assume were soldered on by hand as their
On Wed, Jan 6, 2021 at 6:50 PM Maxime Ripard wrote:
>
> Hi!
>
> On Sun, Jan 03, 2021 at 05:06:31AM -0600, Samuel Holland wrote:
> > This series adds system (complete power down) and runtime (clock gate)
> > PM hooks to the RSB controller driver. Tested on A64 and H6.
> >
> > Samuel Holland (4):
>
On Wed, Jan 6, 2021 at 7:06 PM Maxime Ripard wrote:
>
> On Mon, Jan 04, 2021 at 10:54:19AM +, André Przywara wrote:
> > On 03/01/2021 10:00, Samuel Holland wrote:
> > > On boards where the only peripheral connected to PL0/PL1 is an X-Powers
> > > PMIC, configure the connection to use the RSB b
ot;.
>
> Signed-off-by: Samuel Holland
Reviewed-by: Chen-Yu Tsai
--
You received this message because you are subscribed to the Google Groups
"linux-sunxi" group.
To unsubscribe from this group and stop receiving emails from it, send an email
to linux-sunxi+unsubscr...@googlegrou
On Sun, Jan 3, 2021 at 7:25 PM Samuel Holland wrote:
>
> Adjust the spacing and use an explicit "return 0" in the success path
> to make the function easier to parse.
>
> Signed-off-by: Samuel Holland
Reviewed-by: Chen-Yu Tsai
--
You received this message because
On Sun, Jan 3, 2021 at 7:25 PM Samuel Holland wrote:
>
> Use the appropriate function instead of reimplementing it,
> and update the error message to match the code.
>
> Signed-off-by: Samuel Holland
Reviewed-by: Chen-Yu Tsai
--
You received this message because you are su
On Sun, Jan 3, 2021 at 7:25 PM Samuel Holland wrote:
>
> sun8i_dwmac_unpower_internal_phy already checks if the PHY is powered,
> so there is no need to do it again here.
>
> Signed-off-by: Samuel Holland
Reviewed-by: Chen-Yu Tsai
--
You received this message because you ar
On Sun, Jan 3, 2021 at 7:25 PM Samuel Holland wrote:
>
> This is a deinitialization function that always returned zero, and that
> return value was always ignored. Have it return void instead.
>
> Signed-off-by: Samuel Holland
Reviewed-by: Chen-Yu Tsai
--
You received this
On Wed, Jan 6, 2021 at 6:35 AM Linus Walleij wrote:
>
> On Sun, Jan 3, 2021 at 11:00 AM Samuel Holland wrote:
>
> > As there is an RSB controller in the H6 SoC, there should be some pin
> > configuration for it. While no such configuration is documented, the
> > "s_i2c" pins are suspiciously on t
ver
> removal callback. Also ensure the EPHY is powered down before removal.
>
> Fixes: 634db83b8265 ("net: stmmac: dwmac-sun8i: Handle integrated/external
> MDIOs")
> Signed-off-by: Samuel Holland
Reviewed-by: Chen-Yu Tsai
--
You received this message because you
: stmmac: Add dwmac-sun8i")
> Fixes: 40a1dcee2d18 ("net: ethernet: dwmac-sun8i: Use the correct function in
> exit path")
> Signed-off-by: Samuel Holland
Reviewed-by: Chen-Yu Tsai
--
You received this message because you are subscribed to the Google Groups
"linux-sunxi&
letions(-)
Looks good to me.
Acked-by: Chen-Yu Tsai
I already queued them up locally, but I think it's best to give other
people some time to review as well.
ChenYu
--
You received this message because you are subscribed to the Google Groups
"linux-sunxi" group.
To unsubscrib
n't be pushed
out until that happens.
Regarding patch 3, I replaced the clock and reset macros with raw
numbers to get rid of cross-tree dependencies. The following fix
will be posted for v5.12 later on during its RC cycle.
>8 --------
commit 0b47
th no
> primary function 2 given. This suggests the primary function for these
> pins is actually RSB, and that is indeed the case.
>
> Add the "s_rsb" pin functions so the RSB controller can be used.
>
> Signed-off-by: Samuel Holland
Acked-by: Chen-Yu Tsai
--
You re
On Mon, Dec 28, 2020 at 4:03 AM Jernej Škrabec wrote:
>
> Hi!
>
> Dne nedelja, 27. december 2020 ob 21:00:00 CET je Corentin Labbe napisal(a):
> > Lot of sunxi boards have BRCM wireless device, so let's enable necessary
> > options for it in our defconfig.
>
> Idea is good but modules (=m) instead
Hi,
On Thu, Dec 17, 2020 at 12:26 AM Sergio Sota wrote:
>
> Hi Chen-Yu Tsai,
>
> Thank you so much for your help. You are right, we should have checked first
> the
> panel-dpi kernel support. Our apologies. This time we have build a complete
> new
> system with t
Hi,
On Wed, Dec 16, 2020 at 1:51 AM Sergio Sota wrote:
>
> Hi Clement and Chen-Yu Tsai,
>
> this time we send the kernel logs as requested, but before that here are our
> findings. We have inspected the LCD TFT panel and although it is from Olimex
> it
> is not compatible
On Mon, Dec 14, 2020 at 8:53 PM Andre Przywara wrote:
>
> On Mon, 14 Dec 2020 10:58:31 +0100
> Maxime Ripard wrote:
>
> Hi,
>
> > On Fri, Dec 11, 2020 at 01:19:32AM +, Andre Przywara wrote:
> > > + reserved-memory {
> > > + #address-cells = <2>;
> > > + #size-cells = <2>
On Mon, Dec 14, 2020 at 12:28 AM Icenowy Zheng wrote:
>
> 在 2020-12-02星期三的 13:54 +，Andre Przywara写道：
> > Port A is used for an internal connection to some analogue circuitry
> > which looks like an AC200 IP (as in the H6), though this is not
> > mentioned in the manual.
>
> When developing for
On Sat, Dec 12, 2020 at 3:33 AM Sergio Sota wrote:
>
> Hi Clement,
>
> yes, tve0 is only for VGA/CVBS video output (which we don't use right now)
> But just in case we have enabled this controller and the result is the same.
>
> You're probably right about the I2C port (as the binding suggest) The
On Tue, Dec 8, 2020 at 3:04 AM Faruk KILAVUZ wrote:
>
> On 7.12.2020 18:43, Chen-Yu Tsai wrote:
>
> On Mon, Dec 7, 2020 at 11:34 PM Faruk KILAVUZ
> wrote:
>
> Hello
> I am working on OV5640 with Allwinner A64 chip. I followed the steps at
> https://linux-sunxi.org/
On Mon, Dec 7, 2020 at 11:34 PM Faruk KILAVUZ wrote:
>
> Hello
> I am working on OV5640 with Allwinner A64 chip. I followed the steps at
> https://linux-sunxi.org/CSI. I used kernel 5.10-rc6 and I compiled buildroot.
> I tried to explain what I do step by step.
>
> 1- I activated this packages
On Thu, Dec 3, 2020 at 11:45 PM André Przywara wrote:
>
> On 03/12/2020 15:02, Chen-Yu Tsai wrote:
> > On Thu, Dec 3, 2020 at 6:54 PM André Przywara
> > wrote:
> >>
> >> On 03/12/2020 03:16, Samuel Holland wrote:
> >>
> >> H
On Thu, Dec 3, 2020 at 6:54 PM André Przywara wrote:
>
> On 03/12/2020 03:16, Samuel Holland wrote:
>
> Hi,
>
> > On 12/2/20 7:54 AM, Andre Przywara wrote:
> > ...
> >> +soc {
> >> +compatible = "simple-bus";
> >> +#address-cells = <1>;
> >> +#size-cells = <
On Mon, Nov 23, 2020 at 6:22 PM Icenowy Zheng wrote:
>
>
>
> 于 2020年11月23日 GMT+08:00 上午11:37:43, Chen-Yu Tsai 写到:
> >On Sun, Nov 22, 2020 at 8:40 AM Icenowy Zheng wrote:
> >>
> >> As the USB port on Lichee Pi Zero works in the OTG mode, enable the
> >
: 061035d456c9 ("ARM: dts: sun7i: Add dts file for pcDuino 3 Nano
> > board")
> > Signed-off-by: Adam Sampson
>
> Reviewed-by: Andrew Lunn
Looks like none of the maintainers were listed in the recipients.
Acked-by: Chen-Yu Tsai
--
You received this message becau
On Sun, Nov 22, 2020 at 8:39 AM Icenowy Zheng wrote:
>
> The USB PHY 0 on V3s SoC can also be routed to a pair of EHCI/OHCI
> controllers.
>
> Add the device nodes for the controllers.
>
> Signed-off-by: Icenowy Zheng
Acked-by: Chen-Yu Tsai
--
You received this me
On Sun, Nov 22, 2020 at 8:40 AM Icenowy Zheng wrote:
>
> As the USB port on Lichee Pi Zero works in the OTG mode, enable the
> EHCI/OHCI controllers for it.
You should probably mention that the host controllers work better
than the OTG controller in host mode. Otherwise this change lacks
justific
On Sun, Nov 22, 2020 at 8:40 AM Icenowy Zheng wrote:
>
> The PineCube board features a USB Type-A connector connected to the
> SoC's USB pins.
>
> As this is not designed for being used as a USB device, disable OTG
> controller and route USB to OHCI/EHCI fixedly.
"Fixedly" does not mean what you
he kernel.
> but I can't establish a connection
> El lunes, 19 de octubre de 2020 a las 1:14:46 UTC-3, Chen-Yu Tsai escribió:
>>
>> On Sat, Oct 17, 2020 at 3:08 AM Jernej Škrabec wrote:
>> >
>> > Dne petek, 16. oktober 2020 ob 20:44:38 CEST je Marc Haber napisal(
onnector {
> @@ -19,3 +25,11 @@ &hdmi_connector {
> &emac {
> phy-supply = <®_aldo2>;
> };
> +
> +&mmc1 {
> + vmmc-supply = <®_cldo3>;
Please add vqmmc-supply, which according to the schematic is supplied by ALDO1.
After that,
Acked-b
On Wed, Oct 28, 2020 at 2:32 AM Clément Péron wrote:
>
> Enable Allwinner I2S driver for arm64 defconfig.
>
> Signed-off-by: Clément Péron
Acked-by: Chen-Yu Tsai
--
You received this message because you are subscribed to the Google Groups
"linux-sunxi" group.
To unsub
From: Chen-Yu Tsai
The Ethernet PHY on the Bananapi M3 and Cubietruck Plus have the RX
and TX delays enabled on the PHY, using pull-ups on the RXDLY and
TXDLY pins.
Fix the phy-mode description to correct reflect this so that the
implementation doesn't reconfigure the delays incorrectly.
From: Chen-Yu Tsai
The Ethernet PHY on the Bananapi M2+ has the RX and TX delays
enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
Fix the phy-mode description to correct reflect this so that the
implementation doesn't reconfigure the delays incorrectly. This
happened with c
From: Chen-Yu Tsai
The Ethernet PHY on the Cubieboard 4 and A80 Optimus have the RX
and TX delays enabled on the PHY, using pull-ups on the RXDLY and
TXDLY pins.
Fix the phy-mode description to correct reflect this so that the
implementation doesn't reconfigure the delays incorrectly.
From: Chen-Yu Tsai
The Ethernet PHY on the Libre Computer ALL-H5-CC has the RX and TX
delays enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
Fix the phy-mode description to correct reflect this so that the
implementation doesn't reconfigure the delays incorrectly. This
hap
From: Chen-Yu Tsai
The Ethernet PHY on the Bananapi M64 has the RX and TX delays
enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
Fix the phy-mode description to correct reflect this so that the
implementation doesn't reconfigure the delays incorrectly. This
happened with c
From: Chen-Yu Tsai
The Ethernet PHY on the Cubietruck has the RX and TX delays
enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
Fix the phy-mode description to correct reflect this so that the
implementation doesn't reconfigure the delays incorrectly. This
happened with c
From: Chen-Yu Tsai
The Ethernet PHY on the A31 Hummingbird has the RX and TX delays
enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
Fix the phy-mode description to correct reflect this so that the
implementation doesn't reconfigure the delays incorrectly. This
happened
From: Chen-Yu Tsai
The Ethernet PHY on the Orange Pi Plus 2E has the RX and TX delays
enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
Fix the phy-mode description to correct reflect this so that the
implementation doesn't reconfigure the delays incorrectly. This
happened
From: Chen-Yu Tsai
This reverts commit 75ee680cbd2e4d0156b94f9fec50076361ab12f2.
Turns out the activity and link LEDs on the RJ45 port are active low,
just like on the Orange Pi PC.
Revert the commit that says otherwise.
Fixes: 75ee680cbd2e ("arm: sun8i: orangepi-pc-plus: Set EMAC act
From: Chen-Yu Tsai
The Ethernet PHY on the Bananapi M1+ has the RX and TX delays
enabled on the PHY, using pull-ups on the RXDLY and TXDLY pins.
Fix the phy-mode description to correct reflect this so that the
implementation doesn't reconfigure the delays incorrectly. This
happened with c
On Sat, Oct 17, 2020 at 3:08 AM Jernej Škrabec wrote:
>
> Dne petek, 16. oktober 2020 ob 20:44:38 CEST je Marc Haber napisal(a):
> > Hi Jernej,
> >
> > On Thu, Oct 15, 2020 at 09:23:37PM +0200, Jernej Škrabec wrote:
> > > Dne četrtek, 15. oktober 2020 ob 21:11:39 CEST je Marc Haber napisal(a):
> >
On Mon, Sep 28, 2020 at 10:37 PM Clément Péron wrote:
>
> Hi Chen-Yu,
>
> On Mon, 28 Sep 2020 at 06:40, Chen-Yu Tsai wrote:
> >
> > On Mon, Sep 28, 2020 at 3:29 AM Clément Péron wrote:
> > >
> > > From: Jernej Skrabec
> > >
> > > H6
ej Jirman (3):
> arm64: dts: allwinner: Enable HDMI audio on Orange Pi PC 2
> ARM: dts: sun8i-h3: Enable HDMI audio on Orange Pi PC/One
> arm64: dts: sun50i-h6-orangepi-3: Enable HDMI audio
Acked-by: Chen-Yu Tsai
for all the board DTS file changes.
--
You received this message
distorted.
>
> Set sign extend sample for all the sunxi generations even if they
> are not affected. This will keep consistency and avoid relying on
> default.
>
> Signed-off-by: Marcus Cooper
> Signed-off-by: Clément Péron
Reviewed-by: Chen-Yu Tsai
--
You received this m
On Mon, Sep 28, 2020 at 3:29 AM Clément Péron wrote:
>
> From: Marcus Cooper
>
> Extend the functionality of the driver to include support of 20 and
> 24 bits per sample.
>
> Signed-off-by: Marcus Cooper
> Signed-off-by: Clément Péron
> Acked-by: Maxime Ripard
has a
> runtime PM reference to the device.
>
> Signed-off-by: Samuel Holland
> Signed-off-by: Clément Péron
Reviewed-by: Chen-Yu Tsai
--
You received this message because you are subscribed to the Google Groups
"linux-sunxi" group.
To unsubscribe from this group and stop
-off-by: Clément Péron
> Acked-by: Maxime Ripard
Reviewed-by: Chen-Yu Tsai
--
You received this message because you are subscribed to the Google Groups
"linux-sunxi" group.
To unsubscribe from this group and stop receiving emails from it, send an email
to linux-sunxi+unsubscr.
On Mon, Sep 28, 2020 at 1:32 PM Chen-Yu Tsai wrote:
>
> On Mon, Sep 28, 2020 at 3:29 AM Clément Péron wrote:
> >
> > From: Jernej Skrabec
> >
> > Add the I2S node used by the HDMI and a simple-soundcard to
> > link audio between HDMI and I2S.
> >
On Mon, Sep 28, 2020 at 3:29 AM Clément Péron wrote:
>
> Now that HDMI sound node is available in the SoC dtsi.
> Enable it for this board.
>
> Signed-off-by: Clément Péron
Acked-by: Chen-Yu Tsai
--
You received this message because you are subscribed to the Google Group
On Mon, Sep 28, 2020 at 3:29 AM Clément Péron wrote:
>
> From: Jernej Skrabec
>
> Add the I2S node used by the HDMI and a simple-soundcard to
> link audio between HDMI and I2S.
>
> Note that the HDMI codec requires an inverted frame clock and
> a fixed I2S width. As there is no such option for I2
Cooper
> Signed-off-by: Clément Péron
> Acked-by: Maxime Ripard
> Acked-by: Rob Herring
Acked-by: Chen-Yu Tsai
--
You received this message because you are subscribed to the Google Groups
"linux-sunxi" group.
To unsubscribe from this group and stop receiving emails from
On Mon, Sep 28, 2020 at 12:37 PM Chen-Yu Tsai wrote:
>
> On Mon, Sep 28, 2020 at 3:29 AM Clément Péron wrote:
> >
> > We are actually using a complex formula to just return a bunch of
> > simple values. Also this formula is wrong for sun4i when calling
BTW, it is en
On Mon, Sep 28, 2020 at 3:29 AM Clément Péron wrote:
>
> As slots and slot_width can be overwritter in case set_tdm() is
> called. Avoid to have this logic in set_chan_cfg().
It doesn't seem that set_tdm_slot() would get called concurrently
with hw_params(), at least not for the simple-card famil
lots;
> +
> + /* Map the channels for playback and capture */
> + regmap_write(i2s->regmap, SUN50I_H6_I2S_TX_CHAN_MAP1_REG, 0x76543210);
> + regmap_write(i2s->regmap, SUN50I_H6_I2S_RX_CHAN_MAP1_REG, 0x76543210);
Nit, since it supports up to 16 channels, you might want to ma
ase.
>
> Also drop the i2s params which is unused and return a simple int as
> returning an error code could be out of range for an s8 and there is
> no optim to return a s8 here.
>
> Signed-off-by: Clément Péron
Fixes: 619c15f7fac9 ("ASoC: sun4i-i2s: Change SR and WSS
On Wed, Aug 26, 2020 at 12:45 AM Jernej Škrabec wrote:
>
> Dne torek, 25. avgust 2020 ob 16:46:31 CEST je Chen-Yu Tsai napisal(a):
> > On Tue, Aug 25, 2020 at 9:11 PM Jernej Skrabec
> wrote:
> > > Audio cores need specific clock rates which can't be simply obtain
On Tue, Aug 25, 2020 at 9:11 PM Jernej Skrabec wrote:
>
> Audio cores need specific clock rates which can't be simply obtained by
> adjusting integer multipliers and dividers. HW for such cases supports
> delta-sigma modulation which enables fractional multipliers.
>
> Port H3 delta-sigma table to
Hi,
On Fri, Jul 10, 2020 at 12:51 AM Milos Ladni wrote:
>
> Hi,
>
> I am using mainline kernel on my A20 board and can not get GPIO working for
> some ports.
> I tested them through standard sysfs and for pin number id i used next :
> (position of letter in alphabet - 1) * 32 + pin number
> I t
On Wed, Jul 8, 2020 at 11:59 PM @lex wrote:
>
> Hi,
> Can anyone point to a linux-next kernel with working sound output Jack, 5.7
> linux-next...? Pine64+.
Please at least describe the issue you are facing.
Is the sound card detected? Are you enabling all the needed Kconfig options?
Have you c
Looks like this is a U-boot patch.
Please send it to the proper mailing list and maintainers.
Otherwise it will never have a chance of getting merged.
On Mon, Jun 29, 2020 at 5:16 PM Nazım Gediz Aydındoğmuş
wrote:
>
> A64 has UART4 but it was in conflict with R_UART of older SoCs (e.g. A23).
>
>
On Wed, Apr 29, 2020 at 1:11 AM Robin Murphy wrote:
>
> On 2020-04-28 5:49 pm, Clément Péron wrote:
> > Hi Mark, Rob,
> >
> > On Tue, 28 Apr 2020 at 18:04, Maxime Ripard wrote:
> >>
> >> On Tue, Apr 28, 2020 at 10:54:00AM +0200, Clément Péron wrote:
> >>> Hi Maxime,
> >>>
> >>> On Tue, 28 Apr 202
; Signed-off-by: Pascal Roeleven
Reviewed-by: Chen-Yu Tsai
--
You received this message because you are subscribed to the Google Groups
"linux-sunxi" group.
To unsubscribe from this group and stop receiving emails from it, send an email
to linux-sunxi+unsubscr...@googlegroups.com.
To view
On Wed, Mar 18, 2020 at 12:00 AM Pascal Roeleven wrote:
>
> Move the delay to a function so we can reuse it.
>
> Signed-off-by: Pascal Roeleven
Reviewed-by: Chen-Yu Tsai
--
You received this message because you are subscribed to the Google Groups
"linux-sunxi" grou
On Wed, Mar 18, 2020 at 12:00 AM Pascal Roeleven wrote:
>
> The clock gate must stay on when disabling to ensure proper turning off.
> After one period it will still be disabled anyway.
>
> Signed-off-by: Pascal Roeleven
Reviewed-by: Chen-Yu Tsai
--
You received this message
1 - 100 of 3394 matches
Mail list logo
