Re: [linux-sunxi] messages from bootlin addresses don't show up on the sunxi list

On Wed, Apr 11, 2018 at 12:15:47PM +0200, Luc Verhaegen wrote: > > In any case, Mike, i just provided Maxime with the email address he > registered with, so he can try to fix his account details. I am not able > to alter the email address on this account directly, the only other > option i

Re: [linux-sunxi] messages from bootlin addresses don't show up on the sunxi list

On Wed, Apr 11, 2018 at 11:59:06AM +0200, Maxime Ripard wrote: > On Wed, Apr 11, 2018 at 11:37:10AM +0200, mike.v...@gmail.com wrote: > > 2018-04-10 10:51 GMT+02:00 Luc Verhaegen : > > > > > > This seems like something maxime specific. Mylene seems to manage to > > > post to the

[linux-sunxi] [PATCH 0/5] Add support in dwmac-sun8i for accessing EMAC clock

On some Allwinner SoCs, the EMAC clock register is in another device's emory space, e.g. on A64 it's in the memory space of SRAM controller. This patchset adds the possibility for the device to export the EMAC clock register as a single-register regmap. PATCH 1 adds the device tree binding for

[linux-sunxi] [PATCH 4/5] drivers: soc: sunxi: export a regmap for EMAC clock reg on A64

The A64 SRAM controller memory zone has a EMAC clock register, which is needed by the Ethernet MAC driver (dwmac-sun8i). Export a regmap for this register on A64. Signed-off-by: Icenowy Zheng --- drivers/soc/sunxi/sunxi_sram.c | 48 -- 1

[linux-sunxi] [PATCH 5/5] arm64: allwinner: a64: add SRAM controller device tree node

Allwinner A64 has a SRAM controller, and in the device tree currently we have a syscon node to enable EMAC driver to access the EMAC clock register. As SRAM controller driver can now export regmap for this register, replace the syscon node to the SRAM controller device node, and let EMAC driver to

[linux-sunxi] [PATCH 2/5] net: stmmac: dwmac-sun8i: Use regmap_field for syscon register access

From: Chen-Yu Tsai In several SoCs the EMAC register is in the range of another device, either the SRAM controller (e.g. A64) or the clock controlling unit (e.g. R40). In this situation we're going to let the device to export a regmap which contains only the EMAC register, for the

[linux-sunxi] [PATCH 3/5] net: stmmac: dwmac-sun8i: Allow getting syscon regmap from device

From: Chen-Yu Tsai On the Allwinner R40 SoC, the "GMAC clock" register is in the CCU address space; on the A64 SoC this register is in the SRAM controller address space, and with a different offset. To access the register from another device and hide the internal difference

[linux-sunxi] [PATCH 1/5] dt-bindings: allow dwmac-sun8i to use other devices' exported regmap

On some Allwinner SoCs the EMAC clock register needed by dwmac-sun8i is in another device's memory space. In this situation dwmac-sun8i can use a regmap exported by the other device with only the EMAC clock register. Document this situation in the dwmac-sun8i device tree binding documentation.

Re: [linux-sunxi] [PATCH 1/5] dt-bindings: allow dwmac-sun8i to use other devices' exported regmap

On Mittwoch, 11. April 2018 16:16:37 CEST Icenowy Zheng wrote: > On some Allwinner SoCs the EMAC clock register needed by dwmac-sun8i is > in another device's memory space. In this situation dwmac-sun8i can use > a regmap exported by the other device with only the EMAC clock register. > >

[linux-sunxi] Re: [PATCH 1/3] drm/panel: Add RGB666 variant of Innolux AT070TN92

Hi, Le mercredi 11 avril 2018 à 08:28 +0200, Maxime Ripard a écrit : > On Tue, Apr 10, 2018 at 11:31:27PM +0200, Paul Kocialkowski wrote: > > This adds timings for the RGB666 variant of the Innolux AT070TN92 > > panel, > > as found on the Ainol AW1 tablet. > > > > Signed-off-by: Paul

[linux-sunxi] Re: [PATCH 2/3] ARM: dts: sun7i: Add RGB666 pins definition

Hi, Il 10/04/2018 23:31, Paul Kocialkowski ha scritto: This adds the pins definition for RGB666 LCD panels on the A20. It was imported from the A33 definition, that concernes the same set of pins. Signed-off-by: Paul Kocialkowski --- arch/arm/boot/dts/sun7i-a20.dtsi | 8

Re: [linux-sunxi] Re: [PATCH 2/3] ARM: dts: sun7i: Add RGB666 pins definition

Hi, Le jeudi 12 avril 2018 à 00:22 +0200, Giulio Benetti a écrit : > Hi, > > Il 10/04/2018 23:31, Paul Kocialkowski ha scritto: > > This adds the pins definition for RGB666 LCD panels on the A20. It > > was > > imported from the A33 definition, that concernes the same set of > > pins. > > > >

[linux-sunxi] Re: [PATCH 3/3] ARM: dts: sun7i: Add support for the Ainol AW1 tablet

Hi and thanks for the review ! Le mercredi 11 avril 2018 à 09:06 +0200, Maxime Ripard a écrit : > Hi, > > On Tue, Apr 10, 2018 at 11:31:29PM +0200, Paul Kocialkowski wrote: > > This adds support for the Ainol AW1, an A20-based 7" tablet from > > Ainol. > > > > The following board-specific

Re: [linux-sunxi] Re: [PATCH 2/3] ARM: dts: sun7i: Add RGB666 pins definition

Hi, Il 12/04/2018 01:09, Paul Kocialkowski ha scritto: Hi, Le jeudi 12 avril 2018 à 00:22 +0200, Giulio Benetti a écrit : Hi, Il 10/04/2018 23:31, Paul Kocialkowski ha scritto: This adds the pins definition for RGB666 LCD panels on the A20. It was imported from the A33 definition, that

Re: [linux-sunxi] Re: [PATCH 3/3] ARM: dts: sun7i: Add support for the Ainol AW1 tablet

Hi, Le mardi 10 avril 2018 à 23:35 +0200, Paul Kocialkowski a écrit : > Le mardi 10 avril 2018 à 23:31 +0200, Paul Kocialkowski a écrit : > > This adds support for the Ainol AW1, an A20-based 7" tablet from > > Ainol. > > This version didn't use the dedicated binding for the panel and will > be