Re: [PATCH 1/3] pinctrl: Intel: add RX invertion config

On Wed, Mar 16, 2016 at 2:34 PM, Daniel Vetter wrote: > On Wed, Mar 16, 2016 at 01:27:49PM +0100, Linus Walleij wrote: >> - What is a HPD interrupt? > > hotplug interrupt, fires when you plug in a cable. > >> - What is a Type-C DP HPD? > > usb type C connector can multiplex both

Re: rtl8xxxu 4.4.5(from f23): I get a panic adding a new device to the driver

poma writes: > On 17.03.2016 19:02, Jes Sorensen wrote: >> Jes Sorensen writes: >>> Xose Vazquez Perez writes: Hi, If I do: # echo "0bda 8176" > /sys/bus/usb/drivers/rtl8xxxu/new_id >>> >>> Hi Xose,

[PATCH v2 10/11] usb: musb: da8xx: Use devm in probe

Simplify things a bit by using devm functions where possible. Signed-off-by: David Lechner --- v2 changes: This is part of a previous patch that was split. No changes from previous version. drivers/usb/musb/da8xx.c | 28 1 file changed, 8

Re: [PATCH v5 6/6] mfd: intel_vuport: Add Intel virtual USB port MFD Driver

On 03/18/2016 04:09 PM, Lee Jones wrote: > On Fri, 18 Mar 2016, Lu Baolu wrote: > >> Some Intel platforms have an USB port mux controlled by GPIOs. >> There's a single ACPI platform device that provides both USB ID >> extcon device and a USB port mux device. This MFD driver will >> split the 2

Re: "reset full-speed USB device number 6 using ehci-pci" with Dell Inspiron 15R 5537

On Fri, 18 Mar 2016 12:36:42 -0400 (EDT) Alan Stern wrote: > All right, I have taken Oliver's suggestion. The patch below refactors > the code to consolidate the common activities in a new function, > hid_restart_io(). > > Daniel, can you please test this patch?

[PATCH v7 3/4] gadget: Integrate with the usb gadget supporting for usb charger

When the usb gadget supporting for usb charger is ready, the usb charger should get the type by the 'get_charger_type' callback which is implemented by the usb gadget operations, and get the usb charger pointer from struct 'usb_gadget'. Signed-off-by: Baolin Wang ---

Re: [GIT PULL] USB driver patches for 4.6-rc1

On Fri, Mar 18, 2016 at 3:51 PM, Linus Torvalds wrote: > > The commit that ends up being marked bad is odd, but there it is: > 69bec7259853 "USB: core: let USB device know device node". Confirmed. Not only did it bisect to that, reverting it on top of the current

[PATCH v1 2/5] usb: gadget: pch_udc: convert to devres API

devres API allows to make error paths cleaner and less error prone. Convert the driver to use it. Signed-off-by: Andy Shevchenko --- drivers/usb/gadget/udc/pch_udc.c | 98 +++- 1 file changed, 26 insertions(+), 72

RE: [PATCH 2/3] usb: dwc3: increase maximum number of TRBs per endpoint

From: Felipe Balbi > Bin Liu writes: > > [ text/plain ] > > Hi, > > > > On Fri, Mar 11, 2016 at 6:54 AM, Felipe Balbi > > wrote: > >> previously we were using a maximum of 32 TRBs per > >> endpoint. With each TRB being 16 bytes long, we were > >>

Re: [GIT PULL] USB driver patches for 4.6-rc1

On Wed, Mar 16, 2016 at 5:09 PM, Greg KH wrote: > > USB patches for 4.6-rc1 > > Here is the big USB patchset for 4.6-rc1. Something in this - or possibly the tty pull, but that doesn't sound very likely - has killed my USB keyboard on my desktop. I'm bisecting right

ehci and ohci reset number doubt

Hi, In the files of ohci-platform.c and ehci-platform.c, they have only a control reset. Can the files have one more controller reset? Our usb2 controller using a synopsis, need bus reset, root hub reset, utmi reset. The usb controller of reset and clock have the same number. Such as:

[PATCH v4 0/7] usb: add support for Intel dual role port mux

Intel SOC chips are featured with USB dual role. The host role is provided by Intel xHCI IP, and the gadget role is provided by IP from designware. Tablet platform designs always share a single port for both host and gadget controllers. There is a mux to switch the port to the right controller

[PATCH v1 4/5] usb: gadged: pch_udc: get rid of redundant assignments

It seems there are leftovers of some assignments which are not used anymore. Compiler even warns us about: drivers/usb/gadget/udc/pch_udc.c:2022:22: warning: variable ‘dev’ set but not used [-Wunused-but-set-variable] drivers/usb/gadget/udc/pch_udc.c:2639:9: warning: variable ‘ret’ set but not

Re: [PATCH] USB: serial: ftdi_sio: Add support for ICP DAS I-756xU devices

On Wed, Mar 16, 2016 at 11:55:49AM -0400, Josh Boyer wrote: > On Thu, Mar 10, 2016 at 9:48 AM, Josh Boyer wrote: > > A Fedora user reports that the ftdi_sio driver works properly for the > > ICP DAS I-7561U device. Further, the user manual for these devices > >

[PATCH 1/5] usb: xhci: add quirk flag for broken PED bits

From: Felipe Balbi Some devices from Texas Instruments suffer from a silicon bug where Port Enabled/Disabled bit should not be used to silence an erroneous device. The bug is so that if port is disabled with PED bit, an IRQ for device removal (or attachment) will never fire.

Re: Composite USB device reset /drivers/usb/core/hub.c - binding order problem

On Thu, Mar 17, 2016 at 11:09:20AM +0100, Mikolaj Ch wrote: > Hi, > > I have a composite usb device where order of binding the drivers to > interfaces matters. Ugh, really? That's a horrid device, what is it? > When the device is plugged in binding is from 0-th till n-th interface > but in

Re: [PATCH] usb: xhci: Fix incomplete PM resume operation due to XHCI commmand timeout

On 18.03.2016 09:01, Rajesh Bhagat wrote: We are facing issue while performing the system resume operation from STR where XHCI is going to indefinite hang/sleep state due to wait_for_completion API called in function xhci_alloc_dev for command TRB_ENABLE_SLOT which never completes. Now,

Re: [PATCH 0/5] usb: dwc3: xhci: Add quirk for defective Port Enable/disable

Mathias, Roger Quadros writes: > Some devices from Texas Instruments suffer from > a silicon bug where XHCI Port Enabled/Disabled bit > should not be used to silence an erroneous device. > > The bug is so that if port is disabled with PED > bit, an IRQ for device removal (or

[PATCH] ims-pcu: sanity check against missing interfaces

A malicious device missing interface can make the driver oops. Add sanity checking. Signed-off-by: Oliver Neukum CC: sta...@vger.kernel.org --- drivers/input/misc/ims-pcu.c | 4 1 file changed, 4 insertions(+) diff --git a/drivers/input/misc/ims-pcu.c

Re: [PATCH 2/5] ARM: davinci: da8xx: add usb phy clocks

On 03/16/2016 08:58 PM, David Lechner wrote: +static struct clk usb20_clk = { +.name= "usb20", +.parent= _sysclk2, +.lpsc= DA8XX_LPSC1_USB20, +.gpsc= 1, +}; Why move it? For organization, to keep all of the USB clocks together. I can leave

Re: [PATCH v2 06/11] phy: da8xx-usb: new driver for DA8XX SoC USB PHY

On 3/17/2016 5:26 AM, David Lechner wrote: This is a new phy driver for the SoC USB controllers on the TI DA8XX DA8xx, please. family of microcontrollers. The USB 1.1 PHY is just a simple on/off. The USB 2.0 PHY also allows overriding the VBUS and ID pins. Signed-off-by: David Lechner

[PATCH 5/5] usb: dwc3: host: pass BROKEN_PE flag for known broken revisions

From: Felipe Balbi Now that we have a broken pe quirk flag, dwc3 can tell XHCI core about it. Signed-off-by: Felipe Balbi Signed-off-by: Sekhar Nori Signed-off-by: Roger Quadros --- drivers/usb/dwc3/host.c | 12

Re: [PATCH v2 05/11] dt-bindings: Add bindings for phy-da8xx-usb

On Wed, Mar 16, 2016 at 09:26:38PM -0500, David Lechner wrote: > Device tree binding for new phy-da8xx-usb driver. > > Signed-off-by: David Lechner > --- > > v2 changes: This is new patch in v2. > > > .../devicetree/bindings/phy/phy-da8xx-usb.txt | 34 >

[PATCH v2 09/11] usb: ohci-da8xx: Remove code that references mach

Including mach/* is frowned upon in device drivers, so get rid of it. This replaces usb20_clk and code that pokes CFGCHIP2 with a proper phy driver. Signed-off-by: David Lechner --- v2 changes: Uses the new phy driver instead of using a second clock.

Re: [RFT PATCH 2/2] Revert "usb: dwc2: Fix probe problem on bcm2835"

On 3/10/2016 11:14 AM, John Youn wrote: > On 3/9/2016 11:06 AM, Doug Anderson wrote: >> Stefan, >> >> On Wed, Mar 9, 2016 at 11:01 AM, Stefan Wahren >> wrote: >>> Doug Anderson hat am 7. März 2016 um 22:30 geschrieben:

Re: [PATCH v10 1/9] dt-bindings: phy: Add NVIDIA Tegra XUSB pad controller binding

On 03/04/2016 09:19 AM, Thierry Reding wrote: From: Thierry Reding The NVIDIA Tegra XUSB pad controller provides a set of pads, each with a set of lanes that are used for PCIe, SATA and USB. .../bindings/phy/nvidia,tegra124-xusb-padctl.txt | 376 +

Re: [PATCH] qmi_wwan: Added support for Gemalto's Cinterion PHxx WWAN interface

Schemmel Hans-Christoph writes: > Added support for Gemalto's Cinterion PHxx WWAN interfaces > by adding QMI_FIXED_INTF with Cinterion's VID and PID. > > PHxx can have: > 2 RmNet Interfaces (PID 0x0082) or > 1 RmNet + 1 USB Audio interface (PID 0x0083). > >

Re: [PATCH v5 6/6] mfd: intel_vuport: Add Intel virtual USB port MFD Driver

On Fri, Mar 18, 2016 at 04:43:21PM +0800, Lu Baolu wrote: > > > On 03/18/2016 04:09 PM, Lee Jones wrote: > > On Fri, 18 Mar 2016, Lu Baolu wrote: > > > >> Some Intel platforms have an USB port mux controlled by GPIOs. > >> There's a single ACPI platform device that provides both USB ID > >>

[GIT PULL] USB driver patches for 4.6-rc1

The following changes since commit fc77dbd34c5c99bce46d40a2491937c3bcbd10af: Linux 4.5-rc6 (2016-02-28 08:41:20 -0800) are available in the git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb.git/ tags/usb-4.6-rc1 for you to fetch changes up to

Re: [PATCH v2 04/11] ARM: davinci: da8xx: add usb phy clocks

On 3/17/2016 5:26 AM, David Lechner wrote: Up to this point, the USB phy clock configuration was handled manually in the board files and in the usb drivers. This adds proper clocks so that the usb drivers can use clk_get and clk_enable and not have to worry about the details. Also, the related

[PATCH v2 03/11] ARM: davinci: da850: use clk->set_parent for async3

The da850 family of processors has an async3 clock domain that can be muxed to either pll0_sysclk2 or pll1_sysclk2. Now that the davinci clocks have a set_parent callback, we can use this to control the async3 mux instead of a stand-alone function. This adds a new async3_clk and sets the

usb: dwc2: Kernel 4.5 and socfpga problem

G'day, Has anyone successful run the usb dwc2 from kenerl 4.5 on an socfpga. Inital I've had to remove the phys & phy-names property from the DT for it to even probe. Otherwise it was returning PROBE_DEFERED. The 4.4 driver seems to be getting the same error but it continued loading

[PATCH 3/5] usb: host: xhci: add broken pe quirk flag to pdata

From: Felipe Balbi Let platform_data users pass broken pe flag to xhci driver. Signed-off-by: Felipe Balbi Signed-off-by: Sekhar Nori Signed-off-by: Roger Quadros --- include/linux/usb/xhci_pdriver.h | 2 ++ 1 file changed,

Re: [PATCH] ims-pcu: sanity check against missing interfaces

On Thu, Mar 17, 2016 at 03:10:47PM +0100, Oliver Neukum wrote: > A malicious device missing interface can make the driver oops. > Add sanity checking. > > Signed-off-by: Oliver Neukum > CC: sta...@vger.kernel.org Applied, thank you. > --- > drivers/input/misc/ims-pcu.c | 4

[PATCH v1 1/5] usb: gadged: pch_udc: PCI core handles power state for us

There is no need to repeat the work that is already done in the PCI driver core. The patch removes excerpts from suspend and resume callbacks. Note that there is no more calls performed to enable or disable a PCI device during suspend-resume cycle. Nowadays they seems to be superflous. Someone

[PATCH v4 1/7] extcon: usb-gpio: add device binding for platform device

This is needed to handle the GPIO connected USB ID pin found on Intel Baytrail devices. Signed-off-by: Lu Baolu Reviewed-by: Felipe Balbi Acked-by: Chanwoo Choi --- drivers/extcon/extcon-usb-gpio.c | 7 +++ 1 file changed,

[PATCH v4 2/7] extcon: usb-gpio: add support for ACPI gpio interface

GPIO resource could be retrieved through APCI as well. Signed-off-by: Lu Baolu Reviewed-by: Felipe Balbi Acked-by: Chanwoo Choi --- drivers/extcon/extcon-usb-gpio.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff

[PATCH v4 7/7] mfd: intel_vuport: Add Intel virtual USB port MFD Driver

Some Intel platforms have an USB port mux controlled by GPIOs. There's a single ACPI platform device that provides both USB ID extcon device and a USB port mux device. This MFD driver will split the 2 devices for their respective drivers. Signed-off-by: Lu Baolu

Re: rtl8xxxu 4.4.5(from f23): I get a panic adding a new device to the driver

On 17.03.2016 19:02, Jes Sorensen wrote: > Jes Sorensen writes: >> Xose Vazquez Perez writes: >>> Hi, >>> >>> If I do: >>> # echo "0bda 8176" > /sys/bus/usb/drivers/rtl8xxxu/new_id >> >> Hi Xose, >> >> Yes please don't do that. The rtl8xxxu driver

Re: [PATCH v5 3/6] usb: mux: add common code for Intel dual role port mux

Hi Chanwoo, On 03/18/2016 03:52 PM, Chanwoo Choi wrote: > Hi Baolu, > > On 2016년 03월 18일 15:32, Lu Baolu wrote: >> Several Intel PCHs and SOCs have an internal mux that is used to >> share one USB port between device controller and host controller. >> >> A usb port mux could be abstracted as the

Re: [PATCH 0/5] da8xx USB clocks

On 3/16/2016 1:35 AM, David Lechner wrote: I've implemented some proper clocks for the USB PHY clocks on da8xx. For those not familiar with the architecture, the SoC has one USB 1.1 OHCI port and one USB 2.O OTG port. The USB 1.1 PHY clock can optionally be supplied by the PLL in the USB 2.0

Re: Composite USB device reset /drivers/usb/core/hub.c - binding order problem

Thanks, right I was looking at older version of Linux (3.8) before https://github.com/torvalds/linux/commit/6aec044cc2f5670cf3b143c151c8be846499bd15. But the question remains why post_reset method is called in reverse order for interfaces. Is there any reason for this ? especially after rebind has

Re: [PATCH 1/5 v10] dt/bindings: Add binding for the DA8xx MUSB driver

On 11.03.2016 19:24, Sergei Shtylyov wrote: On 03/11/2016 07:21 PM, Petr Kulhavy wrote: I am having 2nd thought on parsing the clock prop, Sergei's comment might be better. I will look more on this over this weekend. (DT is not in my expertise...) Regards, -Bin. I like Sergei's comment as

[PATCH v5 0/6] usb: add support for Intel dual role port mux

Intel SOC chips are featured with USB dual role. The host role is provided by Intel xHCI IP, and the gadget role is provided by IP from designware. Tablet platform designs always share a single port for both host and gadget controllers. There is a mux to switch the port to the right controller

Re: [PATCH 3/5] ARM: davinci: da8xx: add cfgchip2 to resources

On 03/16/2016 09:22 PM, Sergei Shtylyov wrote: Also, I am not finding any existing data structure to pass the musb set_mode function to the phy in either usb_phy or usb_otg. Setting the mode (host/peripheral/otg) is done in the same PHY register, so it seems like it should be implemented in the

Re: [PATCH 3/5] ARM: davinci: da8xx: add cfgchip2 to resources

On 03/16/2016 09:14 PM, David Lechner wrote: Also, I am not finding any existing data structure to pass the musb set_mode function to the phy in either usb_phy or usb_otg. Setting the mode (host/peripheral/otg) is done in the same PHY register, so it seems like it should be implemented in the

Re: [PATCH v2 11/11] usb: musb: da8xx: Remove mach code

On 03/17/2016 08:11 AM, Sergei Shtylyov wrote: On 3/17/2016 5:26 AM, David Lechner wrote: glue->dev= >dev; pdata->platform_ops= _ops; -glue->phy = usb_phy_generic_register(); -if (IS_ERR(glue->phy)) { -ret = PTR_ERR(glue->phy); -goto

Re: [PATCH 2/5] ARM: davinci: da8xx: add usb phy clocks

On 03/16/2016 01:04 PM, Sergei Shtylyov wrote: No, I mean why is not this implemented as a part of clk_set_parent()? There is not currently any framework for mux clocks in the davinci clocks. I am hoping to eventually get the davinci clocks moved to the common clock framework, so this

Re: [PATCH v2] usb/core: usb_alloc_dev(): fix setting of ->portnum

On Thu, 17 Mar 2016, Nicolai Stange wrote: > With commit 69bec7259853 ("USB: core: let USB device know device node"), > the port1 argument of usb_alloc_dev() gets overwritten as follows: > > ... usb_alloc_dev(..., unsigned port1) > { > ... > if (!parent->parent) { > port1 =

Re: [PATCH v5 3/6] usb: mux: add common code for Intel dual role port mux

Hi Baolu, On 2016년 03월 18일 15:32, Lu Baolu wrote: > Several Intel PCHs and SOCs have an internal mux that is used to > share one USB port between device controller and host controller. > > A usb port mux could be abstracted as the following elements: > 1) mux state: HOST or PERIPHERAL; > 2) an

Re: [PATCH] usb: chipidea: Configure DMA properties and ops from DT

On Fri, Mar 18, 2016 at 09:54:14AM +0800, Peter Chen wrote: > Although I don't know what kinds of bugs it may have, it may be > met before, otherwise, why most of platform drivers need to call > dma_set_coherent_mask or dma_coerce_mask_and_coherent explicitly See Documentation/DMA-API.txt,

[PATCH v5 6/6] mfd: intel_vuport: Add Intel virtual USB port MFD Driver

Some Intel platforms have an USB port mux controlled by GPIOs. There's a single ACPI platform device that provides both USB ID extcon device and a USB port mux device. This MFD driver will split the 2 devices for their respective drivers. Signed-off-by: Lu Baolu

Re: Crash when resuming system (related to USB?) with 4.4

On Fri, Mar 18, 2016 at 10:36:07AM +0100, Frederik Himpe wrote: > Half of the time when resuming my system, it completely hangs. I managed to > find this trace in pstore: > > > ==./dmesg-efi-145829002001001== > Oops#1 Part1 > <4>[20505.738344]  [] ? hub_event+0x75d/0x14f0 [usbcore] >

Re: [PATCH] uas: Limit qdepth at the scsi-host level

On Sat, 2016-03-19 at 09:59 +0100, Hans de Goede wrote: > Commit 64d513ac31bd ("scsi: use host wide tags by default") causes > the scsi-core to queue more cmnds then we can handle on devices with > multiple LUNs, limit the qdepth at the scsi-host level instead of > per slave to fix this. Help me

Re: [PATCH v2 10/11] usb: musb: da8xx: Use devm in probe

Hello. On 3/17/2016 5:26 AM, David Lechner wrote: Simplify things a bit by using devm functions where possible. Signed-off-by: David Lechner --- v2 changes: This is part of a previous patch that was split. No changes from previous version. drivers/usb/musb/da8xx.c

Re: [PATCH 2/3] usb: dwc3: increase maximum number of TRBs per endpoint

Hi, Bin Liu writes: > [ text/plain ] > Hi, > > On Fri, Mar 11, 2016 at 6:54 AM, Felipe Balbi > wrote: >> previously we were using a maximum of 32 TRBs per >> endpoint. With each TRB being 16 bytes long, we were >> using 512 bytes of memory for

Re: [PATCH v1] usb: xhci: applying XHCI_PME_STUCK_QUIRK to Intel BXT B0 host

On Wed, Mar 16, 2016 at 11:41:50AM +0100, Robert Dobrowolski wrote: > From: Rafal Redzimski > > Signed-off-by: Rafal Redzimski We can't take patches without any changelog entry :( -- To unsubscribe from this list: send the line

[PATCH v5 5/6] usb: mux: add driver for Intel drcfg controlled port mux

Several Intel PCHs and SOCs have an internal mux that is used to share one USB port between device controller and host controller. The mux is handled through the Dual Role Configuration Register. Signed-off-by: Heikki Krogerus Signed-off-by: Lu Baolu

Re: [PATCH] uas: Limit qdepth at the scsi-host level

Hello. On 3/19/2016 11:59 AM, Hans de Goede wrote: Commit 64d513ac31bd ("scsi: use host wide tags by default") causes the scsi-core to queue more cmnds then we can handle on devices with SCSI core? Commands? multiple LUNs, limit the qdepth at the scsi-host level instead of Queue

Re: [PATCH 1/2] usb: dwc3: core: Introduce dwc3_device_reinit()

Hi, Roger Quadros writes: > [ text/plain ] > We will need this function for a workaround. > The function issues a softreset only to the device > controller and performs minimal re-initialization > so that the device controller can be usable. > > As some code is similar to

[PATCH v2 07/11] ARM: davinci: da8xx: Add USB PHY platform declaration

There is now a proper phy driver for the DA8XX SoC USB PHY. This adds the platform device declarations needed to use it. Signed-off-by: David Lechner --- v2 changes: This is new patch in v2. arch/arm/mach-davinci/include/mach/da8xx.h | 1 + arch/arm/mach-davinci/usb.c

Re: [PATCH v10 6/9] dt-bindings: usb: Add NVIDIA Tegra XUSB controller binding

On 03/04/2016 09:19 AM, Thierry Reding wrote: From: Thierry Reding Add device-tree binding documentation for the XUSB controller present on Tegra124 and later SoCs. This controller supports USB 3.0 via an xHCI compliant interface. Based on work by Andrew Bresticker

Re: [PATCH v10 2/9] dt-bindings: pinctrl: Deprecate Tegra XUSB pad controller binding

On 03/04/2016 09:19 AM, Thierry Reding wrote: From: Thierry Reding This is an old version of the binding that isn't flexible enough to describe all aspects of the XUSB pad controller. Specifically with the addition of XUSB support (for SuperSpeed USB) the existing binding

Re: [PATCH v4 3/7] usb: mux: add common code for Intel dual role port mux

Hi Chanwoo, On 03/17/2016 02:07 PM, Chanwoo Choi wrote: > Hi Lu, > > To handle extcon (external connector), I implemented the unique id > for each external connector on patch[1] instead of using the ambiguous string > type. > [1] 2a9de9c0f08d6 (extcon: Use the unique id for external connector

Re: [RFC PATCH 1/4] usb: chipidea: Do not rely on OTG while using extcon

Hi Sanchayan, I recommend that you use the unique id (ex. EXTCON_USB, EXTCON_USB_HOST) when getting/setting the state of external connector with extcon functions - extcon_get_cable_state() is deprecated -> extcon_get_cable_state_() - extcon_set_cable_state() is deprecated ->

Re: [PATCH v4 3/7] usb: mux: add common code for Intel dual role port mux

Hi Lu, To handle extcon (external connector), I implemented the unique id for each external connector on patch[1] instead of using the ambiguous string type. [1] 2a9de9c0f08d6 (extcon: Use the unique id for external connector instead of string) So I recommend that you should use the unique id

[PATCH v5 1/6] extcon: usb-gpio: add device binding for platform device

This is needed to handle the GPIO connected USB ID pin found on Intel Baytrail devices. Signed-off-by: Lu Baolu Reviewed-by: Felipe Balbi Acked-by: Chanwoo Choi --- drivers/extcon/extcon-usb-gpio.c | 7 +++ 1 file changed,

[PATCH 2/5] usb: dwc3: core: define macros for newest revisions

From: Felipe Balbi dwc3 has released two other versions (2.90a and 3.00a), this patch just adds revision macros. Signed-off-by: Felipe Balbi Signed-off-by: Sekhar Nori Signed-off-by: Roger Quadros --- drivers/usb/dwc3/core.h

Re: [PATCH] cypress_m8: add sanity checking

On Thu, Mar 17, 2016 at 11:07:31AM +0100, Oliver Neukum wrote: > An attack using missing endpoints exists. > CVE-2016-3137 > > Signed-off-by: Oliver Neukum > CC: sta...@vger.kernel.org > --- > drivers/usb/serial/cypress_m8.c | 12 ++-- > 1 file changed, 6

[PATCH 0/5] usb: dwc3: xhci: Add quirk for defective Port Enable/disable

Hi, Some devices from Texas Instruments suffer from a silicon bug where XHCI Port Enabled/Disabled bit should not be used to silence an erroneous device. The bug is so that if port is disabled with PED bit, an IRQ for device removal (or attachment) will never fire. Just for the sake of

Re: [PATCH 3/5] ARM: davinci: da8xx: add cfgchip2 to resources

Hello. On 3/16/2016 6:46 AM, David Lechner wrote: No, this register is shared b/w MUSB and OHCI. The proper thing to do is to write the PHY driver and let it control this shared register. OK. I've started working on this. I am looking at using struct usb_phy, however, enum usb_phy_type

Re: PROBLEM: Osprey 2 Mini sometimes resets every 200ms forever

On Wed, 16 Mar 2016, ais523 wrote: > One line summary of the problem: > Connecting an Osprey 2 Mini sometimes causes it to reset every 200ms > > Full description of the problem/report: > This report is about a hardware compatibility issue related to the > Osprey 2 Mini, a cellular router that

[PATCH v2] usb/core: usb_alloc_dev(): fix setting of ->portnum

With commit 69bec7259853 ("USB: core: let USB device know device node"), the port1 argument of usb_alloc_dev() gets overwritten as follows: ... usb_alloc_dev(..., unsigned port1) { ... if (!parent->parent) { port1 = usb_hcd_find_raw_port_number(..., port1); } ... }

Re: [PATCH 4/5] usb: ohci-da8xx: Remove clock code that references mach

On 03/16/2016 09:50 AM, Alan Stern wrote: Is it theoretically impossible for a da8xx platform to have more than one OHCI controller? If it isn't, you better not use static variables to hold per-device data. Yes, it is theoretically impossible, but probably better to not use static variables

Re: [PATCH] usb: chipidea: Configure DMA properties and ops from DT

On Monday 14 March 2016 18:51:08 Peter Chen wrote: > On Wed, Mar 09, 2016 at 05:16:50PM -0600, Li Yang wrote: > > On Tue, Mar 8, 2016 at 9:40 PM, Bjorn Andersson > > wrote: > > > On Tue, Mar 8, 2016 at 11:52 AM, Li Yang wrote: > > >> On Wed, Mar

Re: [PATCH 2/2] usb: dwc3: gadget: usb: dwc3: run/stop metastability workaround

On 16/03/16 15:14, Felipe Balbi wrote: > Roger Quadros writes: > >> [ text/plain ] >> The existing workaround of forcing DEVSPD to SUPER_SPEED >> for HIGH_SPEED ports is causing another side effect >> which causes erratic interrupts and delayed gadget >> enumeration of upto 2

[PATCH] usb/core: usb_alloc_dev(): fix setting of ->portnum

With commit 69bec7259853 ("USB: core: let USB device know device node"), the port1 argument of usb_alloc_dev() gets overwritten as follows: ... usb_alloc_dev(..., unsigned port1) { ... if (!parent->parent) { port1 = usb_hcd_find_raw_port_number(..., port1); } ... }

Re: [PATCH 2/5] ARM: davinci: da8xx: add usb phy clocks

On 03/16/2016 07:27 AM, Sergei Shtylyov wrote: +static struct clk usb20_clk = { +.name= "usb20", +.parent= _sysclk2, +.lpsc= DA8XX_LPSC1_USB20, +.gpsc= 1, +}; Why move it? For organization, to keep all of the USB clocks together. I can

Re: [PATCH v2 09/11] usb: ohci-da8xx: Remove code that references mach

On Wed, 16 Mar 2016, David Lechner wrote: > Including mach/* is frowned upon in device drivers, so get rid of it. > > This replaces usb20_clk and code that pokes CFGCHIP2 with a proper phy > driver. > > Signed-off-by: David Lechner > --- > > v2 changes: Uses the new phy

Re: ehci and ohci reset number doubt

On Thu, Mar 17, 2016 at 02:16:56AM +, Lipengcheng wrote: > > > Hi, Please resend in non-html format so that the mailing list does not reject your messages. thanks, greg k-h -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to

[PATCH v3] cypress_m8: add sanity checking

An attack using missing endpoints exists. CVE-2016-3137 Signed-off-by: Oliver Neukum CC: sta...@vger.kernel.org v1 - add sanity check v2 - add error logging v3 - correct error message --- drivers/usb/serial/cypress_m8.c | 11 +-- 1 file changed, 5 insertions(+), 6

Re: [RFT PATCH 2/2] Revert "usb: dwc2: Fix probe problem on bcm2835"

Hi, > Martin Sperl hat am 19. März 2016 um 11:10 > geschrieben: > > > > On 19.03.2016, at 10:52, Stefan Wahren wrote: > > > > Hi, > > > >> Martin Sperl hat am 19. März 2016 um 08:44 > >> geschrieben: > >> > >> > >> > >>>

[PATCH 1/2] usb: dwc3: core: Introduce dwc3_device_reinit()

We will need this function for a workaround. The function issues a softreset only to the device controller and performs minimal re-initialization so that the device controller can be usable. As some code is similar to dwc3_core_init() take out common code into dwc3_get_gctl_quirks(). We add a

RE: USB Ethernet/RNDIS Gadget issue

Hi, > > I finally bisect the kernel (I didn't known that command, thanks for the > > tip) > > and found that it doesn't work anymore from this commit : > > > > b0bac2581c1918cc4ab0aca01977ad69f0bc127a is the first bad commit > > commit b0bac2581c1918cc4ab0aca01977ad69f0bc127a > > Author: Robert

[PATCH v5 3/6] usb: mux: add common code for Intel dual role port mux

Several Intel PCHs and SOCs have an internal mux that is used to share one USB port between device controller and host controller. A usb port mux could be abstracted as the following elements: 1) mux state: HOST or PERIPHERAL; 2) an extcon cable which triggers the change of mux state between

[PATCH] Input: gtco: fix crash on detecting device without endpoints

The gtco driver expects at least one valid endpoint. If given malicious descriptors that specify 0 for the number of endpoints, it will crash in the probe function. Ensure there is at least one endpoint on the interface before using it. Fix minor coding style issue. The full report of this issue

[PATCH v2 11/11] usb: musb: da8xx: Remove mach code

Use the new phy-da8xx-usb driver to take the place of the mach code that pokes CFGCHIP2 in the da8xx musb glue driver. Signed-off-by: David Lechner --- v2 changes: This is part of a previous patch that was split. This version uses the new phy driver instead of a second

RE: RE

Please confirm receipt of my previous mail..When can i call you -- To unsubscribe from this list: send the line "unsubscribe linux-usb" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html

Re: [PATCH] digi_acceleport: do sanity checking for the number of ports

On Wed, 2016-03-16 at 10:58 -0400, Johan Hovold wrote: > Note that this needs to be done for not just the port structure > (ds_oob_port) by making sure that the serial->num_ports is large > enough, > but also that the oob-port has indeed got a write urb allocated (i.e. > that all expected bulk-out

[PATCH] usb: dwc2: do not override forced dr_mode in gadget setup

The host/device mode set with dr_mode should be kept all the time, not being changed to OTG in gadget setup (by overriding CFGUSB_FORCEDEVMODE and CFGUSB_FORCEHOSTMODE bits). Signed-off-by: Przemek Rudy --- drivers/usb/dwc2/gadget.c | 23 ++- 1 file changed, 18

[PATCH v2 00/11] da8xx USB clocks

OK, ready for round two. I've added a new callback in the davinci clocks so that they can properly handle clock muxing. The clock functions are pretty much the same as in the previous patch set other than clk_set_parent() now works. The next new thing is a phy driver for the CFGCHIP2 register

Re: [PATCH 1/2] usb: dwc3: core: Introduce dwc3_device_reinit()

heh, +john Felipe Balbi writes: > [ text/plain ] > > Hi, > > Roger Quadros writes: >> [ text/plain ] >> We will need this function for a workaround. >> The function issues a softreset only to the device >> controller and performs minimal re-initialization >> so

Re: [PATCH] usb_driver_claim_interface: add sanity checking

On Wed, 16 Mar 2016, Oliver Neukum wrote: > Attacks that trick drivers into passing a NULL pointer > to usb_driver_claim_interface() using forged descriptors are > known. This thwarts them by sanity checking. I'm curious -- how do these attacks carry out their trickery? Alan Stern -- To

Re: [PATCH v7 2/4] gadget: Support for the usb charger framework

Hi Baolin, [auto build test WARNING on v4.5-rc7] [also build test WARNING on next-20160316] [if your patch is applied to the wrong git tree, please drop us a note to help improving the system] url:

Re: problems with cp210x

On Thu, Mar 17, 2016 at 05:41:13PM +0100, walter harms wrote: > > > Am 29.02.2016 17:10, schrieb Greg KH: > > On Mon, Feb 29, 2016 at 02:47:45PM +0100, walter harms wrote: > >> Hello List, > >> > >> is someone aware of a problem with DTR in that driver ? > >> > >> I use: Linux version

Re: usb: dwc2: Kernel 4.5 and socfpga problem

On 18/03/2016 10:41 PM, Dinh Nguyen wrote: On 03/17/2016 09:35 PM, Phil Reid wrote: G'day, Has anyone successful run the usb dwc2 from kenerl 4.5 on an socfpga. Yes. I just tested on the devkit and USB is working fine: [0.655761] ffb4.usb supply vusb_d not found, using dummy

[PATCH] qmi_wwan: Added support for Gemalto's Cinterion PHxx WWAN interface

Added support for Gemalto's Cinterion PHxx WWAN interfaces by adding QMI_FIXED_INTF with Cinterion's VID and PID. PHxx can have: 2 RmNet Interfaces (PID 0x0082) or 1 RmNet + 1 USB Audio interface (PID 0x0083). Signed-off-by: Hans-Christoph Schemmel ---

Re: [PATCH] usb: chipidea: Configure DMA properties and ops from DT

On Thu, Mar 17, 2016 at 04:52:55PM +0100, Arnd Bergmann wrote: > On Monday 14 March 2016 18:51:08 Peter Chen wrote: > > On Wed, Mar 09, 2016 at 05:16:50PM -0600, Li Yang wrote: > > > On Tue, Mar 8, 2016 at 9:40 PM, Bjorn Andersson > > > wrote: > > > > On Tue, Mar 8,

Re: PROBLEM: Osprey 2 Mini sometimes resets every 200ms forever

On Wed, 16 Mar 2016, ais523 wrote: > On Wed, 2016-03-16 at 10:07 -0400, Alan Stern wrote: > > On Wed, 16 Mar 2016, ais523 wrote: > > > One line summary of the problem: > > > Connecting an Osprey 2 Mini sometimes causes it to reset every > > 200ms > > > > Please post a usbmon trace showing what

Re: [PATCH 5/5] usb: musb-da8xx: remove board-specific clock handling

Hello. On 3/16/2016 1:37 AM, David Lechner wrote: This driver should not have to worry about how the clocks are configured on a system. Added a usb20_phy clock to handle the USB 2.0 PLL clock externally. Also changed to using devm_ to simplify code a bit. This should preferably be split

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