Hi Tomeu,
Am Montag, 23. April 2018, 15:24:04 CEST schrieb Tomeu Vizoso:
> Hi,
>
> could this patch be picked up, please? Or if for some reason it cannot
> be, could the commit that introduced the regression be reverted?
>
> It's causing some tests in KernelCI to fail:
>
>
; Minas
>
> > With this patch applied, apart from not seeing the NULL-ptr, I also get
> > display output on my rk3288-veycron Chromebook again, so
> >
> > Tested-by: Heiko Stuebner <he...@sntech.de>
> >
> >> v2: Only overwrite the error in the
Am Montag, 26. März 2018, 11:00:01 CEST schrieb Tomeu Vizoso:
> devm_regulator_get_optional returns -ENODEV if the regulator isn't
> there, so if that's the case we have to make sure not to leave -ENODEV
> in the regulator pointer.
>
> Also, make sure we return 0 in that case, but correctly
.@collabora.com>
>
> ---
>
> v2: Only overwrite the error in the pointer after checking it (Heiko
> Stübner <he...@sntech.de>)
> v3: Remove hunks that shouldn't be in this patch
> ---
> drivers/usb/dwc2/hcd.c | 11 +++
> 1 file changed, 7 insertions
Hi Tomeu,
Am Donnerstag, 22. März 2018, 12:39:13 CET schrieb Heiko Stübner:
> Am Donnerstag, 22. März 2018, 10:39:43 CET schrieb Tomeu Vizoso:
> > devm_regulator_get_optional returns -ENODEV if the regulator isn't
> > there, so if that's the case we have to make sure not t
Am Donnerstag, 22. März 2018, 10:39:43 CET schrieb Tomeu Vizoso:
> devm_regulator_get_optional returns -ENODEV if the regulator isn't
> there, so if that's the case we have to make sure not to leave -ENODEV
> in the regulator pointer.
>
> Also, make sure we return 0 in that case, but correctly
Am Dienstag, 14. März 2017, 11:52:50 CET schrieb Vivek Gautam:
> Adding vendor specific directories in phy to group
> phy drivers under their respective vendor umbrella.
>
> Also updated the MAINTAINERS file to reflect the correct
> directory structure for phy drivers.
>
> Signed-off-by: Vivek
Hi Daniel,
Am Montag, 6. März 2017, 09:29:36 CET schrieb Meng Dongyang:
> On some platform such as RK3328, the 480m clock may need to assign
> clock parent in dts in stead of clock driver. So this patch add
> property of assigned-clocks and assigned-clock-parents to assign
> parent for 480m
Am Montag, 6. März 2017, 09:29:37 CET schrieb Meng Dongyang:
> Adds the device tree bindings description for usb2-phy grf
> of RK3328 platform.
>
> Changes in v2:
> - add usb2-phy grf specification
> Chagnes in v3:
> - remove the example of usb2-phy grf
>
> Signed-off-by: Meng Dongyang
Am Montag, 6. März 2017, 09:29:38 CET schrieb Meng Dongyang:
> Add usb2-phy config information in the data of match table for
> rk3328.
>
> Changes in v2:
> - add support of otg port
> Changes in v3:
> - remove tuning function and id pin configs
>
> Signed-off-by: Meng Dongyang
Am Donnerstag, 9. Februar 2017, 10:44:39 CET schrieb Frank Wang:
> Since dwc2 may have one or more input clocks need to manage for some
> platform, so this adds change clk to clk's array of struct dwc2_hsotg
> to handle more clocks operation.
>
> Signed-off-by: Frank Wang
Am Mittwoch, 24. August 2016, 16:19:58 schrieb John Youn:
> Add a delay to the core soft reset function to account for the IDDIG
> debounce filter.
>
> If the current mode is host, either due to the force mode bit being
> set (which persists after core reset) or the connector id pin, a core
>
Am Mittwoch, 24. August 2016, 16:19:54 schrieb John Youn:
> In dwc2_hsotg_udc_start(), don't initialize the controller for device
> mode unless we are actually in device mode.
>
> Signed-off-by: John Youn
On rk3188 with both host and (ethernet-)gadget
Tested-by: Heiko
Hi John,
Am Mittwoch, 24. August 2016, 16:20:01 schrieb John Youn:
> When a force mode bit is set and the IDDIG debounce filter is enabled,
> there is a delay for the forced mode to take effect. This delay is due
> to the IDDIG debounce filter and is variable depending on the platform's
> PHY
Am Montag, 22. August 2016, 17:17:41 schrieb Kishon Vijay Abraham I:
> Hi,
>
> On Sunday 21 August 2016 02:02 AM, Randy Li wrote:
> > It is a hardware bug in RK3288, the only way to solve it is to
> > reset the phy.
> >
> > Signed-off-by: Randy Li
> > ---
> >
> >
Am Dienstag, 16. August 2016, 09:31:50 schrieb Guenter Roeck:
> On Tue, Aug 16, 2016 at 02:02:00PM +0800, Frank Wang wrote:
> > On kernel builds without COMMON_CLK, the newly added rockchip-inno-usb2
> > driver fails to build:
> >
> > drivers/phy/phy-rockchip-inno-usb2.c:124:16: error: field
Am Freitag, 22. Juli 2016, 15:00:46 schrieb Frank Wang:
> Add vcc5v0_host regulator for usb2-phy and enable host-port support.
>
> Signed-off-by: Frank Wang
applied to ny dts64 branch [0] with some changes:
- the pin is named vcc5v0_host_en not host_vbus_drv in the
Am Freitag, 22. Juli 2016, 15:00:45 schrieb Frank Wang:
> Add usb2-phy nodes and specify phys phandle for ehci.
>
> Signed-off-by: Frank Wang
applied to my arm64 dts branch for 4.9
Thanks
Heiko
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Am Freitag, 22. Juli 2016, 15:00:45 schrieb Frank Wang:
> Add usb2-phy nodes and specify phys phandle for ehci.
>
> Signed-off-by: Frank Wang
looks good to me. Of course we need Kishon to be happy with the driver itself
first and the merge-window to end :-) .
I see
Hi Frank,
Am Donnerstag, 21. Juli 2016, 10:49:53 schrieb Frank Wang:
> >> @@ -69,6 +69,15 @@
> >>
> >> regulator-max-microvolt = <330>;
> >>
> >> };
> >>
> >> + vbus_host: vbus-host-regulator {
> >> + compatible = "regulator-fixed";
>
Am Mittwoch, 20. Juli 2016, 14:33:25 schrieb Doug Anderson:
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > +
> > + u2phy0: usb2-phy@e450 {
> > + compatible = "rockchip,rk3399-usb2phy";
> > + reg =
Am Dienstag, 19. Juli 2016, 15:27:40 schrieb Frank Wang:
> The newer SoCs (rk3366, rk3399) take a different usb-phy IP block
> than rk3288 and before, and most of phy-related registers are also
> different from the past, so a new phy driver is required necessarily.
>
> Signed-off-by: Frank Wang
Hi Frank,
Am Montag, 18. Juli 2016, 18:02:28 schrieb Frank Wang:
> On 2016/6/25 3:58, Heiko Stuebner wrote:
> > Am Dienstag, 21. Juni 2016, 18:30:05 schrieb Frank Wang:
> >> The newer SoCs (rk3366, rk3399) take a different usb-phy IP block
> >> than rk3288 and before, and most of phy-related
Am Samstag, 16. Juli 2016, 17:57:15 schrieb Rob Herring:
> On Thu, Jul 14, 2016 at 04:59:20PM +0800, William Wu wrote:
> > Add snps,phyif-utmi-width devicetree property to configure
> > the UTMI+ PHY with an 8- or 16-bit interface. UTMI+ PHY
> > interface is a hardware property, and it's platform
Hi Frank,
Am Dienstag, 21. Juni 2016, 15:52:45 schrieb Frank Wang:
> On 2016/6/20 12:56, Guenter Roeck wrote:
> > On Sun, Jun 19, 2016 at 8:32 PM, Frank Wang
wrote:
> >>> Turns out my problem was one of terminology. Using "suspend" and
> >>> "resume" to me suggested
Hi William,
Am Freitag, 17. Juni 2016, 17:18:59 schrieb William Wu:
> On 06/17/2016 07:15 AM, Heiko Stübner wrote:
> > Am Donnerstag, 2. Juni 2016, 20:34:56 schrieb William Wu:
> >> This patch adds the devicetree documentation required for Rockchip
> >> USB3.0 core wrap
Hi Kishon,
Am Freitag, 17. Juni 2016, 17:24:46 schrieb Kishon Vijay Abraham I:
> > + ret = of_clk_add_provider(node, of_clk_src_simple_get, rphy->clk480m);
> > + if (ret < 0)
> > + goto err_clk_provider;
> > +
> > + ret = devm_add_action(rphy->dev,
Hi William,
Am Donnerstag, 2. Juni 2016, 20:34:56 schrieb William Wu:
> This patch adds the devicetree documentation required for Rockchip
> USB3.0 core wrapper consisting of USB3.0 IP from Synopsys.
>
> It supports DRD mode, and could operate in device mode (SS, HS, FS)
> and host mode (SS, HS,
Hi Frank,
Am Mittwoch, 15. Juni 2016, 18:58:43 schrieb Frank Wang:
> On 2016/6/15 17:04, Heiko Stübner wrote:
> > Am Mittwoch, 15. Juni 2016, 11:23:26 schrieb Frank Wang:
> >> On 2016/6/14 21:27, Heiko Stübner wrote:
> >>> Am Montag, 13. Juni 2016, 10:10:10 schrie
Hi Frank,
Am Mittwoch, 15. Juni 2016, 11:23:26 schrieb Frank Wang:
> On 2016/6/14 21:27, Heiko Stübner wrote:
> > Am Montag, 13. Juni 2016, 10:10:10 schrieb Frank Wang:
> >> The newer SoCs (rk3366, rk3399) take a different usb-phy IP block
> >> than rk3288 and befo
Am Dienstag, 14. Juni 2016, 07:52:13 schrieb Guenter Roeck:
> On 06/12/2016 07:10 PM, Frank Wang wrote:
> > The newer SoCs (rk3366, rk3399) take a different usb-phy IP block
> > than rk3288 and before, and most of phy-related registers are also
> > different from the past, so a new phy driver is
Am Dienstag, 14. Juni 2016, 06:50:31 schrieb Guenter Roeck:
> On Tue, Jun 14, 2016 at 6:27 AM, Heiko Stübner <he...@sntech.de> wrote:
> > Am Montag, 13. Juni 2016, 10:10:10 schrieb Frank Wang:
> >> The newer SoCs (rk3366, rk3399) take a different usb-phy IP block
>
Am Montag, 13. Juni 2016, 10:38:39 schrieb Heiko Stübner:
> Am Montag, 13. Juni 2016, 10:10:09 schrieb Frank Wang:
> > Signed-off-by: Frank Wang <frank.w...@rock-chips.com>
>
> looks really cool now, thanks for addressing all the review comments
>
> Reviewed-by: Heik
Am Montag, 13. Juni 2016, 10:10:10 schrieb Frank Wang:
> The newer SoCs (rk3366, rk3399) take a different usb-phy IP block
> than rk3288 and before, and most of phy-related registers are also
> different from the past, so a new phy driver is required necessarily.
>
> Signed-off-by: Frank Wang
Am Montag, 13. Juni 2016, 10:10:09 schrieb Frank Wang:
> Signed-off-by: Frank Wang
looks really cool now, thanks for addressing all the review comments
Reviewed-by: Heiko Stuebner
> ---
>
> Changes in v5:
> - Added 'reg' property to identify the
Am Freitag, 10. Juni 2016, 12:30:56 schrieb Rob Herring:
> On Thu, Jun 09, 2016 at 01:42:02PM +0200, Krzysztof Kozlowski wrote:
> > On 06/09/2016 12:29 PM, Mark Brown wrote:
> > > On Thu, Jun 09, 2016 at 11:44:18AM +0200, Krzysztof Kozlowski wrote:
> > >> Few drivers have a need of getting
Hi Frank,
Am Dienstag, 7. Juni 2016, 17:15:52 schrieb Frank Wang:
> The newer SoCs (rk3366, rk3399) of Rock-chip take a different usb-phy
> IP block than rk3288 and before, and most of phy-related registers are
> also different from the past, so a new phy driver is required necessarily.
>
>
Hi Guenter,
Am Dienstag, 7. Juni 2016, 06:19:45 schrieb Guenter Roeck:
> On Tue, Jun 7, 2016 at 2:54 AM, Heiko Stübner <he...@sntech.de> wrote:
> > Hi Frank,
> >
> > Am Montag, 6. Juni 2016, 17:20:04 schrieb Frank Wang:
> >> The newer SoCs (rk3366, rk339
Hi Frank,
Am Montag, 6. Juni 2016, 17:20:04 schrieb Frank Wang:
> The newer SoCs (rk3366, rk3399) take a different usb-phy IP block
> than rk3288 and before, and most of phy-related registers are also
> different from the past, so a new phy driver is required necessarily.
>
> Signed-off-by:
Hi Frank,
Am Dienstag, 7. Juni 2016, 11:31:59 schrieb Frank Wang:
> On 2016/6/7 10:59, Frank Wang wrote:
> > On 2016/6/6 20:33, Heiko Stübner wrote:
> >> Am Montag, 6. Juni 2016, 12:27:54 schrieb Mark Rutland:
> >>> On Mon, Jun 06, 2016 at 05:20:03PM +0800, Frank
Hi,
Am Mittwoch, 1. Juni 2016, 10:02:09 schrieb Krzysztof Kozlowski:
> My third approach for a USB power sequence which fixes usb3503+lan
> on Odroid U3 board if it was initialized by bootloader
> (e.g. for TFTP boot).
I was just tackling a similar bringup problem regarding an embedded usb hub
Am Montag, 6. Juni 2016, 12:27:54 schrieb Mark Rutland:
> On Mon, Jun 06, 2016 at 05:20:03PM +0800, Frank Wang wrote:
> > Signed-off-by: Frank Wang
> > ---
> >
> > Changes in v3:
> > - Added 'clocks' and 'clock-names' optional properties.
> > - Specified 'otg-port'
Am Freitag, 3. Juni 2016, 12:59:22 schrieb Guenter Roeck:
> On Thu, Jun 02, 2016 at 02:48:10PM +0800, Frank Wang wrote:
> > The newer SoCs (rk3366, rk3399) take a different usb-phy IP block
> > than rk3288 and before, and most of phy-related registers are also
> > different from the past, so a new
Hi Frank,
Am Dienstag, 31. Mai 2016, 14:40:11 schrieb Frank Wang:
> The newer SoCs (rk3366, rk3399) take a different usb-phy IP block
> than rk3288 and before, and most of phy-related registers are also
> different from the past, so a new phy driver is required necessarily.
>
> Signed-off-by:
Hi Frank,
Am Mittwoch, 1. Juni 2016, 16:09:41 schrieb Frank Wang:
> > You might want to add the bvalid and id interrupts for the otg phys as
> > well
> > already - would make handling legacy devicetree files easier. [= if they
> > get specified later, the driver would always need to also handle
>
Hi Frank,
Am Dienstag, 31. Mai 2016, 14:40:10 schrieb Frank Wang:
> Signed-off-by: Frank Wang
> ---
> .../bindings/phy/phy-rockchip-inno-usb2.txt| 48
> 1 file changed, 48 insertions(+)
> create mode 100644
>
Hi Doug,
Am Freitag, 18. Dezember 2015, 14:50:14 schrieb Doug Anderson:
> On Fri, Dec 18, 2015 at 10:30 AM, Heiko Stübner
> <heiko.stueb...@collabora.com> wrote:
> > In specific conditions (involving usb hubs) dwc2 devices can create a
> > lot of interrupts, even to t
Hi,
it seems the recent dwc2 additions to the testing/next branch [0] caused
some interesting issue for me.
Setting is a regular 4.4-rc3/4 (only with some display-stuff added), and the
testing/next branch merged in.
If I attach a single usb device everything still works fine, but once it
is
Am Freitag, 23. Oktober 2015, 11:28:07 schrieb Douglas Anderson:
> The "host1" port (AKA the dwc2 port that isn't the OTG port) on rk3288
> has a hardware errata that causes everything to get confused when we get
> a remote wakeup. It appears that the "port reset" bit that's in the USB
> phy
Am Montag, 29. Juni 2015, 11:05:27 schrieb Mian Yousaf Kaukab:
This series fixes 3 sources of sleep while atomic bugs. Including
the one reported by Heiko Stuebner here:
http://www.spinics.net/lists/linux-usb/msg125186.html
Please review.
the current state of mainline during the merge
Hi Doug,
Am Montag, 22. Juni 2015, 16:00:42 schrieb Doug Anderson:
On Thu, Jun 4, 2015 at 6:12 AM, Kaukab, Yousaf yousaf.kau...@intel.com
wrote:
Tested-by: Heiko Stuebner he...@sntech.de
-- 8 --
[ 19.799200] BUG: sleeping function called from invalid
Am Freitag, 29. Mai 2015, 13:22:26 schrieb Yunzhi Li:
When s3c_hsotg_handle_unaligned_buf_complete() hs_req-req.buf
already destroyed, in s3c_hsotg_unmap_dma(), it touches
hs_req-req.dma again, so s3c_hsotg_unmap_dma() should be called
before s3c_hsotg_handle_unaligned_buf_complete().
Am Mittwoch, 10. Juni 2015, 15:31:13 schrieb Mian Yousaf Kaukab:
This series fixes 3 sources of sleep while atomic bugs. Including
the one reported by Heiko Stuebner here:
http://www.spinics.net/lists/linux-usb/msg125186.html
Please review.
on a rk3288
Tested-by: Heiko Stuebner
Am Freitag, 12. Dezember 2014, 23:00:08 schrieb Yunzhi Li:
Patches to add support for Rockchip usb phys.Add a new Rockchip
usb phy driver and modify dwc2 controller driver to make dwc2
platform devices support a generic PHY framework driver. This
patch set has been tested on my rk3288-evb and
Hi Roy,
Am Mittwoch, 3. Dezember 2014, 21:46:50 schrieb LiYunzhi:
From: lyz l...@rock-chips.com
Add a driver for the Rockchip SoC internal USB2.0 PHY.
This driver currently support RK3288.
Signed-off-by: lyz l...@rock-chips.com
---
[...]
diff --git a/drivers/phy/phy-rockchip-usb.c
Hi Greg,
Am Freitag, 8. August 2014, 11:55:55 schrieb Kever Yang:
These patches to add support for dwc2 controller found in
Rockchip processors rk3066, rk3188 and rk3288,
and enable dts for rk3288 evb.
will you take patches 1 and 2?
Thanks
Heiko
Changes in v5:
- max_transfer_size
Am Dienstag, 29. Juli 2014, 16:24:31 schrieb Doug Anderson:
There is no phy driver that works on the Rockchip board for either USB
host port yet. For now just hardcode the vbus signal to be on all the
time which makes both the dwc2 host and the EHCI port work.
Signed-off-by: Doug Anderson
Am Dienstag, 29. Juli 2014, 16:24:33 schrieb Doug Anderson:
This is the top USB port on the evb (the one closest to the Ethernet
connector).
Signed-off-by: Doug Anderson diand...@chromium.org
Signed-off-by: Kever Yang kever.y...@rock-chips.com
shouldn't the signed-offs be the other way
Hi Doug,
Am Mittwoch, 30. Juli 2014, 08:13:52 schrieb Doug Anderson:
On Wed, Jul 30, 2014 at 4:24 AM, Heiko Stübner he...@sntech.de wrote:
Am Dienstag, 29. Juli 2014, 16:24:31 schrieb Doug Anderson:
There is no phy driver that works on the Rockchip board for either USB
host port yet
Am Donnerstag, 19. September 2013, 23:49:01 schrieb Russell King:
The DMA API requires drivers to call the appropriate dma_set_mask()
functions before doing any DMA mapping. Add this required call to
the AMBA PL08x driver.
^--- copy and paste error - should of course be
Am Dienstag, 7. August 2012, 09:28:40 schrieb Praveen Paneri:
This driver uses usb_phy interface to interact with s3c-hsotg. Supports
phy_init and phy_shutdown functions to enable/disable phy. Tested with
smdk6410 and smdkv310. More SoCs can be brought under later.
Signed-off-by: Praveen
Am Montag, 6. August 2012, 10:23:52 schrieb Kyungmin Park:
Hi Praveen,
On 8/6/12, Praveen Paneri p.pan...@samsung.com wrote:
Hi Heiko,
On Mon, Aug 6, 2012 at 3:24 AM, Heiko Stübner he...@sntech.de wrote:
Hi Praveen,
Am Mittwoch, 1. August 2012, 15:05:47 schrieb Praveen Paneri
Hi Praveen,
Am Mittwoch, 1. August 2012, 15:05:47 schrieb Praveen Paneri:
This driver uses usb_phy interface to interact with s3c-hsotg. Supports
phy_init and phy_shutdown functions to enable/disable phy. Tested with
smdk6410 and smdkv310. More SoCs can be brought under later.
Looks cool.
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