On Tue, Mar 15, 2016 at 07:59:59AM +, Schemmel Hans-Christoph wrote:
> Added support for Gemalto's Cinterion PH8 and AHxx products
> with 2 RmNet Interfaces and products with 1 RmNet + 1 USB Audio interface.
> The RmNet and USB Audio interfaces are blacklisted because they will be
> handled by
From: Bjørn Mork
Date: Tue, 15 Mar 2016 13:27:03 +0100
> Schemmel Hans-Christoph writes:
>
>> If you are not the intended recipient of this message, please delete it and
>> notify the sender.
>
> OK. Deleted.
I've also deleted it and
I've implemented some proper clocks for the USB PHY clocks on da8xx. For those
not familiar with the architecture, the SoC has one USB 1.1 OHCI port and one
USB 2.O OTG port. The USB 1.1 PHY clock can optionally be supplied by the PLL
in the USB 2.0 PHY.
I have seen some comments in the past that
Hi Guenter,
On Tue, Mar 15, 2016 at 2:24 AM, Guenter Roeck wrote:
> Hi Alexey,
>
>
> On 03/14/2016 06:02 PM, Alexey Klimov wrote:
>>
>> Hi Guenter,
>>
>> On Thu, Mar 10, 2016 at 3:54 AM, Guenter Roeck wrote:
>>>
>>> On 03/09/2016 06:29 PM, Alexey Klimov
Up to this point, the USB phy clock configuration was handled manually in
the board files and in the usb drivers. This adds proper clocks so that
the usb drivers can use clk_get and clk_enable and not have to worry about
the details. Also, the related code is removed from the board files.
Including mach/* is frowned upon in device drivers, so get rid of it.
This replaces usb20_clk with usb11_phy_clk that represents the 48MHz usb
phy clock. The interaction with the usb20 (musb) subsystem does no belong
here and has been implemented in da830.c/da850.c with the rest of the
da8xx
From: Petr Kulhavy
Only few MUSB PHY reference clock frequencies were defined.
This patch defines macros for the missing frequencies:
19.2MHz, 38.4MHz, 13MHz, 26MHz, 20MHz, 40MHz
Signed-off-by: Petr Kulhavy .
Acked-by: Sergei Shtylyov
The usb ohci driver has been change to not include mach/*, so we need
to pass the cfgchip2 address to the driver so that it can turn the usb
phy on and off.
Signed-off-by: David Lechner
---
arch/arm/mach-davinci/usb.c | 5 +
1 file changed, 5 insertions(+)
diff --git
Hello.
On 03/16/2016 01:37 AM, David Lechner wrote:
The usb ohci driver has been change to not include mach/*, so we need
to pass the cfgchip2 address to the driver so that it can turn the usb
phy on and off.
Signed-off-by: David Lechner
---
This driver should not have to worry about how the clocks are configured
on a system. Added a usb20_phy clock to handle the USB 2.0 PLL clock
externally.
Also changed to using devm_ to simplify code a bit.
Signed-off-by: David Lechner
---
drivers/usb/musb/da8xx.c | 93
Hi Oliver,
On Thu, Mar 10, 2016 at 9:23 AM, Oliver Neukum wrote:
> On Thu, 2016-03-10 at 02:29 +, Alexey Klimov wrote:
>> This patch creates new driver that supports StreamLabs usb watchdog
>> device. This device plugs into 9-pin usb header and connects to
>> reset pin and
On Tue, 2016-03-15 at 00:04 +, Nicolas Saenz Julienne wrote:
> Hi,
> the device is missing all the ACM specific "extra" info on it's interface
> descriptor. Which seems be triggering the "Zero length descriptor references"
> error during the probe function. Adding the NO_UNION_NORMAL quirk
On Fri, Mar 4, 2016 at 5:19 PM, Thierry Reding wrote:
> From: Thierry Reding
>
> This is an old version of the binding that isn't flexible enough to
> describe all aspects of the XUSB pad controller. Specifically with the
> addition of XUSB support
The Vybrid SoC has a dual role device which can be configured to
act as a host or device through firmware interface, but, it is
not a true OTG controller.
Use the CI_HDRC_DUAL_ROLE_NOT_OTG in the platform flag, introduce
a new platform data structure for Vybrid and match on the compatible
string
Hi,
David Lechner writes:
> [ text/plain ]
> On 03/14/2016 02:00 AM, Felipe Balbi wrote:
>>
>> Hi,
>>
>> Petr Kulhavy writes:
>>> + - ti,usb2-phy-refclock-hz : Integer. Frequency in Hz of the USB 2.0 PHY
>>> reference clock,
>>> + either provided by
Use USBC_DET feature of standard Colibri SODIMM pin 137 for USB
device/host switching using the generic extcon USB gpio implementation.
Signed-off-by: Sanchayan Maity
---
arch/arm/boot/dts/vf-colibri-eval-v3.dtsi | 12
arch/arm/boot/dts/vf-colibri.dtsi
Remove the compatible string "fsl,imx27-usb" from being used to
match on usb device nodes for Vybrid. This is required for specifying
that Vybrid USB controller is a dual role but not a true OTG controller
using the CI_HDRC_DUAL_ROLE_NOT_OTG flag in the corresponding ci_hdrc_imx
driver.
The existing usage of extcon in Chipidea driver relies on OTG
registers. In case of SoC with dual role device but not a true
OTG controller, this does not work. Such SoC's should specify
the existing CI_HDRC_DUAL_ROLE_NOT_OTG flag and do the role
switch without checking any of the OTG registers.
Hello Peter,
The existing usage of extcon in Chipidea driver relies on OTG
registers. In case of SoC with dual role device but not a true
OTG controller, this does not work. Such SoC's should specify
the existing CI_HDRC_DUAL_ROLE_NOT_OTG flag and do the role
switch without checking any of the
On Fri, Mar 4, 2016 at 5:19 PM, Thierry Reding wrote:
> From: Thierry Reding
>
> Extend the binding to cover the set of feature found in Tegra210.
>
> Signed-off-by: Thierry Reding
Again I'd like Stephen's ACK on this to keep
Felipe Ferreri Tonello wrote:
> On 11/03/16 23:07, Michal Nazarewicz wrote:
>> I’m also wondering whether it would be beneficial to get rid of buflen
>> all together and use wMaxPacketSie for in endpoints as well? Is that
>> feasible?
>
> Yes, we could just remove the buflen parameter.
>
> The
Added support for Cinterion's PHxx WWAN interfaces by adding
QMI_FIXED_INTF with Cinterion's VID and PID.
PHxx can have 2 RmNet Interfaces (PID 0x0082)
or 1 RmNet + 1 USB Audio interface (PID 0x0083).
Signed-off-by: Hans-Christoph Schemmel
---
patch is
An attack has become available which pretends to be a quirky
device circumventing normal sanity checks and crashes the kernel
by an insufficient number of interfaces. This patch adds a check
to the code path for quirky devices.
Signed-off-by: Oliver Neukum
CC:
Added support for Gemalto's Cinterion PH8 and AHxx products
with 2 RmNet Interfaces and products with 1 RmNet + 1 USB Audio interface.
The RmNet and USB Audio interfaces are blacklisted because they will be
handled by other drivers.
Signed-off-by: Hans-Christoph Schemmel
On Mon 14-03-16 10:37:22, Alan Stern wrote:
> On Mon, 14 Mar 2016, Jan Kara wrote:
>
> > On Fri 11-03-16 12:56:10, Tejun Heo wrote:
> > > Hello, Jan.
> > >
> > > On Thu, Mar 03, 2016 at 10:33:10AM +0100, Jan Kara wrote:
> > > > > Ugh... that's nasty. I wonder whether the right thing to do is
Schemmel Hans-Christoph writes:
> If you are not the intended recipient of this message, please delete it and
> notify the sender.
OK. Deleted.
Bjørn
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PCI-SIG has defined Interface FEh for Base Class 0Ch,
Sub-Class 03h as "USB Device (not host controller)". It is
already being used in various USB device controller drivers
for matching, so converting those to use the definition.
Signed-off-by: Heikki Krogerus
On Tue, Mar 15, 2016 at 02:06:00PM +0200, Heikki Krogerus wrote:
> PCI-SIG has defined Interface FEh for Base Class 0Ch,
> Sub-Class 03h as "USB Device (not host controller)". It is
> already being used in various USB device controller drivers
> for matching, so converting those to use the
The Sagem Monetel ELC930 is a USB check reader, it provides an ACM serial
iterface in order to communicate with it.
The USB device is missing all the ACM specific "extra" info on it's interface
descriptor. Which seems be triggering the "Zero length descriptor references"
error during the probe
Hi,
I am experiencing some issues related USB Ethernet gadget with RNDIS on Kernel
4.4.
On first connection everything seems OK, the device is correctly detected on my
Windows 7 host.
If I unplug/replug the USB cable, the device is detected again but not working
anymore, Windows status is "This
On Mon, Feb 29, 2016 at 11:22:12PM +0900, Mark Brown wrote:
> On Mon, Jan 04, 2016 at 11:04:26AM +0800, Baolin Wang wrote:
I see Felipe is no longer at TI so his e-mail was bouncing - let's
resend this with his kernel.org address:
> > Currently the Linux kernel does not provide any standard
The TX settings can be calibrated for particular hardware. The
phy is reset by Linux, so this cannot be handled by the bootloader.
The TRM mentions that the maximum resistance should be used for the
DN/DP calibration in order to pass USB certification.
The values for the TX registers are poorly
On 03/15/2016 10:46 PM, David Lechner wrote:
On 03/15/2016 05:45 PM, Sergei Shtylyov wrote:
No, this register is shared b/w MUSB and OHCI. The proper thing to
do is to write the PHY driver and let it control this shared register.
OK. I've started working on this. I am looking at using
On 03/15/2016 05:45 PM, Sergei Shtylyov wrote:
No, this register is shared b/w MUSB and OHCI. The proper thing to
do is to write the PHY driver and let it control this shared register.
OK. I've started working on this. I am looking at using struct usb_phy,
however, enum usb_phy_type
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