This loop is supposed to set all the .num[] values to -1 but it's off by
one so it skips the first element and sets one element past the end of
the array.
I've cleaned up the loop a little as well.
Fixes: ddf8abd25994 ('USB: f_fs: the FunctionFS driver')
Signed-off-by: Dan Carpenter
On Fri, May 27, 2016 at 07:25:30PM +0200, walter harms wrote:
>
>
> Am 27.05.2016 14:23, schrieb Michal Nazarewicz:
> > On Fri, May 27 2016, Dan Carpenter wrote:
> >> diff --git a/drivers/usb/gadget/function/f_fs.c
> >> b/drivers/usb/gadget/function/f_fs.c
> >> index 73515d5..7fff81a 100644
>
On Tue, May 10, 2016 at 01:02:08PM +0200, Ulf Hansson wrote:
> + Arnd
>
> [...]
>
> >> >> Solution
> >> >>
> >> >> This is very similar to the MMC pwrseq behavior so the idea is to:
> >> >> 1. Move MMC pwrseq drivers to generic place,
> >> >
> >> > You can do that, but I'm going to NAK
Hi Martin,
On Fri, May 27, 2016 at 11:46:21AM +0200, Martin Kepplinger wrote:
> This adds a driver for the Pegasus Notetaker Pen. When connected,
> this uses the Pen as an input tablet.
>
> This device was sold in various different brandings, for example
> "Pegasus Mobile Notetaker M210",
On May 27 2016 or thereabouts, Heiner Kallweit wrote:
> The Riso Kagaku Webmail Notifier (and its clones) is supported as part of
> usb/misc/usbled driver currently. This patch migrates the driver for this
> device to the HID subsystem.
>
> Benefits:
> - Avoid using USB low-level calls and use
The Riso Kagaku Webmail Notifier (and its clones) is supported as part of
usb/misc/usbled driver currently. This patch migrates the driver for this
device to the HID subsystem.
Benefits:
- Avoid using USB low-level calls and use the HID subsystem instead
(as this device provides a USB HID
On 19 May 2016 at 09:08, Felipe Balbi wrote:
>
> Hi,
>
> Paul Zimmerman writes:
>> Felipe Balbi writes:
>>
>>> If we're going to issue a Update Transfer command,
>>> let's clear LST bit from previous TRB. This will
Add Broadcom USB PHY driver for Broadcom STB SoCs. This driver in
combination with the generic ohci, ehci and xhci platform drivers
will enable USB1.1, USB2.0 and USB3.0 support.
NOTE: An unrelated patch is in the pipline to move the file
drivers/soc/brcmstb/common.c to
Signed-off-by: Al Cooper
---
drivers/soc/brcmstb/common.c| 12
include/linux/soc/brcmstb/brcmstb.h | 10 ++
2 files changed, 22 insertions(+)
diff --git a/drivers/soc/brcmstb/common.c b/drivers/soc/brcmstb/common.c
index 94e7335..454f4c2 100644
Add a new USB Phy driver for Broadcom STB SoCs. This driver
supports all Broadcom STB ARM SoCs. This driver in combination
with the generic ohci, ehci and xhci platform drivers will enable
USB1.1, USB2.0 and USB3.0 support. This Phy driver also supports
the Broadcom UDC gadget driver.
On Fri, 27 May 2016, Chung-Geol Kim wrote:
> >On Fri, May 27, 2016 at 01:38:17AM +, Chung-Geol Kim wrote:
> >> There is a double free problem in the usb driver.
> >
> >Which driver?
> When I using the USB OTG Storage, this issue happened.
> When remove the OTG Storage, it reproduced
This adds a driver for the Pegasus Notetaker Pen. When connected,
this uses the Pen as an input tablet.
This device was sold in various different brandings, for example
"Pegasus Mobile Notetaker M210",
"Genie e-note The Notetaker",
"Staedtler Digital ballpoint pen 990 01",
On Fri, May 13, 2016 at 12:17:24PM +0200, mich...@walle.cc wrote:
> Hi,
>
> if the internal buffer is full, a read() returns a steady stream of
> zeros until one valid character is received. According to my experiments
> this happens if the FT232 receives characters while the device is not
>
Am 27.05.2016 14:23, schrieb Michal Nazarewicz:
> On Fri, May 27 2016, Dan Carpenter wrote:
>> This loop is supposed to set all the .num values to -1 but it's doesn't
>> set the first element and it sets one element beyond the end of the
>> array. Really there is no reason for it to be done
On Fri, May 27, 2016 at 05:20:45PM +0300, Alexander Popov wrote:
> Hello,
>
> Excuse me for disturbing, could I have a feedback?
Nope, it's the middle of the merge window, I can't do anything with new
patches until after 4.7-rc1 comes out. And even then, give me a week or
so to catch up...
Hello everyone,
I'm working on a SoC which embeds an IP block from GDA Technologies
labeled "Pravega USB3 SuperSpeed Controller" (data-sheet is v0.99r
dated 2014-01-29). A cursory search returns:
http://www.sourcing.co.jp/prod_ip.htm
http://www.sourcing.co.jp/prod_ip/usb_host_pb.pdf
In the
Hello,
Excuse me for disturbing, could I have a feedback?
On 20.05.2016 12:37, Alexander Popov wrote:
> stub_disconnect() calls stub_device_reset() during usb_unbind_device() when
> usb device is locked. So usb_lock_device_for_reset() in stub_device_reset()
> in that case polls for one second
On 05/27/2016 12:55 AM, Heikki Krogerus wrote:
Hi,
[ ... ]
---
This patch applies on top of '[RFC PATCHv2] usb: USB Type-C Connector Class'
from Heikki Krogerus. It provided the changes I made to get the code
operational.
drivers/usb/type-c/typec.c | 134
Hi,
Leo Li writes:
>> Leo Li writes:
> On certain platforms (e.g. ARM64) the dma_ops needs to be explicitly set
> to be able to do DMA allocations, so use the of_dma_configure() helper
> to populate the dma properties and assign an appropriate
Add a new USB Phy driver for Broadcom STB SoCs. This driver
supports all Broadcom STB ARM SoCs. This driver in combination
with the generic ohci, ehci and xhci platform drivers will enable
USB1.1, USB2.0 and USB3.0 support. This Phy driver also supports
the Broadcom UDC gadget driver.
Signed-off-by: Al Cooper
---
drivers/soc/brcmstb/common.c| 12
include/linux/soc/brcmstb/brcmstb.h | 10 ++
2 files changed, 22 insertions(+)
diff --git a/drivers/soc/brcmstb/common.c b/drivers/soc/brcmstb/common.c
index 94e7335..454f4c2 100644
Add Broadcom USB PHY driver for Broadcom STB SoCs. This driver in
combination with the generic ohci, ehci and xhci platform drivers
will enable USB1.1, USB2.0 and USB3.0 support.
NOTE: An unrelated patch is in the pipline to move the file
drivers/soc/brcmstb/common.c to
Hi,
"Steinar H. Gunderson" writes:
> On Fri, May 27, 2016 at 04:12:59PM +0300, Felipe Balbi wrote:
>> yes, please do that. Keep in mind, also, that we're still in the middle
>> of the merge window and nothing will really happen until v4.7-rc1 is
>> tagged.
>
> Sent. As a
On Fri, May 27, 2016 at 04:12:59PM +0300, Felipe Balbi wrote:
> yes, please do that. Keep in mind, also, that we're still in the middle
> of the merge window and nothing will really happen until v4.7-rc1 is
> tagged.
Sent. As a fix, there's a chance it could go into 4.7, right?
/* Steinar */
--
dwc3-exynos has two problems during init if the regulators are slow
to come up (for instance if the I2C bus driver is not on the initramfs)
and return probe deferral. First, every time this happens, the driver
leaks the USB phys created; they need to be deallocated on error.
Second, since the phy
Hi,
Krzysztof Kozlowski writes:
> On 05/27/2016 01:46 PM, Steinar H. Gunderson wrote:
>> On Fri, May 27, 2016 at 03:23:35PM +0530, Vivek Gautam wrote:
>>> I don't have any concerns with the patch apart from the ones
>>> Krzysztof has already pointed out.
>>> LGTM.
>>
On 05/27/2016 01:46 PM, Steinar H. Gunderson wrote:
> On Fri, May 27, 2016 at 03:23:35PM +0530, Vivek Gautam wrote:
>> I don't have any concerns with the patch apart from the ones
>> Krzysztof has already pointed out.
>> LGTM.
>
> Should I repost the patch, or will people just make these commit
Hi,
William Wu writes:
> Add a quirk to clear the GUSB2PHYCFG.U2_FREECLK_EXISTS bit,
> which specifies whether the USB2.0 PHY provides a free-running
> PHY clock, which is active when the clock control input is active.
>
> Signed-off-by: William Wu
On Fri, May 27 2016, Dan Carpenter wrote:
> This loop is supposed to set all the .num values to -1 but it's doesn't
> set the first element and it sets one element beyond the end of the
> array. Really there is no reason for it to be done backwards. And
> "ret" is the wrong variable to use for
Hello.
On 5/27/2016 2:31 PM, William Wu wrote:
This patch documents the device tree documentation required for
Documents the documentation? :-)
Rockchip USB3.0 core wrapper consist of USB3.0 IP from Synopsys.
Consisting?
It could operate in device mode (SS, HS, FS) and host
mode
Am 27.05.2016 13:23, schrieb Dan Carpenter:
> This loop is supposed to set all the .num values to -1 but it's doesn't
> set the first element and it sets one element beyond the end of the
> array. Really there is no reason for it to be done backwards. And
> "ret" is the wrong variable to use
On Fri, May 27, 2016 at 03:23:35PM +0530, Vivek Gautam wrote:
> I don't have any concerns with the patch apart from the ones
> Krzysztof has already pointed out.
> LGTM.
Should I repost the patch, or will people just make these commit message
changes for me? I guess balbi@ is the right person to
This patch documents the device tree documentation required for
Rockchip USB3.0 core wrapper consist of USB3.0 IP from Synopsys.
It could operate in device mode (SS, HS, FS) and host
mode (SS, HS, FS, LS).
Signed-off-by: William Wu
---
Changes in v3:
- add dwc3
This series add support for rockchip dwc3 driver,
and add additional optional properties for specific
platforms (e.g., rockchip platform).
William Wu (5):
usb: dwc3: of-simple: add compatible for rockchip
usb: dwc3: add dis_u2_freeclk_exists_quirk
usb: dwc3: add phyif_utmi_quirk
usb:
Add a quirk to clear the GUSB2PHYCFG.U2_FREECLK_EXISTS bit,
which specifies whether the USB2.0 PHY provides a free-running
PHY clock, which is active when the clock control input is active.
Signed-off-by: William Wu
---
Changes in v3:
- None
Changes in v2:
- None
Add a quirk to configure the core to support the
UTMI+ PHY with an 8- or 16-bit interface. UTMI+ PHY
interface is hardware property, and it's platform
dependent. Normall, the PHYIf can be configured
during coreconsultant. But for some specific usb
cores(e.g. rk3399 soc dwc3), the default PHYIf
Rockchip platform merely enable usb3 clocks and
populate its children. So we can use this generic
glue layer to support Rockchip dwc3.
Signed-off-by: William Wu
---
Changes in v3:
- None
Changes in v2:
- sort the list of_dwc3_simple_match (Doug)
Add a quirk to clear the GUSB3PIPECTL.DELAYP1TRANS bit,
which specifies whether disable delay PHY power change
from P0 to P1/P2/P3 when link state changing from U0
to U1/U2/U3 respectively.
Signed-off-by: William Wu
---
Changes in v3:
- None
Changes in v2:
- None
This loop is supposed to set all the .num values to -1 but it's doesn't
set the first element and it sets one element beyond the end of the
array. Really there is no reason for it to be done backwards. And
"ret" is the wrong variable to use for an iterator.
Fixes: ddf8abd25994 ('USB: f_fs: the
>On Fri, May 27, 2016 at 01:38:17AM +, Chung-Geol Kim wrote:
>> There is a double free problem in the usb driver.
>
>Which driver?
When I using the USB OTG Storage, this issue happened.
When remove the OTG Storage, it reproduced sometimes.
>
>> This is caused by delayed deregister for scsi
On Tue, May 24, 2016 at 11:43 PM, Steinar H. Gunderson wrote:
> dwc3-exynos has two problems during init if the regulators are slow
> to come up (for instance if the I2C bus driver is not on the initramfs)
> and return probe deferral. First, every time this happens, the driver
>
This adds a driver for the Pegasus Notetaker Pen. When connected,
this uses the Pen as an input tablet.
This device was sold in various different brandings, for example
"Pegasus Mobile Notetaker M210",
"Genie e-note The Notetaker",
"Staedtler Digital ballpoint pen 990 01",
On Fri, May 27, 2016 at 3:09 PM, Steinar H. Gunderson
wrote:
> On Fri, May 27, 2016 at 03:02:48PM +0530, Vivek Gautam wrote:
>> Above mentioned patches were not accepted by the maintainers of generic-phy
>> and usb. I couldn't get any response on them for quite a long
On Fri, May 27, 2016 at 03:02:48PM +0530, Vivek Gautam wrote:
> Above mentioned patches were not accepted by the maintainers of generic-phy
> and usb. I couldn't get any response on them for quite a long time. So, the
> patches could never make it to the mainline.
> I can try initiating the entire
On Thu, May 26, 2016 at 6:27 PM, Steinar H. Gunderson
wrote:
> On Wed, May 25, 2016 at 07:52:36PM +0200, Steinar H. Gunderson wrote:
>>> Actually their are some missing patches to tune the usb3 phy.
>>>
>>> https://lkml.org/lkml/2014/10/31/266
>> This explains why the
On 25.05.2016 12:00, Krzysztof Opasiak wrote:
> It should be possible and this example should work. could you please test
> your setup with the newest kernel release? around 4.1 there was some
> refactoring of IO functions in functionfs. There is at least one patch which
> fix this[1] but I'm
Hi,
On 05/27/2016 04:00 PM, Heikki Krogerus wrote:
>> I agree with you that we should move extcon out of the framework.
>> >
>> > In order to support multiport systems, I have below proposal.
>> >
>> > Currently, we have below interfaces.
>> >
>> > struct portmux_dev *portmux_register(struct
Hi,
On Wed, May 25, 2016 at 11:35:07AM -0700, Guenter Roeck wrote:
> From: Guenter Roeck
>
> New API functions (calls into class code)
> typec_set_usb_role()
> typec_set_pwr_role()
> typec_set_vconn_role()
> typec_set_pwr_opmode()
>
> Modified API
On Wed, May 25, 2016 at 08:19:47AM -0700, Guenter Roeck wrote:
> On Wed, May 25, 2016 at 02:28:46PM +0300, Heikki Krogerus wrote:
> > Hi,
> >
> > On Tue, May 24, 2016 at 02:51:40PM +0200, Oliver Neukum wrote:
> > > On Thu, 2016-05-19 at 15:44 +0300, Heikki Krogerus wrote:
> > >
> > > Hi,
> > >
On Wed, May 25, 2016 at 07:59:57AM -0700, Guenter Roeck wrote:
> On Wed, May 25, 2016 at 04:20:56PM +0200, Oliver Neukum wrote:
> > On Wed, 2016-05-25 at 17:04 +0300, Heikki Krogerus wrote:
> >
> > > I'm not against leaving the responsibility of registering the alternate
> > > modes to the
Hi,
On 26-05-16 23:44, John Youn wrote:
On 5/26/2016 1:25 PM, Hans de Goede wrote:
Hi,
On 26-05-16 03:15, John Youn wrote:
Prior to commit 6c96f05c8bb8 ("reset: Make [of_]reset_control_get[_foo]
functions wrappers"), the optional variants returned -ENOTSUPP when
CONFIG_RESET_CONTROLLER was
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