Here is a patch to 2.6.0-test9 that addresses mips bit-endian bus accesses breaking
endianness in EHCI and OHCI. It also fixes a problem with ohci_dbg() not endian
swapping the frame number field in a debug print.
Untested on x86, but the changes are trivial so it should work there as well. I a
Darwin Rambo wrote:
However, it appears that the MIPs processor does 32 bit bus writes,
> which means that the frame_no and pad1 fields are swapped when
> written to the fpga/usb controller.
That is, this MIPS processor (all of them?) doesn't implement
8 or 16 bit bus accesses.
As I recall, some e
The OHCI spec has defined the hcca as mixed u32 and u16.
[usb-ohci.h]
struct ohci_hcca {
__u32 int_table[NUM_INTS];/* Interrupt ED table */
__u16 frame_no; /* current frame number */
__u16 pad1; /* set to 0 on each frame_no change *
