Re: [linux-yocto] [PATCH 16/94] arm: AXM5516 emulation bringup boot
On 11/7/2013, 8:12 PM, Paul Butler wrote:
Signed-off-by: Paul Butler paul.but...@windriver.com
---
arch/arm/boot/compressed/head.S | 63 ++
There's more code removed here than there is added. Do we have an
explanation
about how it was once required, and now isn't ? i.e. the bringup
boot shortlog made me expect all new code.
Bruce
arch/arm/boot/dts/axm55xx.dts | 235 +++---
arch/arm/boot/emuboot/Makefile| 10 +-
arch/arm/boot/emuboot/emuboot.S | 27 -
arch/arm/boot/emuboot/emuboot.lds | 4 +-
5 files changed, 109 insertions(+), 230 deletions(-)
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index f83c98c..001e661 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -171,7 +171,12 @@ not_angel:
@ determine final kernel image address
mov r4, pc
and r4, r4, #0xf800
+#ifdef CONFIG_ARCH_AXXIA
+ ldr r3, =TEXT_OFFSET
+ add r4, r4, r3
+#else
add r4, r4, #TEXT_OFFSET
+#endif
#else
ldr r4, =zreladdr
#endif
@@ -269,7 +274,12 @@ restart: adr r0, LC0
* of RAM and hope for the best.
*/
cmp r0, #1
+#ifdef CONFIG_ARCH_AXXIA
+ ldr r1, =TEXT_OFFSET
+ sub r0, r4, r1
+#else
sub r0, r4, #TEXT_OFFSET
+#endif
add r0, r0, #0x100
mov r1, r6
sub r2, sp, r6
@@ -567,58 +577,6 @@ __armv3_mpu_cache_on:
mcr p15, 0, r0, c7, c0, 0 @ invalidate whole cache v3
mov pc, lr
-#if defined(CONFIG_ARCH_AXXIA)
-__setup_mmu:
- sub r3, r4, #16384 @ Page directory size
- bic r3, r3, #0xff @ Align the pointer
- bic r3, r3, #0x3f00
-
- /*
-* Clear the level 1 page table.
-*/
-
- mov r0, #0
- mov r1, r3
- add r2, r3, #0x4000
-1: str r0, [r1], #4
- cmp r1, r2
- blt 1b
-
- /*
-* First 1G is RAM, cacheable and bufferable.
-*/
-
- ldr r0, =0x40c1e
- mov r1, r3
- add r2, r3, #0x1000
-1: mov r9, #0
-2: str r0, [r1], #4@ Each supersection is repeated
- add r9, r9, #1 @ 16 times.
- cmp r9, #16
- blt 2b
- add r0, r0, #0x100 @ 16M
- cmp r1, r2
- blt 1b
-
- /*
-* Third 1G is IO, not cacheable or bufferable.
-*/
-
- ldr r0,=0x10040c52 @ Start at 0x20_1000_
- add r1, r3, #0x2000
- add r2, r3, #0x3000
-1: mov r9, #0
-2: str r0, [r1], #4@ Each supersection is repeated
- add r9, r9, #1 @ 16 times.
- cmp r9, #16
- blt 2b
- add r0, r0, #0x100 @ 16M
- cmp r1, r2
- blt 1b
-
- mov pc, lr
-ENDPROC(__setup_mmu)
-#else
__setup_mmu: sub r3, r4, #16384 @ Page directory size
bic r3, r3, #0xff @ Align the pointer
bic r3, r3, #0x3f00
@@ -662,7 +620,6 @@ __setup_mmu:sub r3, r4, #16384 @ Page
directory size
str r1, [r0]
mov pc, lr
ENDPROC(__setup_mmu)
-#endif
__arm926ejs_mmu_cache_on:
#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
diff --git a/arch/arm/boot/dts/axm55xx.dts b/arch/arm/boot/dts/axm55xx.dts
index f397394..ae94ca4 100644
--- a/arch/arm/boot/dts/axm55xx.dts
+++ b/arch/arm/boot/dts/axm55xx.dts
@@ -30,8 +30,9 @@
chosen { };
aliases {
- serial0 = axxia_serial0;
- timer = axxia_timers;
+ serial0 = axxia_serial0;
+ timer = axxia_timers;
+ ethernet0 = axxia_femac0;
};
cpus {
@@ -42,12 +43,57 @@
device_type = cpu;
compatible = arm,cortex-a15;
reg = 0;
+cpu-release-addr = 0; // Fixed by the boot loader
};
+
+ cpu@1 {
+ device_type = cpu;
+ compatible = arm,cortex-a15;
+ reg = 1;
+cpu-release-addr = 0; // Fixed by the boot loader
+ };
+
+ cpu@2 {
+ device_type = cpu;
+ compatible =
[linux-yocto] [PATCH 16/94] arm: AXM5516 emulation bringup boot
Signed-off-by: Paul Butler paul.but...@windriver.com
---
arch/arm/boot/compressed/head.S | 63 ++
arch/arm/boot/dts/axm55xx.dts | 235 +++---
arch/arm/boot/emuboot/Makefile| 10 +-
arch/arm/boot/emuboot/emuboot.S | 27 -
arch/arm/boot/emuboot/emuboot.lds | 4 +-
5 files changed, 109 insertions(+), 230 deletions(-)
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index f83c98c..001e661 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -171,7 +171,12 @@ not_angel:
@ determine final kernel image address
mov r4, pc
and r4, r4, #0xf800
+#ifdef CONFIG_ARCH_AXXIA
+ ldr r3, =TEXT_OFFSET
+ add r4, r4, r3
+#else
add r4, r4, #TEXT_OFFSET
+#endif
#else
ldr r4, =zreladdr
#endif
@@ -269,7 +274,12 @@ restart: adr r0, LC0
* of RAM and hope for the best.
*/
cmp r0, #1
+#ifdef CONFIG_ARCH_AXXIA
+ ldr r1, =TEXT_OFFSET
+ sub r0, r4, r1
+#else
sub r0, r4, #TEXT_OFFSET
+#endif
add r0, r0, #0x100
mov r1, r6
sub r2, sp, r6
@@ -567,58 +577,6 @@ __armv3_mpu_cache_on:
mcr p15, 0, r0, c7, c0, 0 @ invalidate whole cache v3
mov pc, lr
-#if defined(CONFIG_ARCH_AXXIA)
-__setup_mmu:
- sub r3, r4, #16384 @ Page directory size
- bic r3, r3, #0xff @ Align the pointer
- bic r3, r3, #0x3f00
-
- /*
-* Clear the level 1 page table.
-*/
-
- mov r0, #0
- mov r1, r3
- add r2, r3, #0x4000
-1: str r0, [r1], #4
- cmp r1, r2
- blt 1b
-
- /*
-* First 1G is RAM, cacheable and bufferable.
-*/
-
- ldr r0, =0x40c1e
- mov r1, r3
- add r2, r3, #0x1000
-1: mov r9, #0
-2: str r0, [r1], #4@ Each supersection is repeated
- add r9, r9, #1 @ 16 times.
- cmp r9, #16
- blt 2b
- add r0, r0, #0x100 @ 16M
- cmp r1, r2
- blt 1b
-
- /*
-* Third 1G is IO, not cacheable or bufferable.
-*/
-
- ldr r0,=0x10040c52 @ Start at 0x20_1000_
- add r1, r3, #0x2000
- add r2, r3, #0x3000
-1: mov r9, #0
-2: str r0, [r1], #4@ Each supersection is repeated
- add r9, r9, #1 @ 16 times.
- cmp r9, #16
- blt 2b
- add r0, r0, #0x100 @ 16M
- cmp r1, r2
- blt 1b
-
- mov pc, lr
-ENDPROC(__setup_mmu)
-#else
__setup_mmu: sub r3, r4, #16384 @ Page directory size
bic r3, r3, #0xff @ Align the pointer
bic r3, r3, #0x3f00
@@ -662,7 +620,6 @@ __setup_mmu:sub r3, r4, #16384 @ Page
directory size
str r1, [r0]
mov pc, lr
ENDPROC(__setup_mmu)
-#endif
__arm926ejs_mmu_cache_on:
#ifdef CONFIG_CPU_DCACHE_WRITETHROUGH
diff --git a/arch/arm/boot/dts/axm55xx.dts b/arch/arm/boot/dts/axm55xx.dts
index f397394..ae94ca4 100644
--- a/arch/arm/boot/dts/axm55xx.dts
+++ b/arch/arm/boot/dts/axm55xx.dts
@@ -30,8 +30,9 @@
chosen { };
aliases {
- serial0 = axxia_serial0;
- timer = axxia_timers;
+ serial0 = axxia_serial0;
+ timer = axxia_timers;
+ ethernet0 = axxia_femac0;
};
cpus {
@@ -42,12 +43,57 @@
device_type = cpu;
compatible = arm,cortex-a15;
reg = 0;
+cpu-release-addr = 0; // Fixed by the boot loader
};
+
+ cpu@1 {
+ device_type = cpu;
+ compatible = arm,cortex-a15;
+ reg = 1;
+cpu-release-addr = 0; // Fixed by the boot loader
+ };
+
+ cpu@2 {
+ device_type = cpu;
+ compatible = arm,cortex-a15;
+ reg = 2;
+cpu-release-addr = 0; // Fixed by the boot loader
+ };
+
+ cpu@3 {
+ device_type = cpu;
+ compatible =
