On Tue, Nov 18, 2008 at 10:03:25AM +1100, Benjamin Herrenschmidt wrote:
On Mon, 2008-11-17 at 15:34 -0500, Steven Rostedt wrote:
Note, I was using a default config that had CONFIG_IRQSTACKS off and
CONFIG_PPC_64K_PAGES on.
For one, we definitely need to turn IRQSTACKS on by default ... In
On Tuesday 18 November 2008 09:53, Paul Mackerras wrote:
I'd love to be able to use a 4k base page size if I could still get
the reduction in page faults and the expanded TLB reach that we get
now with 64k pages. If we could allocate the page cache for large
files with order-4 allocations
On Tue, 18 Nov 2008, Michael Ellerman wrote:
On Mon, 2008-11-17 at 14:22 -0800, Trent Piepho wrote:
On Mon, 17 Nov 2008, Kumar Gala wrote:
On Nov 17, 2008, at 3:58 PM, Trent Piepho wrote:
It's over a dozen lines of output and doesn't appear to provide any useful
information. Even after
The Marvell PHY driver is currently being used for the 88E on the
SBC610. This driver is causing the link to run in 10/Half mode, the generic
PHY driver is correctly configuring the PHY as 1000/Full.
Edit default config to use generic PHY driver.
---
On Mon, 2008-11-17 at 13:58 -0800, Trent Piepho wrote:
It's over a dozen lines of output and doesn't appear to provide any useful
information. Even after looking at the code, I'm in the dark about what
score 299, offset 250 means.
Hah ! I had almost the same patch in my pile for some time :-)
On Tuesday 18 November 2008 13:08, Linus Torvalds wrote:
On Tue, 18 Nov 2008, Paul Mackerras wrote:
Also, you didn't respond to my comments about the purely software
benefits of a larger page size.
I realize that there are benefits. It's just that the downsides tend to
swamp the upsides.
* Christoph Hellwig [EMAIL PROTECTED] wrote:
On Tue, Nov 18, 2008 at 10:03:25AM +1100, Benjamin Herrenschmidt wrote:
On Mon, 2008-11-17 at 15:34 -0500, Steven Rostedt wrote:
Note, I was using a default config that had CONFIG_IRQSTACKS off and
CONFIG_PPC_64K_PAGES on.
For one, we
The Marvell PHY driver is currently being used for the 88E on the
SBC610. This driver is causing the link to run in 10/Half mode, the generic
PHY driver is correctly configuring the PHY as 1000/Full.
Edit default config to use generic PHY driver.
Signed-off-by: Martyn Welch [EMAIL PROTECTED]
Hello,
this patch fixes a hvc terminal resize problem by removing a duplicate
winsize comparison.
Ben, could you add this patch to your tree for 2.6.28-rc6 bug fixes?
Thanks and regards,
Hendrik
--
Hendrik Brueckner
D/3303 Linux on System z Development
eMail: [EMAIL PROTECTED]
IBM Deutschland
From: Hendrik Brueckner [EMAIL PROTECTED]
The test to check for a new winsize runs out-of-sync with the underlying
tty. After a tty has been released and initialized again, the winsize might
differ between the tty and the hp struct.
The solution is to simply remove the check and always schedule
Nick Piggin writes:
It's much harder to do this with powerpc I think because they would need
to calculate 8 hashes and touch 8 cachelines to prefill 8 translations,
wouldn't they?
Yeah, the hashed page table sucks. Film at 11, as they say. :)
Paul.
dma_addr_t dma_address, size_t size,
enum dma_data_direction direction,
struct dma_attrs *attrs);
+ void(*sync_single_for_cpu)(struct device *hwdev,
+
For some unknown reason at Steven Rostedt added in disabling of the SPE
instruction generation for e500 based PPC cores in commit
6ec562328fda585be2d7f472cfac99d3b44d362a.
We are removing it because:
1. It generates e500 kernels that don't work
2. its not the correct set of flags to do this
3.
On Nov 17, 2008, at 4:22 PM, Trent Piepho wrote:
On Mon, 17 Nov 2008, Kumar Gala wrote:
On Nov 17, 2008, at 3:58 PM, Trent Piepho wrote:
It's over a dozen lines of output and doesn't appear to provide
any useful
information. Even after looking at the code, I'm in the dark
about what
On Nov 18, 2008, at 4:55 AM, Martyn Welch wrote:
The Marvell PHY driver is currently being used for the 88E on the
SBC610. This driver is causing the link to run in 10/Half mode, the
generic
PHY driver is correctly configuring the PHY as 1000/Full.
Edit default config to use generic
On Tue, 18 Nov 2008 07:39:21 -0600
Kumar Gala [EMAIL PROTECTED] wrote:
On Nov 18, 2008, at 4:55 AM, Martyn Welch wrote:
The Marvell PHY driver is currently being used for the 88E on the
SBC610. This driver is causing the link to run in 10/Half mode, the
generic
PHY driver is
Paul and Benjamin,
Can I add your Acked-by: to all these patches that I submitted? I'm going
to recommit them with a consistent subject (all lower case ppc), but I'm
not going to change the patches themselves.
Would you two be fine with that? Or at least one of you?
-- Steve
Hi All,Iam in the process of building the uImage and root file system for
source linux 2.6.20 to bring up the powerpc 8360E MDS board. Please let me know
whether I can get the minimum default config(.config) for building the same or
any other document to guide the build.Thanks in
David Gibson wrote:
On Mon, Nov 17, 2008 at 11:28:52AM -0500, Michael Barkowski wrote:
David Gibson wrote:
On Fri, Nov 14, 2008 at 10:16:19AM -0500, Michael Barkowski wrote:
David Gibson wrote:
On Thu, Nov 13, 2008 at 10:18:28AM -0500, Michael Barkowski wrote:
ethernet0 (called FSL UEC0 in
David Gibson wrote:
Given the variety of strange I/O configurations in prototype and
embedded platforms, I can't imagine this was a unique situation. So
I've pushed my patch out, so anyone else in a similar situation can
immediately turn their little udbg methods for whatever strange I/O
On Tue, 18 Nov 2008, Nick Piggin wrote:
The fact is, Intel (and to a lesser degree, AMD) has shown how hardware
can do good TLB's with essentially gang lookups, giving almost effective
page sizes of 32kB with hardly any of the downsides. Couple that with
It's much harder to do this
On Nov 18, 2008, at 6:22 AM, Benjamin Herrenschmidt wrote:
dma_addr_t dma_address, size_t size,
enum dma_data_direction direction,
struct dma_attrs *attrs);
+ void
The code below sets up a simple timer with SIGEV_THREAD. I compiled the
code as g++ timertest.cc -o timertest -lrt -pthread.
Running it on my G5 with 2.6.27 (but with an older glibc), it prints:
Creating timer
Setting timer 268509264 for 5-second expiration...
and then the timer never
On 18 Nov 2008 14:40:50 -
nanda [EMAIL PROTECTED] wrote:
Hi All,Iam in the process of building the uImage and root file system for
source linux 2.6.20 to bring up the powerpc 8360E MDS board. Please let me
know whether I can get the minimum default config(.config) for building the
same
@@ -286,42 +306,75 @@ static inline void dma_sync_single_for_cpu
(struct device *dev,
dma_addr_t dma_handle, size_t size,
enum dma_data_direction direction)
{
- BUG_ON(direction == DMA_NONE);
Did you intend to remove this here? It would be nice to test
The call chain is this:
qe_udc_irq() - grabs the udc-lock spinlock
rx_irq()
qe_ep0_rx()
ep0_setup_handle()
setup_received_handle()
ch9getstatus()
qe_ep_queue() - tries to grab the udc-lock again
It seems unsafe to temporarily drop the lock in the ch9getstatus(),
so to fix that bug the lock-less
On Nov 18, 2008, at 10:57 AM, Segher Boessenkool wrote:
@@ -286,42 +306,75 @@ static inline void
dma_sync_single_for_cpu(struct device *dev,
dma_addr_t dma_handle, size_t size,
enum dma_data_direction direction)
{
- BUG_ON(direction == DMA_NONE);
Did
Arnd,
However, reading that position does not flush the DMA, so that we can
observe stale data in the buffer.
The position register is in the DCR space from which a read does not flush
the interrupt. But it seem that reading a register mapped to the PLB5 can
flush the interrupts if the C3PO is
On Tuesday 18 November 2008, Giora Biran wrote:
Arnd,
However, reading that position does not flush the DMA, so that we can
observe stale data in the buffer.
The position register is in the DCR space from which a read does not flush
the interrupt. But it seem that reading a register
Chris Friesen wrote:
The code below sets up a simple timer with SIGEV_THREAD. I compiled the
code as g++ timertest.cc -o timertest -lrt -pthread.
Running it on my G5 with 2.6.27 (but with an older glibc), it prints:
Creating timer
Setting timer 268509264 for 5-second expiration...
and then
On Fri, 2008-11-14 at 16:09 -0600, Hollis Blanchard wrote:
Basically my revised proposal is to add explicit memory reservation
properties
to the device tree. Currently, /memreserve properties in .dts files are not
present in the device tree itself, only in the FDT header. I think these
On Tuesday 18 November 2008, Anton Vorontsov wrote:
+ spin_lock_irqsave(udc-lock, flags);
+ ret = __qe_ep_queue(_ep, _req, gfp_flags);
+ spin_unlock_irqrestore(udc-lock, flags);
Why are you passing gfp_flags? Especially without
checking ... GFP_KERNEL will be illegal, for
Hi all,
I got this in my boot test last night:
Begin: Waiting for root file system... ...
BUG: spinlock lockup on CPU#1, vol_id/3246, c0b09700
Call Trace:
[c00040ef7080] [c000fb58] .show_stack+0x70/0x184 (unreliable)
[c00040ef7130] [c027adac]
Chris Friesen wrote:
I'm getting suspicious of either glibc or my version of strace, as it
shows the child thread calling rt_sigtimedwait() with an empty signal set.
Looks like glibc was the culprit. It works fine with a newer version.
Sorry for the false alarm.
Chris
Hi all,
On Wed, 19 Nov 2008 09:30:23 +1100 Stephen Rothwell [EMAIL PROTECTED] wrote:
This was on a Power5 partition. I am attempting to reproduce the problem.
OK, it reproduces. The machine is a Power5 partition (IBM,9124-720
eServer OpenPower 720) with 1 (2 way threaded) cpu (gr, rev2.1,
The call chain is this:
qe_udc_irq() - grabs the udc-lock spinlock
rx_irq()
qe_ep0_rx()
ep0_setup_handle()
setup_received_handle()
ch9getstatus()
qe_ep_queue() - tries to grab the udc-lock again
It seems unsafe to temporarily drop the lock in the ch9getstatus(),
so to fix that bug the lock-less
On Tue, Nov 18, 2008 at 09:06:17AM -0600, Timur Tabi wrote:
David Gibson wrote:
Given the variety of strange I/O configurations in prototype and
embedded platforms, I can't imagine this was a unique situation. So
I've pushed my patch out, so anyone else in a similar situation can
Steven Rostedt writes:
Can I add your Acked-by: to all these patches that I submitted? I'm going
to recommit them with a consistent subject (all lower case ppc), but I'm
not going to change the patches themselves.
Would you two be fine with that? Or at least one of you?
My preference
On Wed, 19 Nov 2008, Paul Mackerras wrote:
Steven Rostedt writes:
Can I add your Acked-by: to all these patches that I submitted? I'm going
to recommit them with a consistent subject (all lower case ppc), but I'm
not going to change the patches themselves.
Would you two be fine
Trent Piepho writes:
It's over a dozen lines of output and doesn't appear to provide any useful
information. Even after looking at the code, I'm in the dark about what
score 299, offset 250 means.
I already put a very similar patch from Ben Herrenschmidt into my
powerpc.git tree next branch,
Sonny Rao writes:
- if (io_remap_pfn_range(vma, vma-vm_start, dev-bsr_addr PAGE_SHIFT,
-size, vma-vm_page_prot))
+ /* check for the case of a small BSR device and map one 4k page for it*/
+ if (dev-bsr_len PAGE_SIZE size == PAGE_SIZE)
+
Johannes Berg writes:
On my screen, when something crashes, I only have space for maybe
16 functions of the stack trace before the information above it
scrolls off the screen. It's easy to hack the kernel to print out
only that much, but it's harder to remember to do it. This patch
David Miller wrote:
From: Kumar Gala [EMAIL PROTECTED]
Date: Fri, 24 Oct 2008 10:39:05 -0500
As for making it ARCH specific, that doesn't really help since not
all PPC hw has the limitation I spoke of. Not even all MPIC (in our
cases) have the limitation.
Since the PPC code knows
With the additon of -pie to build CONFIG_RELOCATABLE
CONFIG_PPC64 kernels, even
if a function is undefined we still get a vmlinux,
System.map, and other files
with no error message.
This is with binutils 2.17 as built by debian
with 2.6.28-rc5, CONFIG_EMBEDDED=y CONFIG_HOTPLUG=n
CONFIG_PCI=y,
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