scsi_transport_srp scsi_tgt scsi_mod
NIP: c014e30c LR: c014e2f8 CTR: c014db88
REGS: c000db703620 TRAP: 0700 Tainted: G D
(2.6.32-rc5-autotest-next-20091102)
MSR: 80029032 EE,ME,CE,IR,DR CR: 24022442 XER: 200c
TASK = c000db7f6fe0[76] 'init' THREAD
Am 02.11.2009 um 00:23 schrieb Michael Neuling mi...@neuling.org:
This is the really low level of guest entry/exit code.
Book3s_64 has an SLB, which stores all ESID - VSID mappings we're
currently aware of.
The segments in the guest differ from the ones on the host, so we
need
to switch
Am 02.11.2009 um 00:39 schrieb Michael Neuling mi...@neuling.org:
snip
+static void invalidate_pte(struct hpte_cache *pte)
+{
+dprintk_mmu(KVM: Flushing SPT %d: 0x%llx (0x%llx) - 0x%llx\n,
+i, pte-pte.eaddr, pte-pte.vpage, pte-host_va);
+
+ppc_md.hpte_invalidate(pte-slot,
This is the really low level of guest entry/exit code.
Book3s_64 has an SLB, which stores all ESID - VSID mappings we're
currently aware of.
The segments in the guest differ from the ones on the host, so we
need
to switch the SLB to tell the MMU that we're in a new context.
Am 02.11.2009 um 10:39 schrieb Michael Neuling mi...@neuling.org:
This is the really low level of guest entry/exit code.
Book3s_64 has an SLB, which stores all ESID - VSID mappings we're
currently aware of.
The segments in the guest differ from the ones on the host, so we
need
to switch the
Hi Grant,
the patch referenced above is a little ugly. Adding the call should
Agreed. I just referenced it to show there are more people wanting this
feature.
be really simple. I've drafted a patch to do only that step and
attached it to this mail. If this one works for you, then I'll
I wouldn't even bother. It's not actively dangerous to try and use
PSC{4,5} in SPI mode. It just not going to work. Besides, the
MPC5200 common code already checks for an invalid PSC number when
setting the clock divisor.
Have you seen cases of users trying to do the wrong thing with the
On Sat, 31 Oct 2009, Benjamin Herrenschmidt wrote:
Hi folks !
So I have a little problem on powerpc ... :-)
Thanks a lot for running this by us.
Due to the way I'm attempting to do my I$/D$ coherency on embedded
processors, I basically need to filter out _PAGE_EXEC in set_pte_at()
if
Sure I don't have major objections against your patch (though who is
formally mpc512x maintainer to ack it ?),
Grant is maintainer for MPC5xxx.
--
Pengutronix e.K. | Wolfram Sang|
Industrial Linux Solutions | http://www.pengutronix.de/
Signed-off-by: John Rigby jri...@freescale.com
Signed-off-by: Chen Hongjun hong-jun.c...@freescale.com
Signed-off-by: Wolfram Sang w.s...@pengutronix.de
Cc: Wolfgang Denk w...@denx.de
Cc: Grant Likely grant.lik...@secretlab.ca
---
Should come after the fix for clk_get to be usable for the
Kernel version is 2.6.30 and I have enabled fsl DMA engine during
configuring kernel. After system booted, I have seen only 38 DMA
interrupts, and no increase later when I am doing data transfer
through network.
So I wonder if mpc8548 had made use of DMA engine when doing memcpy,
or maybe if
On Thursday 22 October 2009, Frederic Weisbecker wrote:
I'm thinking that the simplier approach, would be to make the
default_llseek the unlocked one. Then you only have to audit the drivers
that have the BKL - ie the ones we are auditing anyway, and explicitly set
them to the bkl
On Mon, Nov 2, 2009 at 6:14 AM, Wolfram Sang w.s...@pengutronix.de wrote:
Also, I'm resistant to changing the probe layout on this driver at
this time. With the work being done to generalize the OF support
code, there is a strong possibility that of_platform will be
deprecated in favor of
Benjamin Herrenschmidt wrote:
On Wed, 2009-10-28 at 15:55 -0500, Nathan Fontenot wrote:
This patch creates the release sysfs file for memory and updates the
exisiting probe file so both make arch-specific callouts to handle removing
and adding memory to the system. This also creates the
Benjamin Herrenschmidt wrote:
On Wed, 2009-10-28 at 15:59 -0500, Nathan Fontenot wrote:
+#ifdef CONFIG_ARCH_CPU_PROBE_RELEASE
+static ssize_t cpu_probe(const char *buf, size_t count)
dlpar_cpu_probe() pls
+static ssize_t cpu_release(const char *buf, size_t count)
+{
Ditto.
Or else in
Benjamin Herrenschmidt wrote:
On Wed, 2009-10-28 at 15:53 -0500, Nathan Fontenot wrote:
This patch provides the kernel DLPAR infrastructure in a new filed named
dlpar.c. The functionality provided is for acquiring and releasing a resource
from firmware and the parsing of information returned
On Mon, Nov 2, 2009 at 7:22 AM, Wolfram Sang w.s...@pengutronix.de wrote:
Sure I don't have major objections against your patch (though who is
formally mpc512x maintainer to ack it ?),
Grant is maintainer for MPC5xxx.
Is this patch intended for mainline? I've received so many 5121
patches
On Mon, Nov 2, 2009 at 9:27 AM, Nathan Fontenot nf...@austin.ibm.com wrote:
I saw that Grant Likely is doing updates to all of the of_* stuff right now,
would it be ok to have these routines here, renamed as dlpar_*, and look
to merge them in with Grant's updates when he finishes?
No because
Grant Likely wrote:
On Mon, Nov 2, 2009 at 9:27 AM, Nathan Fontenot nf...@austin.ibm.com wrote:
I saw that Grant Likely is doing updates to all of the of_* stuff right now,
would it be ok to have these routines here, renamed as dlpar_*, and look
to merge them in with Grant's updates when he
On Mon, Nov 2, 2009 at 9:47 AM, Nathan Fontenot nf...@austin.ibm.com wrote:
Grant Likely wrote:
On Mon, Nov 2, 2009 at 9:27 AM, Nathan Fontenot nf...@austin.ibm.com
wrote:
I saw that Grant Likely is doing updates to all of the of_* stuff right
now,
would it be ok to have these routines
Is this patch intended for mainline? I've received so many 5121
Yes, my branch is based on linus-git as of today. The CAN driver addition was
just posted to socketcan-devel. It is also independent of the denx-patches[1]
and will later be send to netdev, too.
[1] Of course, the FEC patches are
On Nov 2, 2009, at 9:40 AM, hank peng wrote:
Kernel version is 2.6.30 and I have enabled fsl DMA engine during
configuring kernel. After system booted, I have seen only 38 DMA
interrupts, and no increase later when I am doing data transfer
through network.
So I wonder if mpc8548 had made use
On Fri, Oct 30, 2009 at 10:53 AM, Wolfram Sang w.s...@pengutronix.de wrote:
+ bool id_matched = !id;
+ bool dev_matched = !dev;
[...]
+ dev_matched = true;
+ if (id strcmp(id, p-name) == 0)
+ id_matched = true;
Using
Hi Wolfram,
Comments below
On Mon, Nov 2, 2009 at 8:17 AM, Wolfram Sang w.s...@pengutronix.de wrote:
Signed-off-by: John Rigby jri...@freescale.com
Signed-off-by: Chen Hongjun hong-jun.c...@freescale.com
Signed-off-by: Wolfram Sang w.s...@pengutronix.de
Cc: Wolfgang Denk w...@denx.de
Cc:
On Mon, Nov 2, 2009 at 6:53 AM, Wolfram Sang w.s...@pengutronix.de wrote:
I wouldn't even bother. It's not actively dangerous to try and use
PSC{4,5} in SPI mode. It just not going to work. Besides, the
MPC5200 common code already checks for an invalid PSC number when
setting the clock
These clock controllers are 1:1 dedicated to the CAN devices, correct?
Yes.
Wouldn't it make more sense to put this code directly into the CAN
bus device driver instead of in common code? And allocated the clk
structure at driver probe time?
Yes, just...
It seems like the only shared
On Mon, Nov 2, 2009 at 11:40 AM, Wolfram Sang w.s...@pengutronix.de wrote:
It seems like the only shared bit seems to be access to the mccr registers.
...we can't access registers from two drivers?? Ah, wait, you are probably
aiming at moving the mscan_init-function to the can-driver and to
This is the really low level of guest entry/exit code.
Book3s_64 has an SLB, which stores all ESID - VSID mappings we're
currently aware of.
The segments in the guest differ from the ones on the host, so we need
to switch the SLB to tell the MMU that we're in a new context.
So we store a shadow
For KVM we need to allocate a new context id, but don't really care about
all the mm context around it.
So let's split the alloc and destroy functions for the context id, so we can
grab one without allocating an mm context.
Signed-off-by: Alexander Graf ag...@suse.de
---
v6 - v7:
- don't
Following S390's good example we should use hrtimers for the decrementer too!
This patch converts the timer from the old mechanism to hrtimers.
Signed-off-by: Alexander Graf ag...@suse.de
---
v6 - v7:
- remove non-hrtimer export
---
arch/powerpc/include/asm/kvm_host.h |6 --
On Mon, 2009-11-02 at 13:27 +, Hugh Dickins wrote:
On Sat, 31 Oct 2009, Benjamin Herrenschmidt wrote:
Hi folks !
So I have a little problem on powerpc ... :-)
Thanks a lot for running this by us.
Heh, I though you may have been bored :-)
I've not looked to see if there are more
Hi Grant,
On Mon, 2 Nov 2009 10:48:58 -0700 Grant Likely grant.lik...@secretlab.ca
wrote:
Using bool/true/false doesn't seem to be a common pattern in the
kernel. Anyone know what the winds of prevailing opinion are
regarding 'bool' in kernel code?
Its a good thing.
--
Cheers,
Stephen
On Tue, 3 Nov 2009, Benjamin Herrenschmidt wrote:
On Mon, 2009-11-02 at 13:27 +, Hugh Dickins wrote:
You're being a very good citizen to want to bring this so forcefully
to the attention of any user of set_pte_at(); but given how few care,
and the other such functions you'd want to
On Mon, Nov 2, 2009 at 4:10 PM, Stephen Rothwell s...@canb.auug.org.au wrote:
Hi Grant,
On Mon, 2 Nov 2009 10:48:58 -0700 Grant Likely grant.lik...@secretlab.ca
wrote:
Using bool/true/false doesn't seem to be a common pattern in the
kernel. Anyone know what the winds of prevailing opinion
2009/11/3 Kumar Gala ga...@kernel.crashing.org:
On Nov 2, 2009, at 9:40 AM, hank peng wrote:
Kernel version is 2.6.30 and I have enabled fsl DMA engine during
configuring kernel. After system booted, I have seen only 38 DMA
interrupts, and no increase later when I am doing data transfer
I have tested this patch on my MPC8548 machine box, kernel version is
2.6.30. There is a problem.
#mdadm -C /dev/md0 -l5 -n3 /dev/sd{a,b,c}
Recovery can be done successfully, interrupts looks normal.
# cat /proc/interrupts
CPU0
16: 16091057 OpenPIC Level mvSata
17:
On Mon, 2009-11-02 at 23:45 +, Hugh Dickins wrote:
IE. update_mmu_cache() would be more generally useful if it took the
ptep instead of the pte. Of course, I'm sure some embedded archs are
going to cry for the added load here ...
I like your idea. I'll look into doing a patch
Hi,
We have Kilauea based board using ppc405ex. it has usb-otg tranciever chip on
it.
I am trying to enable USB Host Controller Driver in linux kernel (version DENX
2.6.27-stable). For this to be enabled, I also have to enable PCI in kernel
config.
But when I load the kernel uImage with
Dear Jignesh Patel,
please do not post the same messages several times to several mailing
lists.
In message
d7c6597e47cdad4ba48ee3d2b03b385102e7c3c...@vmbx113.ihostexchange.net you
wrote:
We have Kilauea based board using ppc405ex. it has usb-otg
tranciever chip on it.
I am trying to
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