cpuidle:(POWER) Fixes for pseries_idle hotplug notifier
From: Deepthi Dharwar deep...@linux.vnet.ibm.com
Currently the call to pseries_notify_cpuidle_add_cpu(), that takes
action on the cpuidle front when a cpu is added/removed
is being made from smp_xics_setup_cpu().
This caused lockdep issues
Purely for cosmetic purposes, otherwise it can appear that we are in
single_step_pSeries() which is slightly confusing.
Signed-off-by: Michael Ellerman mich...@ellerman.id.au
---
arch/powerpc/kernel/exceptions-64s.S |1 +
1 file changed, 1 insertion(+)
diff --git
Hi,
With kernel mainstream version 3.5.rc-5 there's SRIO low level driver with
DMA support for MMIO. But the rionet driver in the same kernel version
doesnt support MMIO.
We are trying to find the maximum bandwidth that we can achieve using our
custom board's(quad MPC8641 ) 4-lane SRIO.
Now we
On Tue, 2012-07-03 at 15:36 -0500, Christoph Lameter wrote:
Looking through the emails it seems that there is an issue with alias
strings.
To be more precise, there seems no big issue currently. I just wanted to
make following usage of kmem_cache_create (SLUB) possible:
name = some
At 07/04/2012 01:52 PM, Yasuaki Ishimatsu Wrote:
Hi Wen,
2012/07/04 14:08, Wen Congyang wrote:
At 07/04/2012 12:45 PM, Yasuaki Ishimatsu Wrote:
Hi Wen,
2012/07/03 15:35, Wen Congyang wrote:
At 07/03/2012 01:56 PM, Yasuaki Ishimatsu Wrote:
When (hot)adding memory into system,
2012/7/4 Andrew Morton a...@linux-foundation.org:
On Sat, 30 Jun 2012 14:59:24 +0900
Akinobu Mita akinobu.m...@gmail.com wrote:
This provides kernel modules that can be used to test the error handling
of notifier call chain failures by injecting artifical errors to the
following notifier
On 07/04/2012 01:00 PM, Li Zhong wrote:
On Tue, 2012-07-03 at 15:36 -0500, Christoph Lameter wrote:
Looking through the emails it seems that there is an issue with alias
strings.
To be more precise, there seems no big issue currently. I just wanted to
make following usage of
On 25.06.2012, at 14:26, Mihai Caraman wrote:
Add EPCR support in booke mtspr/mfspr emulation. EPCR register is defined
only for 64-bit and HV categories, so it shoud be available only on 64-bit
virtual processors. Undefine the support for 32-bit builds.
Define a reusable setter function for
On 25.06.2012, at 14:26, Mihai Caraman wrote:
64-bit host needs to remain in 64-bit mode when an exception take place.
Set interrupt computaion mode in EPCR register.
Signed-off-by: Mihai Caraman mihai.cara...@freescale.com
Thanks, applied to kvm-ppc-next.
Alex
On 25.06.2012, at 14:26, Mihai Caraman wrote:
Add KVM_SREGS_E_64 feature and EPCR spr support in get/set sregs
for 64-bit hosts.
Please also implement a ONE_REG interface while at it. Over time, I'd like to
move towards ONE_REG instead of the messy regs/sregs API.
Alex
On 25.06.2012, at 14:26, Mihai Caraman wrote:
When delivering guest IRQs, update MSR computaion
computation
mode according to guest
interrupt computation mode found in EPCR.
Signed-off-by: Mihai Caraman mihai.cara...@freescale.com
---
arch/powerpc/kvm/booke.c |8 +++-
1 files
On 25.06.2012, at 14:26, Mihai Caraman wrote:
Extend MAS2 EPN mask for 64-bit hosts, to retain most significant bits.
Change get tlb eaddr to use this mask.
Please see section 6.11.4.8 in the PowerISA 2.06b:
MMU behavior is largely unaffected by whether the thread is in 32-bit
computation
On 25.06.2012, at 14:26, Mihai Caraman wrote:
Add emulation helper for getting instruction ea and refactor tlb instruction
emulation to use it.
Signed-off-by: Mihai Caraman mihai.cara...@freescale.com
---
arch/powerpc/kvm/e500.h |6 +++---
arch/powerpc/kvm/e500_emulate.c |
On 25.06.2012, at 14:26, Mihai Caraman wrote:
Mask high 32 bits of effective address in emulation layer, for guests running
in 32-bit mode.
MAS2's high-order 32 bits represents the upper 32 bits of the effective
address
of the page. Mask it too for tlbwe instruction emulation.
Ah, there
On 04.07.2012, at 16:00, Alexander Graf wrote:
On 25.06.2012, at 14:26, Mihai Caraman wrote:
Mask high 32 bits of effective address in emulation layer, for guests running
in 32-bit mode.
MAS2's high-order 32 bits represents the upper 32 bits of the effective
address
of the page. Mask
-Original Message-
From: kvm-ppc-ow...@vger.kernel.org [mailto:kvm-ppc-
ow...@vger.kernel.org] On Behalf Of Alexander Graf
Sent: Wednesday, July 04, 2012 4:22 PM
To: Caraman Mihai Claudiu-B02008
Cc: kvm-...@vger.kernel.org; k...@vger.kernel.org; linuxppc-
d...@lists.ozlabs.org;
On 25.06.2012, at 14:26, Mihai Caraman wrote:
64-bit host runs with lazy interrupt disabling, so local_irq_disable() does
not disable interrupts right away and does not protect against preemption
required by __kvmppc_vcpu_run(). Define a macro for 64-bit to use
hard_irq_disable().
On 25.06.2012, at 14:26, Mihai Caraman wrote:
Hook DO_KVM macro to 64-bit booke in a optimal way similar to 32-bit booke
see head_fsl_booke.S file. Extend interrupt handlers' parameter list with
interrupt vector numbers to accomodate the macro. Rework Guest Doorbell
handler to use the proper
On 04.07.2012, at 16:14, Caraman Mihai Claudiu-B02008 wrote:
-Original Message-
From: kvm-ppc-ow...@vger.kernel.org [mailto:kvm-ppc-
ow...@vger.kernel.org] On Behalf Of Alexander Graf
Sent: Wednesday, July 04, 2012 4:22 PM
To: Caraman Mihai Claudiu-B02008
Cc:
On 25.06.2012, at 14:26, Mihai Caraman wrote:
Add bookehv interrupt handling support for 64-bit hosts. Change common stack
layout to refer PPC_LR_STKOFF kernel constant. Dispatch the 64-bit execution
flow to the existing kvm_handler_common asm macro. Update input register
values
Zhao Chenhui wrote:
On Tue, Jul 03, 2012 at 10:17:12PM -0500, Tabi Timur-B04825 wrote:
Zhao Chenhui wrote:
If the guts variable is NULL, it indicates there is error in dts or kernel.
We should fix the error, rather than ignore it.
And that's why there's a warning message. Crashing the
-Original Message-
From: Alexander Graf [mailto:ag...@suse.de]
Sent: Wednesday, July 04, 2012 5:30 PM
To: Caraman Mihai Claudiu-B02008
Cc: kvm-...@vger.kernel.org; KVM list; linuxppc-dev; qemu-
p...@nongnu.org List; Benjamin Herrenschmidt
Subject: Re: [Qemu-ppc] [RFC PATCH 12/17]
-Original Message-
From: kvm-ppc-ow...@vger.kernel.org [mailto:kvm-ppc-
ow...@vger.kernel.org] On Behalf Of Alexander Graf
Sent: Wednesday, July 04, 2012 6:14 PM
To: Caraman Mihai Claudiu-B02008
Cc: kvm-...@vger.kernel.org; k...@vger.kernel.org; linuxppc-
d...@lists.ozlabs.org;
On 04.07.2012, at 17:27, Caraman Mihai Claudiu-B02008 wrote:
-Original Message-
From: Alexander Graf [mailto:ag...@suse.de]
Sent: Wednesday, July 04, 2012 5:30 PM
To: Caraman Mihai Claudiu-B02008
Cc: kvm-...@vger.kernel.org; KVM list; linuxppc-dev; qemu-
p...@nongnu.org List;
On 04.07.2012, at 17:37, Caraman Mihai Claudiu-B02008 wrote:
-Original Message-
From: kvm-ppc-ow...@vger.kernel.org [mailto:kvm-ppc-
ow...@vger.kernel.org] On Behalf Of Alexander Graf
Sent: Wednesday, July 04, 2012 6:14 PM
To: Caraman Mihai Claudiu-B02008
Cc:
From: Alexander Graf [ag...@suse.de]
Sent: Wednesday, July 04, 2012 6:45 PM
To: Caraman Mihai Claudiu-B02008
Cc: kvm-...@vger.kernel.org; KVM list; linuxppc-dev; qemu-...@nongnu.org
List; Benjamin Herrenschmidt
Subject: Re: [Qemu-ppc] [RFC PATCH 12/17]
On 04.07.2012, at 17:37, Caraman Mihai Claudiu-B02008 wrote:
-Original Message-
From: kvm-ppc-ow...@vger.kernel.org [mailto:kvm-ppc-
ow...@vger.kernel.org] On Behalf Of Alexander Graf
Sent: Wednesday, July 04, 2012 6:14 PM
To: Caraman Mihai Claudiu-B02008
Cc:
On Wed, 2012-07-04 at 16:14 +0200, Alexander Graf wrote:
+#ifdef CONFIG_64BIT
+#define _hard_irq_disable() hard_irq_disable()
+#else
+#define _hard_irq_disable() local_irq_disable()
+#endif
So you only swap out the disable bit, but not the enable one? Ben,
would this work out?
On Wed, 2012-07-04 at 16:29 +0200, Alexander Graf wrote:
+#ifdef CONFIG_KVM_BOOKE_HV
+#define KVM_BOOKE_HV_MFSPR(reg, spr) \
+ BEGIN_FTR_SECTION \
+ mfspr reg, spr; \
+
On Wed, 2012-07-04 at 16:40 +0400, Glauber Costa wrote:
On 07/04/2012 01:00 PM, Li Zhong wrote:
On Tue, 2012-07-03 at 15:36 -0500, Christoph Lameter wrote:
Looking through the emails it seems that there is an issue with alias
strings.
To be more precise, there seems no big issue
Hi Alexander,
Today's linux-next merge of the kvm-ppc tree got a conflict in
arch/powerpc/kernel/entry_64.S between commit c58ce2b1e3c7 (ppc64: fix
missing to check all bits of _TIF_USER_WORK_MASK in preempt) from Linus'
tree and commit bc8cc4993e19 (PPC: use CURRENT_THREAD_INFO instead of
open
Hi Alexander,
After merging the kvm-ppc tree, today's linux-next build (powerpc
ppc64_defconfig) failed like this:
arch/powerpc/kernel/exceptions-64s.S: Assembler messages:
arch/powerpc/kernel/exceptions-64s.S:479: Error: wrong number of operands
arch/powerpc/kernel/exceptions-64s.S:486: Error:
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