On δΊ”, 2014-08-22 at 15:04 -0700, Nishanth Aravamudan wrote:
On 22.08.2014 [10:12:56 +0800], Li Zhong wrote:
On ???, 2014-08-21 at 08:45 -0700, Nishanth Aravamudan wrote:
On 21.08.2014 [16:14:02 +0800], Li Zhong wrote:
With commit 2fabf084b, during boottime, cpu_numa_callback() is called
On 8/22/2014 11:21 PM, Scott Wood wrote:
On Fri, 2014-08-22 at 20:07 +0530, Prabhakar Kushwaha wrote:
Sorry Scott for late reply,
Please find my reply in-lined
On 8/21/2014 4:51 AM, Scott Wood wrote:
On Wed, 2014-08-20 at 09:05 +0530, Prabhakar Kushwaha wrote:
On 8/20/2014 5:38 AM, Scott
With commit 2fabf084b, during boottime, cpu_numa_callback() is called
earlier(before their online) for each cpu, and verify_cpu_node_mapping()
uses cpu_to_node() to check whether siblings are in the same node.
It skips the checking for siblings that are not online yet. So the only
check done
On 22 August 2014 08:18, Preeti U Murthy pre...@linux.vnet.ibm.com wrote:
At the moment this looks like the best way forward. We need to do this
cleanly by ensuring that we stop the governors and then call into the
driver to deal with the cpu frequency in its own way during reboot. The
best
On 25 August 2014 16:00, Viresh Kumar viresh.ku...@linaro.org wrote:
Its not that I am doubting if this will work or not. But this Hack is using
routines not meant for this purpose. And that being a core routine,
things aren't that straightforward anymore.
Well if you want a working HACK for
Add CONFIG_NLS_CODEPAGE_437, CONFIG_NLS_CODEPAGE_850,
CONFIG_NLS_ISO8859_1 in default configs for 85xx
and 86xx socs. Required for mounting vfat file-systems
on USB devices
Signed-off-by: Ramneek Mehresh ramneek.mehr...@freescale.com
Signed-off-by: Nikhil Badola nikhil.bad...@freescale.com
---
This patch adds a private HCALL to inform qemu the updated
rtas-base and rtas-entry address when OS invokes the call
instantiate-rtas. This is required as qemu allocates the
error reporting structure in RTAS space upon a machine check
exception and hence needs to know the updated RTAS.
On Fri, Aug 22, 2014 at 06:39:47PM +, Geoff Levand wrote:
Hi,
Here are a few minor fixups and enhancements for kexec support.
Patch 3 and 4 that add preprocessor macros for the kimage list flags are
ones that I use in the arm64 kexec support I am working on, so it would
be nice for
On Fri, Aug 22, 2014 at 06:39:47PM +, Geoff Levand wrote:
Remove the unneded declaration for a kexec_load() routine.
Fixes errors like these when running 'make headers_check':
include/uapi/linux/kexec.h: userspace cannot reference function or variable
defined in the kernel
On Fri, Aug 22, 2014 at 06:39:47PM +, Geoff Levand wrote:
Simplify the code around one of the conditionals in the kexec_load
syscall routine.
The original code was confusing with a redundant check on KEXEC_ON_CRASH
and comments outside of the conditional block. This change switches the
On Fri, Aug 22, 2014 at 06:39:47PM +, Geoff Levand wrote:
Define new kexec preprocessor macros IND_*_BIT that define the bit position of
the kimage entry flags. Change the existing IND_* flag macros to be defined
as
bit shifts of the corresponding IND_*_BIT macros. Also wrap all C
On Fri, Aug 22, 2014 at 06:39:47PM +, Geoff Levand wrote:
Add a new kexec preprocessor macro IND_FLAGS, which is the bitwise OR of
all the possible kexec IND_ kimage_entry indirection flags.
Having this macro allows for simplified code in the prosessing of the
kexec kimage_entry items.
Fast sleep is an idle state, where the core and the L1 and L2
caches are brought down to a threshold voltage. This also means that
the communication between L2 and L3 caches have to be fenced. However
the current P8 chips have a bug wherein this fencing between L2 and
L3 caches get delayed by a
Fast sleep is an idle state, where the core and the L1 and L2
caches are brought down to a threshold voltage. This also means that
the communication between L2 and L3 caches have to be fenced. However
the current P8 chips have a bug wherein this fencing between L2 and
L3 caches get delayed by a
From: Srivatsa S. Bhat sriva...@mit.edu
The offline cpus should enter deep idle states so as to gain maximum
powersavings when the entire core is offline. To do so the offline path
must be made aware of the available deepest idle state. Hence probe the
device tree for the possible idle states in
When guests have to be launched, the secondary threads which are offline
are woken up to run the guests. Today these threads wake up from nap
and check if they have to run guests. Now that the offline secondary
threads can go to fastsleep or going ahead a deeper idle state such as winkle,
add this
From: Preeti U Murthy pre...@linux.vnet.ibm.com
Fast sleep is an idle state, where the core and the L1 and L2
caches are brought down to a threshold voltage. This also means that
the communication between L2 and L3 caches have to be fenced. However
the current P8 chips have a bug wherein this
PORE can be programmed to restore hypervisor registers when waking up
from deep cpu idle states like winkle.
Add call to pass SPR address and value to OPAL, which in turn will
program PORE to restore the register state.
Cc: linuxppc-dev@lists.ozlabs.org
Cc: Benjamin Herrenschmidt
Cc: Benjamin Herrenschmidt b...@kernel.crashing.org
Cc: Paul Mackerras pau...@samba.org
Cc: Michael Ellerman m...@ellerman.id.au
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Shreyas B. Prabhu shre...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/reg.h | 1 +
1 file changed, 1 insertion(+)
Discover winkle from device tree. If supported make OPAL calls
necessary to save HIDs, HMEER, HSPRG0 and LPCR.
Also make OPAL call when the HID0 value is modified during
split/unsplit of cores.
Cc: Benjamin Herrenschmidt b...@kernel.crashing.org
Cc: Paul Mackerras pau...@samba.org
Cc: Michael
Winkle causes power to be gated off to the entire chiplet. Hence the
hypervisor/firmware state in the entire chiplet is lost.
This patch adds necessary infrastructure to support winkle. Specifically
does following:
- Before entering winkle, save state of registers that need to be
restored on
Enter winkle during offline if supported, else revert to sleep or nap.
Cc: Benjamin Herrenschmidt b...@kernel.crashing.org
Cc: Paul Mackerras pau...@samba.org
Cc: Michael Ellerman m...@ellerman.id.au
Cc: linuxppc-dev@lists.ozlabs.org
Signed-off-by: Shreyas B. Prabhu shre...@linux.vnet.ibm.com
---
Hello all:
It seems no any additional rejections for it. I guess, I need split the
'big' patch into pieces, and each send to its' related mailing list, so
let it not like a spam. And the schedule may like:
- Firstly, send patch for init/Kconfig to add CPU_*_ENDIAN. If pass
checking (hope it
The following commit prevents the MPC8548E on the XPedite5200 PrPMC
module from enumerating its PCI/PCI-X bus:
powerpc/fsl-pci: use 'Header Type' to identify PCIE mode
The previous patch prevents any Freescale PCI-X bridge from enumerating
the bus, if it is hardware strapped into Agent mode.
ABIv2 kernels are failing to backtrace through the kernel. An example:
39.30% readseek2_proce [kernel.kallsyms][k] find_get_entry
|
--- find_get_entry
__GI___libc_read
The problem is in valid_next_sp() where we check that the new
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