Hi Julian,
On 12/23/21 6:35 AM, Julian Calaby wrote:
Hi Tianjia,
On Mon, Dec 20, 2021 at 8:25 PM Tianjia Zhang
wrote:
crypto_sha256_init() and sha256_base_init() are the same repeated
implementations, remove the crypto_sha256_init() in generic
implementation, sha224 is the same process.
Use the possessive "its" instead of the contraction of "it is" (it's).
Signed-off-by: Randy Dunlap
Cc: Michael Ellerman
---
arch/powerpc/perf/hv-24x7.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- linux-next-20211222.orig/arch/powerpc/perf/hv-24x7.c
+++
PowerVM support two types of credits - Default (uses normal priority
FIFO) and Qality of service (QoS uses high priproty FIFO). The user
decides the number of QoS credits and sets this value with HMC
interface. With the core add/removal, this value can be changed in HMC
which invokes drmgr to
The hypervisor provides the available VAS GZIP capabilities such
as default or QoS window type and the target available credits in
each type. This patch creates sysfs entries and exports the target,
used and the available credits for each feature.
This interface can be used by the user space to
The VAS window may not be active if the system looses credits and
the NX generates page fault when it receives request on unmap
paste address.
The kernel handles the fault by remap new paste address if the
window is active again, Otherwise return the paste instruction
failure if the executed
The user space opens VAS windows and issues NX requests by pasting
CRB on the corresponding paste address mmap. When the system looses
credits due to core removal, the kernel has to close the window in
the hypervisor and make the window inactive by unmapping this paste
address. Also the OS has
The paste address mapping is done with mmap() after the window is
opened with ioctl. But the window can be closed due to lost credit
due to core removal before mmap(). So if the window is not active,
return mmap() failure with -EACCES and expects the user space reissue
mmap() when the window is
The hypervisor reduces the available credits if the core is removed
from the LPAR. So there is possibility of using excessive credits
(windows) in the LPAR and the hypervisor expects the system to close
the excessive windows. Even though the user space can continue to use
these windows to send
VAS windows can be closed in the hypervisor due to lost credits
when the core is removed. If these credits are available later
for core add, reopen these windows and set them active. When the
kernel sees page fault on the paste address, it creates new mapping
on the new paste address. Then the
PowerPC provides HW compression with NX coprocessor. This feature
is available on both PowerNV and PowerVM and included in Linux.
Since each powerpc chip has one NX coprocessor, the VAS introduces
the concept of windows / credits to manage access to this hardware
resource. On powerVM, these
Hi Tianjia,
On Mon, Dec 20, 2021 at 8:25 PM Tianjia Zhang
wrote:
>
> crypto_sha256_init() and sha256_base_init() are the same repeated
> implementations, remove the crypto_sha256_init() in generic
> implementation, sha224 is the same process.
>
> Signed-off-by: Tianjia Zhang
> ---
>
https://bugzilla.kernel.org/show_bug.cgi?id=215389
--- Comment #1 from Erhard F. (erhar...@mailbox.org) ---
Created attachment 300115
--> https://bugzilla.kernel.org/attachment.cgi?id=300115=edit
kernel .config (5.15.10, PowerMac G4 DP)
--
You may reply to this email to add a comment.
You
https://bugzilla.kernel.org/show_bug.cgi?id=215389
Bug ID: 215389
Summary: pagealloc: memory corruption at building glibc-2.33
and running its' testsuite
Product: Platform Specific/Hardware
Version: 2.5
Kernel Version: 5.15.10
On Mon, 20 Dec 2021, Christophe Leroy wrote:
> Implement CONFIG_DYNAMIC_FTRACE_WITH_ARGS. It accelerates the call
> of livepatching.
>
> Also note that powerpc being the last one to convert to
> CONFIG_DYNAMIC_FTRACE_WITH_ARGS, it will now be possible to remove
> klp_arch_set_pc() on all
On Mon, 20 Dec 2021, Christophe Leroy wrote:
> PPC64 needs some special logic to properly set up the TOC.
> See commit 85baa095497f ("powerpc/livepatch: Add live patching support
> on ppc64le") for details.
>
> PPC32 doesn't have TOC so it doesn't need that logic, so adding
> LIVEPATCH support
On Mon, 20 Dec 2021, Christophe Leroy wrote:
> Trying to build livepatch on powerpc/32 results in:
>
> kernel/livepatch/core.c: In function 'klp_resolve_symbols':
> kernel/livepatch/core.c:221:23: warning: cast to pointer from integer
> of different size [-Wint-to-pointer-cast]
>
Le 02/12/2021 à 13:00, Christophe Leroy a écrit :
> Do not silentely ignore a failure of create_branch() in
> patch_branch(). Return -ERANGE.
>
> Signed-off-by: Christophe Leroy
From
Boot fails with GCC latent entropy plugin enabled.
This is due to early boot functions trying to access 'latent_entropy'
global data while the kernel is not relocated at its final
destination yet.
As there is no way to tell GCC to use PTRRELOC() to access it,
disable latent entropy plugin in
Em Mon, Dec 06, 2021 at 02:47:49PM +0530, Kajol Jain escreveu:
> The code represent memory/cache level data based on PERF_MEM_LVL_*
> namespace, which is in the process of deprication in the favour of
> newer composite PERF_MEM_{LVLNUM_,REMOTE_,SNOOPX_,HOPS_} fields.
> Add data source encodings to
Em Mon, Dec 06, 2021 at 02:47:48PM +0530, Kajol Jain escreveu:
> The code represent data coming from L1/L2/L3 cache hits based on
> PERF_MEM_LVL_* namespace, which is in the process of deprecation in
> the favour of newer composite PERF_MEM_{LVLNUM_,REMOTE_,SNOOPX_,HOPS_}
> fields.
Thanks,
Em Mon, Dec 06, 2021 at 02:47:47PM +0530, Kajol Jain escreveu:
> Add new macros for mem_hops field which can be used to
> represent remote-node, socket and board level details.
>
> Currently the code had macro for HOPS_0 which, corresponds
> to data coming from another core but same node.
> Add
Hi,
After upgrading my Power8 server from 5.10 LTS to 5.15 LTS, I started
experiencing CPU hard lockups, usually rather quickly after boot:
watchdog: CPU 3 self-detected hard LOCKUP @
queued_spin_lock_slowpath+0x154/0x2d0
watchdog: CPU 3 TB:265651929071, last heartbeat TB:259344820187 (12318ms
> On 21-Dec-2021, at 7:20 PM, Michael Ellerman wrote:
>
> When CONFIG_PPC_RFI_SRR_DEBUG=y we check that NIP and SRR0 match when
> returning from interrupts. This can trigger falsely if NIP has either of
> its two low bits set via sigreturn or ptrace, while SRR0 has its low two
> bits masked in
kindly drop us a note.
> And when submitting patch, we suggest to use '--base' as documented in
> https://git-scm.com/docs/git-format-patch]
>
> url:
> https://github.com/0day-ci/linux/commits/Christophe-Leroy/powerpc-vdso-augment-VDSO32-functions-to-support-64-bits-build/20211222-021
in
https://git-scm.com/docs/git-format-patch]
url:
https://github.com/0day-ci/linux/commits/Christophe-Leroy/powerpc-vdso-augment-VDSO32-functions-to-support-64-bits-build/20211222-021033
base: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next
config: powerpc-randconfig-r023
From: Changcheng Deng
Fix the following coccicheck warning:
./arch/powerpc/platforms/cell/axon_msi.c: 456: 0-23: WARNING: fops_msic
should be defined with DEFINE_DEBUGFS_ATTRIBUTE
DEFINE_SIMPLE_ATTRIBUTE + debugfs_create_file()
imposes some significant overhead as compared to
Got it. Thx
On Wed, Dec 22, 2021 at 3:27 PM Christophe Leroy
wrote:
>
>
>
> Le 22/12/2021 à 04:02, Guo Ren a écrit :
> > On Wed, Dec 22, 2021 at 2:43 AM Christophe Leroy
> > wrote:
> >>
> >>
> >>
> >> Le 21/12/2021 à 18:00, guo...@kernel.org a écrit :
> >>> From: Guo Ren
> >>>
> >>> This macro
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