: Reworks for NVIDIA V100 + P9
passthrough (part 2)
[PATCH kernel RFC 3/3] powerpc/pseries/iommu: Use memory@ nodes in max RAM
address calculation
Please comment. Thanks.
Alexey Kardashevskiy (3):
vfio_pci: Allow mapping extra regions
vfio_pci: Allow regions to add own capabilities
vfio_pci
Strangely Reza is missed by the get_maintainers.pl, adding in cc: :-/
On 15/10/2018 20:32, Alexey Kardashevskiy wrote:
> This is a second set of patches required for passing through NVIDIA V100
> with coherent memory. The full patchset is here:
> https://github.com/aik/linux/tree/
MSR mask which NPU adds to ATS requests so nested MMU knows what
translations are permitted; the VFIO/KVM will not set MSR_HV.
This removes the check for FW_FEATURE_OPAL as pnv_npu2_init_context/
pnv_npu2_release_context/pnv_npu2_init do not call OPAL anymore.
Signed-off-by: Alexey Kardashevskiy
different data structure.
This adds a global list of NPUs so each platform can register and use
these in the same fashion.
Signed-off-by: Alexey Kardashevskiy
---
arch/powerpc/platforms/powernv/pci.h | 16 ---
arch/powerpc/platforms/powernv/npu-dma.c | 71 +---
2
We are going to add a global list of NPUs in the system which is going
to be yet another static symbol. Let's reorganise the code and put all
static symbols into one struct for better tracking what is really needed
for NPU (this might become a driver data some day).
Signed-off-by: A
symbols
are called from the NVIDIA driver so they must be able to work in both
powernv and pseries platforms.
This depends on skiboot's "npu2: Clear XTS_BDF_MAP when destroying context for
next init_context"
posted earlier today.
Please comment. Thanks.
Alexey Kardashevskiy
for ATS checkout requests.
Signed-off-by: Alexey Kardashevskiy
---
arch/powerpc/include/asm/pci.h | 2 ++
arch/powerpc/platforms/powernv/npu-dma.c | 38
2 files changed, 40 insertions(+)
diff --git a/arch/powerpc/include/asm/pci.h b/arch/powerpc
This step is to help removing the npu struct from pnv_phb so it
can be used by pseries as well.
Signed-off-by: Alexey Kardashevskiy
---
arch/powerpc/platforms/powernv/npu-dma.c | 20 +++-
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/arch/powerpc/platforms
changes mm_iommu_get() to reference the region so from now on for every
mm_iommu_get() we need a matching mm_iommu_put().
Signed-off-by: Alexey Kardashevskiy
---
arch/powerpc/mm/mmu_context_iommu.c | 5 +
drivers/vfio/vfio_iommu_spapr_tce.c | 33 ++---
2 files
backed with page structs.
Does 4/4 really need splitting?
Please comment. Thanks.
Alexey Kardashevskiy (4):
powerpc/mm/iommu: Rename mm_iommu_get
powerpc/mm/iommu/vfio_spapr_tce: Change mm_iommu_get to reference a
region
powerpc/mm/iommu: Make mm_iommu_new() fail on existing regions
e of thise
new regions which we must avoid unpinning of.
This adds @mm to tce_page_is_contained() and iommu_tce_xchg() to test
if the memory is device memory to avoid pfn_to_page().
Signed-off-by: Alexey Kardashevskiy
---
arch/powerpc/include/asm/iommu.h | 5 +-
arch/powerpc/include/asm/mmu
Since we are going to have 2 different preregistering helpers, let's
make it clear that mm_iommu_new() is only for the normal (i.e. not device)
memory and for existing areas mm_iommu_get() should be used instead.
Signed-off-by: Alexey Kardashevskiy
---
arch/powerpc/mm/mmu_context_iommu.
;
- mm_iommu_find to mm_iommu_get.
This should cause no behavioural change.
Signed-off-by: Alexey Kardashevskiy
---
arch/powerpc/include/asm/mmu_context.h | 4 ++--
arch/powerpc/mm/mmu_context_iommu.c| 8
drivers/vfio/vfio_iommu_spapr_tce.c| 6 +++---
3 files changed, 9 insertions
Ping?
On 17/09/2018 17:05, Alexey Kardashevskiy wrote:
> Ping?
>
> The problem is still there...
>
>
> On 24/08/2018 13:04, Alexey Kardashevskiy wrote:
>>
>>
>> On 09/08/2018 14:41, Alexey Kardashevskiy wrote:
>>>
>>>
>>> On 25
Ping?
On 02/10/2018 13:20, Alexey Kardashevskiy wrote:
> The skiboot firmware has a hot reset handler which fences the NVIDIA V100
> GPU RAM on Witherspoons and makes accesses no-op instead of throwing HMIs:
> https://github.com/open-power/skiboot/commit/fca2b2b839a67
>
> Now
On 10/10/2018 00:24, Christoph Hellwig wrote:
> This code has been unused since it was merged and is in the way of
> cleaning up the DMA code, thus remove it.
>
> This effectively reverts commit 5d2aa710 ("powerpc/powernv: Add support
> for Nvlink NPUs").
This code is heavily used by the NVIDI
On 28/09/2018 22:46, Michael Ellerman wrote:
> Alexey Kardashevskiy writes:
>> The included opal.h gives a wrong idea that CXL makes PPC OPAL calls
>> while it does not so let's remote it.
>
> But it does use eg.
>
> OPAL_PHB_CAPI_MODE_SNOOP_ON
> OPAL
.
Signed-off-by: Alexey Kardashevskiy
---
drivers/vfio/vfio_iommu_spapr_tce.c | 10 +++---
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/drivers/vfio/vfio_iommu_spapr_tce.c
b/drivers/vfio/vfio_iommu_spapr_tce.c
index b1a8ab3..ece0651 100644
--- a/drivers/vfio
pci_disable_device() which switches NPU2 to a safe mode and prevents
HMIs.
Signed-off-by: Alexey Kardashevskiy
---
Changes:
v2:
* updated the commit log
---
arch/powerpc/platforms/powernv/pci-ioda.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/powerpc/platforms/powernv/pci
The macro and few headers are not used so remove them.
Signed-off-by: Alexey Kardashevskiy
---
arch/powerpc/platforms/powernv/npu-dma.c | 14 --
1 file changed, 14 deletions(-)
diff --git a/arch/powerpc/platforms/powernv/npu-dma.c
b/arch/powerpc/platforms/powernv/npu-dma.c
index
accessor is used now in virtual mode as well, rename it
from IOMMU_TABLE_USERSPACE_ENTRY_RM (real mode) to _RO (read only).
Signed-off-by: Alexey Kardashevskiy
---
arch/powerpc/include/asm/iommu.h| 2 +-
arch/powerpc/kvm/book3s_64_vio.c| 5 ++---
arch/powerpc/kvm/book3s_64_vio_hv.c | 6
te indirect TCE levels on
demand")
Signed-off-by: Alexey Kardashevskiy
---
arch/powerpc/platforms/powernv/pci-ioda-tce.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/platforms/powernv/pci-ioda-tce.c
b/arch/powerpc/platforms/powernv/pci-ioda-tce.c
index fe9
The included opal.h gives a wrong idea that CXL makes PPC OPAL calls
while it does not so let's remote it.
Signed-off-by: Alexey Kardashevskiy
---
drivers/misc/cxl/pci.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
index b66d832..8c
Ping?
The problem is still there...
On 24/08/2018 13:04, Alexey Kardashevskiy wrote:
>
>
> On 09/08/2018 14:41, Alexey Kardashevskiy wrote:
>>
>>
>> On 25/07/2018 19:50, Alexey Kardashevskiy wrote:
>>> I am trying to pass through a 3D controller:
>>&
other
words we can create a window as big as 1<<58 but DMA simply won't work.
This reduces the upper limit from 59 to 55 bits to let the userspace know
about the hardware limits.
Fixes: ce57c6610cc2 "Merge branch 'topic/ppc-kvm' into next"
Signed-off-by: Alexey Karda
.
Signed-off-by: Alexey Kardashevskiy
---
Changes:
v2:
* %s/kvmppc_gpa_to_ua/kvmppc_tce_to_ua/g
---
arch/powerpc/include/asm/kvm_ppc.h | 2 +-
arch/powerpc/kvm/book3s_64_vio.c| 12
arch/powerpc/kvm/book3s_64_vio_hv.c | 22 +-
3 files changed, 14 insertions
request which cannot be
processed. By now the only possible failure must be H_TOO_HARD.
Signed-off-by: Alexey Kardashevskiy
Reviewed-by: David Gibson
---
arch/powerpc/kvm/book3s_64_vio.c| 20 ++--
arch/powerpc/kvm/book3s_64_vio_hv.c | 21 +++--
2 files
This removes EXPORT_SYMBOL_GPL(kvmppc_tce_validate) as the validators
are static now.
>From now on the attempts on mapping IOMMU pages bigger than allowed will
result in KVM exit.
Signed-off-by: Alexey Kardashevskiy
Reviewed-by: David Gibson
---
Changes:
v2:
* updated commit log
---
arch
so let's valitate TCE
beforehand.
This should cause no behavioral change.
Signed-off-by: Alexey Kardashevskiy
Reviewed-by: David Gibson
---
Changes:
v2:
* added a comment for the second get_user() from v1 discussion
---
arch/powerpc/kvm/book3s_64_vio.c| 18 ++
arch/po
knowledge
across different subsystems.
This removes realmode_pfn_to_page() as it is not used anymore.
While we at it, remove some EXPORT_SYMBOL_GPL() as that code is for
the real mode only and modules cannot call it anyway.
Signed-off-by: Alexey Kardashevskiy
---
Changes:
v2:
* only do delaying
9-rc3".
Please comment. Thanks.
Alex, I cc: you to keep you informed that
[RFC 1/6] did change drivers/vfio/vfio_iommu_spapr_tce.c but
this one does not.
Alexey Kardashevskiy (6):
KVM: PPC: Avoid marking DMA-mapped pages dirty in real mode
KVM: PPC: Validate all tces before updating ta
handle any request or at least log
them all.
Signed-off-by: Alexey Kardashevskiy
Reviewed-by: David Gibson
---
arch/powerpc/kvm/book3s_64_vio.c| 8
arch/powerpc/kvm/book3s_64_vio_hv.c | 6 +++---
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/power
.
Signed-off-by: Alexey Kardashevskiy
---
This is not related to any bug, just noticed this while doing other things.
I can also rename kvmppc_gpa_to_ua() if it makes more sense, does not it?
---
arch/powerpc/kvm/book3s_64_vio.c| 10 +++---
arch/powerpc/kvm/book3s_64_vio_hv.c | 16
or explicitly marks pages dirty when VFIO_SPAPR_TCE_IOMMU.
This removes realmode_pfn_to_page() as it is not used anymore.
Signed-off-by: Alexey Kardashevskiy
---
v1 was here: https://www.spinics.net/lists/kvm-ppc/msg14218.html
This is based on top of (it does not really depend on this but rebase d
well.
Signed-off-by: Alexey Kardashevskiy
---
This is made on top of:
[PATCH kernel 0/4] KVM: PPC: Some error handling rework
KVM: PPC: Validate all tces before updating tables
KVM: PPC: Inform the userspace about TCE update failures
KVM: PPC: Validate TCEs against preregistered memory page
On 30/08/2018 14:01, David Gibson wrote:
> On Thu, Aug 30, 2018 at 01:16:44PM +1000, Alexey Kardashevskiy wrote:
>> The KVM TCE handlers are written in a way so they fail when either
>> something went horribly wrong or the userspace did some obvious mistake
>> such as
This removes EXPORT_SYMBOL_GPL(kvmppc_tce_validate) as the validators
are static now.
>From now on the attempts on mapping IOMMU pages bigger than allowed will
result in KVM exit.
Signed-off-by: Alexey Kardashevskiy
---
arch/powerpc/include/asm/kvm_ppc.h | 2 --
arch/powerpc/kvm/book3s_
handle any request or at least log
them all.
Signed-off-by: Alexey Kardashevskiy
---
arch/powerpc/kvm/book3s_64_vio.c| 8
arch/powerpc/kvm/book3s_64_vio_hv.c | 6 +++---
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/arch/powerpc/kvm/book3s_64_vio.c b/arch/power
so let's valitate TCE
beforehand.
This should cause no behavioral change.
Signed-off-by: Alexey Kardashevskiy
---
arch/powerpc/kvm/book3s_64_vio.c| 8
arch/powerpc/kvm/book3s_64_vio_hv.c | 4
2 files changed, 12 insertions(+)
diff --git a/arch/powerpc/kvm/book3s_64_vio.c b
"powerpc: disable support for relative ksymtab
references".
Please comment. Thanks.
Alexey Kardashevskiy (4):
KVM: PPC: Validate all tces before updating tables
KVM: PPC: Inform the userspace about TCE update failures
KVM: PPC: Validate TCEs against preregistered memory page sizes
request which cannot be
processed. By now the only possible failure must be H_TOO_HARD.
Signed-off-by: Alexey Kardashevskiy
---
arch/powerpc/kvm/book3s_64_vio.c| 20 ++--
arch/powerpc/kvm/book3s_64_vio_hv.c | 20 ++--
2 files changed, 12 insertions(+), 28
On 09/08/2018 14:41, Alexey Kardashevskiy wrote:
>
>
> On 25/07/2018 19:50, Alexey Kardashevskiy wrote:
>> I am trying to pass through a 3D controller:
>> [0302]: NVIDIA Corporation GV100GL [Tesla V100 SXM2] [10de:1db1] (rev a1)
>>
>> which has a quite
On 10/08/2018 17:10, Michael Ellerman wrote:
> "Aneesh Kumar K.V" writes:
>
>> Fix the below build error using strlcpy instead of strncpy
>>
>> In function 'pnv_parse_cpuidle_dt',
>> inlined from 'pnv_init_idle_states' at
>> arch/powerpc/platforms/powernv/idle.c:840:7,
>> inlined from
On 25/07/2018 19:50, Alexey Kardashevskiy wrote:
> I am trying to pass through a 3D controller:
> [0302]: NVIDIA Corporation GV100GL [Tesla V100 SXM2] [10de:1db1] (rev a1)
>
> which has a quite unique feature as coherent memory directly accessible
> from a POWER9 CPU via an NV
On 08/08/2018 18:39, Alexey Kardashevskiy wrote:
>
>
> On 02/08/2018 02:16, Alex Williamson wrote:
>> On Wed, 1 Aug 2018 18:37:35 +1000
>> Alexey Kardashevskiy wrote:
>>
>>> On 01/08/2018 00:29, Alex Williamson wrote:
>>>> On Tue, 31 Jul 2018
On 02/08/2018 02:16, Alex Williamson wrote:
> On Wed, 1 Aug 2018 18:37:35 +1000
> Alexey Kardashevskiy wrote:
>
>> On 01/08/2018 00:29, Alex Williamson wrote:
>>> On Tue, 31 Jul 2018 14:03:35 +1000
>>> Alexey Kardashevskiy wrote:
>>>
>&
On 01/08/2018 00:29, Alex Williamson wrote:
> On Tue, 31 Jul 2018 14:03:35 +1000
> Alexey Kardashevskiy wrote:
>
>> On 31/07/2018 02:29, Alex Williamson wrote:
>>> On Mon, 30 Jul 2018 18:58:49 +1000
>>> Alexey Kardashevskiy wrote:
>>>> After so
On 31/07/2018 02:29, Alex Williamson wrote:
> On Mon, 30 Jul 2018 18:58:49 +1000
> Alexey Kardashevskiy wrote:
>
>> On 11/07/2018 19:26, Alexey Kardashevskiy wrote:
>>> On Tue, 10 Jul 2018 16:37:15 -0600
>>> Alex Williamson wrote:
>>>
>>&
On 11/07/2018 19:26, Alexey Kardashevskiy wrote:
> On Tue, 10 Jul 2018 16:37:15 -0600
> Alex Williamson wrote:
>
>> On Tue, 10 Jul 2018 14:10:20 +1000
>> Alexey Kardashevskiy wrote:
>>
>>> On Thu, 7 Jun 2018 23:03:23 -0600
>>> Alex Williamson w
he drconf chunk
is easily getting bigger that a megabyte.
Signed-off-by: Alexey Kardashevskiy
---
arch/powerpc/platforms/pseries/iommu.c | 43 +-
1 file changed, 42 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/platforms/pseries/iommu.c
b/arch/powerpc/pl
s than
50bits for DMA address space) and cover not just present memory
but also this new coherent memory.
This is based on sha1
d72e90f3 Linus Torvalds "Linux 4.18-rc6".
Please comment. Thanks.
Alexey Kardashevskiy (3):
powerpc/pseries/iommu: Allow dynamic window to start from zero
hat this patch does.
This makes use of the latter approach and exploits a new
"qemu,dma-force-remove-default" flag in a vPHB.
Signed-off-by: Alexey Kardashevskiy
---
arch/powerpc/platforms/pseries/iommu.c | 26 +++---
1 file changed, 23 insertions(+), 3 deletions(-)
d
only
at 1<<59, we will need to be able to create bigger windows starting from
zero. This does the initial preparation and should not cause any
behavioral changes.
Signed-off-by: Alexey Kardashevskiy
---
arch/powerpc/platforms/pseries/iommu.c | 8 +---
1 file changed, 5 insertions
# v4.12+
Signed-off-by: Alexey Kardashevskiy
Reviewed-by: David Gibson
Signed-off-by: Michael Ellerman
(cherry picked from commit 76fa4975f3ed12d15762bc979ca44078598ed8ee)
Signed-off-by: Alexey Kardashevskiy
---
The original patch did not apply because of fad953ce which fixed
all vmalloc'
ed by find_linux_pte() which indicates how the page is mapped to
the current userspace - if the page is huge and this is not a zero, then
it is a leaf pte and the page is mapped within the range.
Signed-off-by: Alexey Kardashevskiy
---
v6 got a couple of rb's but since the patch has changed again
ound pages before calling compound_order()
This is based on sha1
9d3cce1 Linus Torvalds "Linux 4.18-rc5".
Please comment. Thanks.
Alexey Kardashevskiy (2):
vfio/spapr: Use IOMMU pageshift rather than pagesize
KVM: PPC: Check if IOMMU page is contained in the pinned physical page
The size is always equal to 1 page so let's use this. Later on this will
be used for other checks which use page shifts to check the granularity
of access.
This should cause no behavioral change.
Reviewed-by: David Gibson
Acked-by: Alex Williamson
Signed-off-by: Alexey Kardashevskiy
--
On Thu, 12 Jul 2018 11:38:34 +1000
Alistair Popple wrote:
> Hi Alexey,
>
> On Wednesday, 11 July 2018 7:45:10 PM AEST Alexey Kardashevskiy wrote:
> > On Thu, 7 Jun 2018 17:06:07 +1000
> > Alexey Kardashevskiy wrote:
> >
> > > This brings NPU2 in a saf
On Wed, 4 Jul 2018 16:13:43 +1000
Alexey Kardashevskiy wrote:
> This patchset aims to reduce actual memory use for guests with
> sparse memory. The pseries guest uses dynamic DMA windows to map
> the entire guest RAM but it only actually maps onlined memory
> which may be not be c
This adds a debugfs entry with mm context id of a process which is using
KVM. This id is an index in the process table so the userspace can dump
that tree provided it is granted access to /dev/mem.
Signed-off-by: Alexey Kardashevskiy
---
arch/powerpc/include/asm/kvm_host.h | 1 +
arch/powerpc
On Mon, 2 Jul 2018 17:42:05 +1000
Alexey Kardashevskiy wrote:
> The sketchy bypass uses 256M pages so add this page size as well.
>
> This should cause no behavioral change but will be used later.
>
> Fixes: 477afd6ea6 "powerpc/ioda: Use ibm,supported-tce-sizes for IOM
s Torvalds "Linux 4.18-rc4".
Please comment. Thanks.
Alexey Kardashevskiy (2):
vfio/spapr: Use IOMMU pageshift rather than pagesize
KVM: PPC: Check if IOMMU page is contained in the pinned physical page
arch/powerpc/include/asm/mmu_context.h | 4 ++--
arch/powerpc/kvm/book3s_64_vio.c
ed by find_linux_pte() which indicates how the page is mapped to
the current userspace - if the page is huge and this is not a zero, then
it is a leaf pte and the page is mapped within the range.
Signed-off-by: Alexey Kardashevskiy
---
Changes:
v6:
* replaced hugetlbfs with pageshift from find_linux_pte(
The size is always equal to 1 page so let's use this. Later on this will
be used for other checks which use page shifts to check the granularity
of access.
This should cause no behavioral change.
Reviewed-by: David Gibson
Acked-by: Alex Williamson
Signed-off-by: Alexey Kardashevskiy
--
On Thu, 7 Jun 2018 17:06:07 +1000
Alexey Kardashevskiy wrote:
> This brings NPU2 in a safe mode when it does not throw HMI if GPU
> coherent memory is gone.
>
> Signed-off-by: Alexey Kardashevskiy
Anyone, ping?
> ---
>
> The main aim for this is nvlink2 pass
On Tue, 10 Jul 2018 16:37:15 -0600
Alex Williamson wrote:
> On Tue, 10 Jul 2018 14:10:20 +1000
> Alexey Kardashevskiy wrote:
>
> > On Thu, 7 Jun 2018 23:03:23 -0600
> > Alex Williamson wrote:
> >
> > > On Fri, 8 Jun 2018 14:14:23 +10
On Thu, 7 Jun 2018 23:03:23 -0600
Alex Williamson wrote:
> On Fri, 8 Jun 2018 14:14:23 +1000
> Alexey Kardashevskiy wrote:
>
> > On 8/6/18 1:44 pm, Alex Williamson wrote:
> > > On Fri, 8 Jun 2018 13:08:54 +1000
> > > Alexey Kardashevskiy wrote:
> >
On Sat, 7 Jul 2018 21:43:03 +1000
Nicholas Piggin wrote:
> On Sat, 7 Jul 2018 20:44:10 +1000
> Alexey Kardashevskiy wrote:
>
> > A VM which has:
> > - a DMA capable device passed through to it (eg. network card);
> > - running a malicious kernel tha
The size is always equal to 1 page so let's use this. Later on this will
be used for other checks which use page shifts to check the granularity
of access.
This should cause no behavioral change.
Reviewed-by: David Gibson
Acked-by: Alex Williamson
Signed-off-by: Alexey Kardashevskiy
--
llest preregistered page size in the preregistered
region descriptor and changes the mm_iommu_xxx API to check this against
the IOMMU page size. This calculates maximum page size as a minimum of
the natural region alignment and hugepagetlb's compound page size.
Signed-off-by: Alexey Kardashevskiy
-
ease comment. Thanks.
Alexey Kardashevskiy (2):
vfio/spapr: Use IOMMU pageshift rather than pagesize
KVM: PPC: Check if IOMMU page is contained in the pinned physical page
arch/powerpc/include/asm/mmu_context.h | 4 ++--
arch/powerpc/kvm/book3s_64_vio.c | 2 +-
arch/powerpc/kv
On Thu, 5 Jul 2018 15:19:04 +1000
Alexey Kardashevskiy wrote:
> On Thu, 5 Jul 2018 12:42:20 +1000
> David Gibson wrote:
>
> > On Wed, Jul 04, 2018 at 03:00:52PM +1000, Alexey Kardashevskiy wrote:
> > > A VM which has:
> > > - a DMA capable device passe
llest preregistered page size in the preregistered
region descriptor and changes the mm_iommu_xxx API to check this against
the IOMMU page size. This calculates maximum page size as a minimum of
the natural region alignment and compound page size.
Signed-off-by: Alexey Kardashevskiy
---
Change
v3:
* enforced huge pages not to cross preregistered chunk boundaries
v2:
* 2/2: explicitly check for compound pages before calling compound_order()
This is based on sha1
021c917 Linus Torvalds "Linux 4.18-rc3".
Please comment. Thanks.
Alexey Kardashevskiy (2):
vfio/spapr:
The size is always equal to 1 page so let's use this. Later on this will
be used for other checks which use page shifts to check the granularity
of access.
This should cause no behavioral change.
Reviewed-by: David Gibson
Acked-by: Alex Williamson
Signed-off-by: Alexey Kardashevskiy
--
On Thu, 5 Jul 2018 12:42:20 +1000
David Gibson wrote:
> On Wed, Jul 04, 2018 at 03:00:52PM +1000, Alexey Kardashevskiy wrote:
> > A VM which has:
> > - a DMA capable device passed through to it (eg. network card);
> > - running a malicious kernel that igno
We are going to reuse multilevel TCE code for the userspace copy of
the TCE table and since it is big endian, let's make the copy big endian
too.
Reviewed-by: David Gibson
Signed-off-by: Alexey Kardashevskiy
---
arch/powerpc/include/asm/iommu.h| 2 +-
arch/powerpc/kvm/book3s_64_
.
Reviewed-by: David Gibson
Signed-off-by: Alexey Kardashevskiy
---
arch/powerpc/platforms/powernv/Makefile | 2 +-
arch/powerpc/platforms/powernv/pci.h | 41 ++--
arch/powerpc/platforms/powernv/pci-ioda-tce.c | 313 ++
arch/powerpc/platforms/powernv
6/6
This is based on sha1
021c917 Linus Torvalds "Linux 4.18-rc3".
Please comment. Thanks.
Alexey Kardashevskiy (6):
powerpc/powernv: Remove useless wrapper
powerpc/powernv: Move TCE manupulation code to its own file
KVM: PPC: Make iommu_table::it_userspace big endian
power
((0x4 + 0x4) >> 16)*8)>>20 = 4MB (plus some for indirect
levels).
Signed-off-by: Alexey Kardashevskiy
Reviewed-by: David Gibson
---
Changes:
v2:
* fixed bug in cleanup path which forced the entire table to be
allocated right before destroying
* added memory alloca
This moves actual pages allocation to a separate function which is going
to be reused later in on-demand TCE allocation.
While we are at it, remove unnecessary level size round up as the caller
does this already.
Reviewed-by: David Gibson
Signed-off-by: Alexey Kardashevskiy
---
arch/powerpc
hould not change non-KVM handling of TCE tables and it_userspace
will not be allocated for non-KVM tables.
Reviewed-by: David Gibson
Signed-off-by: Alexey Kardashevskiy
---
Changes:
v2:
* fixed compile error by ditching one inline helper
---
arch/powerpc/include/asm/iommu.h | 6 +--
This gets rid of a useless wrapper around
pnv_pci_ioda2_table_free_pages().
Reviewed-by: David Gibson
Signed-off-by: Alexey Kardashevskiy
---
arch/powerpc/platforms/powernv/pci-ioda.c | 7 +--
1 file changed, 1 insertion(+), 6 deletions(-)
diff --git a/arch/powerpc/platforms/powernv/pci
this defaults to PAGE_SIZE.
Signed-off-by: Alexey Kardashevskiy
---
Changes:
v3:
* fixed upper limit for the page size
* added checks that we don't register parts of a huge page
v2:
* explicitely check for compound pages before calling compound_order()
---
The bug is: run QEMU _without_ hug
: explicitly check for compound pages before calling compound_order()
This is based on sha1
021c917 Linus Torvalds "Linux 4.18-rc3".
Please comment. Thanks.
Alexey Kardashevskiy (2):
vfio/spapr: Use IOMMU pageshift rather than pagesize
KVM: PPC: Check if IOMMU page is contai
The size is always equal to 1 page so let's use this. Later on this will
be used for other checks which use page shifts to check the granularity
of access.
This should cause no behavioral change.
Reviewed-by: David Gibson
Acked-by: Alex Williamson
Signed-off-by: Alexey Kardashevskiy
--
On Sat, 16 Jun 2018 11:04:32 +1000
Benjamin Herrenschmidt wrote:
> On Fri, 2018-06-01 at 18:10 +1000, Alexey Kardashevskiy wrote:
> > The existing sketchy bypass ignores the existing default 32bit TCE table
> > (created by default for every PE at boot time or after being used by
&
On Fri, 29 Jun 2018 17:34:36 +1000
Russell Currey wrote:
> DMA pseudo-bypass is a new set of DMA operations that solve some issues for
> devices that want to address more than 32 bits but can't address the 59
> bits required to enable direct DMA.
>
> The previous implementation for POWER8/PHB3 w
The sketchy bypass uses 256M pages so add this page size as well.
This should cause no behavioral change but will be used later.
Fixes: 477afd6ea6 "powerpc/ioda: Use ibm,supported-tce-sizes for IOMMU page
size mask"
Signed-off-by: Alexey Kardashevskiy
---
arch/powerpc/platforms/p
On Mon, 2 Jul 2018 17:32:56 +1000
Alexey Kardashevskiy wrote:
> On Fri, 29 Jun 2018 17:34:35 +1000
> Russell Currey wrote:
>
> > Knowing the largest possible TCE size of a PHB is useful, so get it
> > out of the device tree. This relies on the property being added in
>
On Fri, 29 Jun 2018 17:34:35 +1000
Russell Currey wrote:
> Knowing the largest possible TCE size of a PHB is useful, so get it out
> of the device tree. This relies on the property being added in OPAL.
>
> It is assumed that any PHB4 or later machine would be running firmware
> that implemented
On Mon, 2 Jul 2018 14:52:43 +1000
David Gibson wrote:
> On Mon, Jul 02, 2018 at 02:33:30PM +1000, Alexey Kardashevskiy wrote:
> > On Mon, 2 Jul 2018 14:08:52 +1000
> > David Gibson wrote:
> >
> > > On Fri, Jun 29, 2018 at 05:07:47PM +1000, Alexey Kardashevskiy w
On Mon, 2 Jul 2018 14:08:52 +1000
David Gibson wrote:
> On Fri, Jun 29, 2018 at 05:07:47PM +1000, Alexey Kardashevskiy wrote:
> > On Fri, 29 Jun 2018 15:18:20 +1000
> > Alexey Kardashevskiy wrote:
> >
> > > On Fri, 29 Jun 2018 14:57:02 +1000
> > > David
On Fri, 29 Jun 2018 15:18:20 +1000
Alexey Kardashevskiy wrote:
> On Fri, 29 Jun 2018 14:57:02 +1000
> David Gibson wrote:
>
> > On Fri, Jun 29, 2018 at 02:51:21PM +1000, Alexey Kardashevskiy wrote:
> > > On Fri, 29 Jun 2018 14:12:41 +1000
> > > David Gibson
On Fri, 29 Jun 2018 14:57:02 +1000
David Gibson wrote:
> On Fri, Jun 29, 2018 at 02:51:21PM +1000, Alexey Kardashevskiy wrote:
> > On Fri, 29 Jun 2018 14:12:41 +1000
> > David Gibson wrote:
> >
> > > On Tue, Jun 26, 2018 at 03:59:26PM +1000, Alexey Kardashevsk
On Fri, 29 Jun 2018 14:12:41 +1000
David Gibson wrote:
> On Tue, Jun 26, 2018 at 03:59:26PM +1000, Alexey Kardashevskiy wrote:
> > We already have a check in drivers/vfio/vfio_iommu_spapr_tce.c that
> > an IOMMU page is contained in the physical page so the PCI hardware won'
On Fri, 29 Jun 2018 11:55:40 +1000
Michael Ellerman wrote:
> Alexey Kardashevskiy writes:
>
> > This is to improve page boundaries checking and should probably
> > be cc:stable. I came accross this while debugging nvlink2 passthrough
> > but the lack of checking m
fails
because of the check in vfio_iommu_spapr_tce.c which is really
sustainable solution.
This stores the smallest preregistered page size in the preregistered
region descriptor and changes the mm_iommu_xxx API to check this against
the IOMMU page size.
Signed-off-by: Alexey Kardashevskiy
---
Change
The size is always equal to 1 page so let's use this. Later on this will
be used for other checks which use page shifts to check the granularity
of access.
This should cause no behavioral change.
Reviewed-by: David Gibson
Signed-off-by: Alexey Kardashevskiy
---
drivers
()
Please comment. Thanks.
Alexey Kardashevskiy (2):
vfio/spapr: Use IOMMU pageshift rather than pagesize
KVM: PPC: Check if IOMMU page is contained in the pinned physical page
arch/powerpc/include/asm/mmu_context.h | 4 ++--
arch/powerpc/kvm/book3s_64_vio.c | 2 +-
arch/powerpc/kvm
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