On Fri, May 31, 2024 at 11:45:48AM -0500, Nathan Lynch wrote:
> Breno Leitao writes:
>
> > On Thu, May 30, 2024 at 07:44:12PM -0500, Nathan Lynch via B4 Relay wrote:
> >> From: Nathan Lynch
> >> + nargs = array_index_nospec(nargs, ARRAY_SIZE(args.args));
> >
> Signed-off-by: Nathan Lynch
> Reported-by: Breno Leitao
Thanks for working on it.
Reviewed-by: Breno Leitao
> + nargs = array_index_nospec(nargs, ARRAY_SIZE(args.args));
> + nret = array_index_nospec(nret, ARRAY_SIZE(args.args) - nargs);
On an unrelated note, can nargs
On Tue, Mar 12, 2024 at 10:07:54PM +1100, Michael Ellerman wrote:
> Breno Leitao writes:
> > On Tue, Mar 12, 2024 at 08:17:42AM +, Christophe Leroy wrote:
> >> +Nathan as this is RTAS related.
> >>
> >> Le 21/08/2018 à 20:42, Breno Leitao a écrit :
> &
On Tue, Mar 12, 2024 at 08:17:42AM +, Christophe Leroy wrote:
> +Nathan as this is RTAS related.
>
> Le 21/08/2018 à 20:42, Breno Leitao a écrit :
> > The rtas syscall reads a value from a user-provided structure and uses it
> > to index an array, being a possible area fo
On Wed, Aug 31, 2022 at 02:02:48PM +, cgel@gmail.com wrote:
> From: Jinpeng Cui
>
> Return value directly from set_msg_len() instead of
> getting value from redundant variable rc.
>
> Reported-by: Zeal Robot
> Signed-off-by: Jinpeng Cui
Reviewed-by: Breno Leit
Signed-off-by: Breno Leitao
---
arch/powerpc/kernel/ptrace.c | 8 +++-
1 file changed, 7 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index cdd5d1d3ae41..7535f89e08cd 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel
Hi Gustavo,
On 1/24/19 3:25 PM, Gustavo A. R. Silva wrote:
>
>
> On 1/24/19 8:01 AM, Breno Leitao wrote:
>> 'regno' is directly controlled by user space, hence leading to a potential
>> exploitation of the Spectre variant 1 vulnerability.
>>
>> On PTRACE_SE
Signed-off-by: Breno Leitao
---
arch/powerpc/kernel/ptrace.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index cdd5d1d3ae41..3eac38a29863 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -33,6
options.
This test does not check if the user context is being read and set
properly by the kernel. Its purpose, at this time, is basically
guaranteeing that the kernel does not crash on invalid scenarios.
Signed-off-by: Breno Leitao
---
tools/testing/selftests/powerpc/harness.c | 6
hi Sasha,
On 1/16/19 11:35 AM, Sasha Levin wrote:
> Hi,
>
> [This is an automated email]
>
> This commit has been processed because it contains a "Fixes:" tag,
> fixing commit: e1c3743e1a20 powerpc/tm: Set MSR[TS] just prior to
> recheckpoint.
>
> The bot has tested the following trees:
s->msr will be replaced by the
ucontext value, so, it is being flushed already. In this case, it is
flushed earlier.
Signed-off-by: Breno Leitao
---
arch/powerpc/kernel/signal_64.c | 27 ++-
1 file changed, 26 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/si
c3743e1a20 ("powerpc/tm: Set MSR[TS] just prior to recheckpoint")
Signed-off-by: Breno Leitao
---
NB: Since stable kernels didn't cherry picked 5c784c8414fba ('powerpc/tm:
Remove msr_tm_active()), MSR_TM_ACTIVE() is not defined as 0 for
CONFIG_PPC_TRANSACTIONAL_MEM=n case, thus triggering t
On 1/8/19 9:14 AM, Christophe Leroy wrote:
> Le 08/01/2019 à 12:11, Breno Leitao a écrit :
>> Hi Michael,
>>
>> On 1/8/19 7:20 AM, Michael Ellerman wrote:
>>> Breno Leitao writes:
>>>
>>>> hi Christophe,
>>>>
>>>
res, causing the test to segfault, which is undesired because
the test needs to rerun, so, there is a signal handler for SIGSEGV which
will restart the test.
v2: Uses the MADV_DONTNEED memory advice
v3: Fix memcpy and 32-bits compilation
v4: Does not define unused macros
Signed-off-by: Breno Lei
Hi Michael,
On 1/8/19 7:20 AM, Michael Ellerman wrote:
> Breno Leitao writes:
>
>> hi Christophe,
>>
>> On 1/3/19 3:19 PM, LEROY Christophe wrote:
>>> Breno Leitao a écrit :
>>>
>>>> This patch simply adds definitions for the
hi Christophe,
On 1/7/19 10:47 AM, Christophe Leroy wrote:
> Hi Breno,
>
> Le 07/01/2019 à 13:44, Breno Leitao a écrit :
>> hi Christophe,
>>
>> On 1/3/19 3:19 PM, LEROY Christophe wrote:
>>> Breno Leitao a écrit :
>>>
>>>> This patch
hi Christophe,
On 1/3/19 3:19 PM, LEROY Christophe wrote:
> Breno Leitao a écrit :
>
>> This patch simply adds definitions for the MSR bits and some macros to
>> test for MSR TM bits.
>>
>> This was copied from arch/powerpc/include/asm/reg.h generic MSR part.
>
res, causing the test to segfault, which is undesired because
the test needs to rerun, so, there is a signal handler for SIGSEGV which
will restart the test.
v2: Uses the MADV_DONTNEED memory advice
v3: Fix memcpy and 32-bits compilation
Signed-off-by: Breno Leitao
---
.../testing/selftests/powe
This patch simply adds definitions for the MSR bits and some macros to
test for MSR TM bits.
This was copied from arch/powerpc/include/asm/reg.h generic MSR part.
Signed-off-by: Breno Leitao
---
tools/testing/selftests/powerpc/include/reg.h | 45 +++
1 file changed, 45
Hi Michael,
On 12/20/18 10:51 AM, Michael Ellerman wrote:
> Breno Leitao writes:
>
>> A new self test that forces MSR[TS] to be set without calling any TM
>> instruction. This test also tries to cause a page fault at a signal
>> handler, exactly between MSR[TS]
Hi Mikey,
On 11/29/18 12:11 AM, Michael Neuling wrote:
> On Wed, 2018-11-28 at 11:23 -0200, Breno Leitao wrote:
>> A new self test that forces MSR[TS] to be set without calling any TM
>> instruction. This test also tries to cause a page fault at a signal
>> handler, exactl
art the test.
Signed-off-by: Breno Leitao
---
tools/testing/selftests/powerpc/tm/.gitignore | 1 +
tools/testing/selftests/powerpc/tm/Makefile | 3 +-
.../powerpc/tm/tm-signal-force-msr.c | 115 ++
3 files changed, 118 insertions(+), 1 deletion(-)
create mode 100644 to
t? (uid: 1000)
> [ 225.100938] a.out[6067]: segfault (11) at c000dea0 nip
> c000dea0 lr 129d507b0 code 1
> [ 225.100943] a.out[6067]: Bad NIP, not dumping instructions.
>
> Fixes: 2865d08dd9ea ("powerpc/mm: Move the DSISR_PROTFAULT sanity check
to handle this discrepancy
instead of crashing.
This code could be compiled and used to test 32 and 64-bits signal
handlers.
Signed-off-by: Breno Leitao
Signed-off-by: Gustavo Romero
---
tools/testing/selftests/powerpc/tm/.gitignore | 1 +
tools/testing/selftests/powerpc/tm/Makefile | 2
msr[TS] should be
zeroed.
This patch also fixes a sparse warning related to lack of indentation when
CONFIG_PPC_TRANSACTIONAL_MEM is set.
Fixes: 2b0a576d15e0e ("powerpc: Add new transactional memory state to the
signal context")
CC: Stable # 3.10+
Signed-off-by: Breno Leitao
---
arc
transition
that is causing the exception.
Signed-off-by: Breno Leitao
---
arch/powerpc/kernel/traps.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index 9a86572db1ef..00af2c4febf4 100644
--- a/arch/powerpc/kernel
As other exit points, move SRR1 (MSR) into paca->tm_scratch, so, if
there is a TM Bad Thing in RFID, it is easy to understand what was the
SRR1 value being used.
Signed-off-by: Breno Leitao
---
arch/powerpc/kernel/entry_64.S | 4
1 file changed, 4 insertions(+)
diff --git a/arch/powe
the
debug_smp_processor_id() call at get_paca(), instead of calling
preempt_disable() before get_paca().
Signed-off-by: Breno Leitao
---
drivers/cpuidle/cpuidle-pseries.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/cpuidle/cpuidle-pseries.c
b/drivers/cpuidle/cpuidle-pseries.c
Hi Mikey,
On 11/21/18 8:42 PM, Michael Neuling wrote:
>> Do you mean in this part of code?
>>
>> SYSCALL_DEFINE0(rt_sigreturn)
>> {
>>
>> if (__copy_from_user(, >uc_sigmask, sizeof(set)))
>> goto badframe;
>>
>> ...
>> if
g preemption in
this chunk of code.
Changes from v2:
* Run the critical section with preempt_disable.
Fixes: 87b4e5393af7 ("powerpc/tm: Fix return of active 64bit signals")
Cc: sta...@vger.kernel.org (v3.9+)
Signed-off-by: Breno Leitao
diff --git a/arch/powerpc/kernel/signal_32.c b/arch/powerpc/ke
hi Michael,
On 11/20/18 8:34 AM, Michael Ellerman wrote:
> Hi Breno,
>
> Thanks for chasing this one down.
>
> Breno Leitao writes:
>
>> On a signal handler return, the user could set a context with MSR[TS] bits
>> set, and these bits wou
hi Mikey,
On 11/19/18 9:30 PM, Michael Neuling wrote:
> On Mon, 2018-11-19 at 10:44 -0200, Breno Leitao wrote:
>> On a signal handler return, the user could set a context with MSR[TS] bits
>> set, and these bits would be copied to task regs->msr.
>>
>> At restore_t
pc/tm: Fix return of active 64bit signals")
Cc: sta...@vger.kernel.org (v3.9+)
Signed-off-by: Breno Leitao
---
arch/powerpc/kernel/signal_64.c | 29 +++--
1 file changed, 15 insertions(+), 14 deletions(-)
diff --git a/arch/powerpc/kernel/signal_64.c b/arch/powerpc/ke
hi Satheesh,
On 11/09/2018 07:59 AM, Satheesh Rajendran wrote:
> On Thu, Nov 08, 2018 at 04:23:07PM -0200, Breno Leitao wrote:
>> hi Satheesh,
>>
>> On 11/08/2018 03:08 AM, sathn...@linux.vnet.ibm.com wrote:
>>> --- /dev/null
>>> +++ b/arch/powerpc
hi Satheesh,
On 11/08/2018 03:08 AM, sathn...@linux.vnet.ibm.com wrote:
> --- /dev/null
> +++ b/arch/powerpc/configs/guest.config
> @@ -0,0 +1,14 @@
> +CONFIG_VIRTIO_BLK=y
> +CONFIG_VIRTIO_BLK_SCSI=y
> +CONFIG_SCSI_VIRTIO=y
> +CONFIG_VIRTIO_NET=y
> +CONFIG_NET_FAILOVER=y
>
allow xmon to be possible invoked independent of devtree_lock
being held or not.
Signed-off-by: Breno Leitao
---
arch/powerpc/xmon/xmon.c | 18 ++
1 file changed, 14 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index 36b8dc47a3c3
Hi Mathieu, Christophe
Thanks for spotting and fixing this bug.
On 11/08/2018 05:25 AM, Mathieu Malaterre wrote:
> On Thu, Nov 8, 2018 at 7:09 AM Christophe Leroy
> wrote:
>>
>>
>>
>> On 11/07/2018 08:26 PM, Mathieu Malaterre wrote:
>>> Add gcc attribute unused for `cpumsr` variable.
>>>
>>>
hi Florian,
On 11/06/2018 04:32 PM, Florian Weimer wrote:
> * Breno Leitao:
>
>> This patchset for the hardware transactional memory (TM) subsystem
>> aims to avoid spending a lot of time on TM suspended mode in kernel
>> space. It basically changes where
not assume that a syscall inside a
suspended transaction will not be doomed, because kernel entrace will doom
any suspended transaction now on.
Signed-off-by: Breno Leitao
---
tools/testing/selftests/powerpc/tm/tm-syscall.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/tools/testing/selftes
TM SPR from previous thread will be saved on the
current thread, and might not have TEXASR[FS] set, for example.
Signed-off-by: Breno Leitao
---
arch/powerpc/kernel/signal_64.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/signal_64.c b/arch
AMR, PPR, VRSAVE, VSCR, DSCR, and TAR.
This patch only cares about PPR, TAR and DSCR, because others SPRS either
volatiles, restored as part of facilities or not being handled currently as
AMR/CRs.
Signed-off-by: Breno Leitao
---
arch/powerpc/kernel/asm-offsets.c | 4
arch/powerpc/kernel/
As other exit points, move SRR1 (MSR) into paca->tm_scratch, so, if
there is a TM Bad Thing in RFID, it is easy to understand what was the
SRR1 value being used.
Signed-off-by: Breno Leitao
---
arch/powerpc/kernel/entry_64.S | 4
1 file changed, 4 insertions(+)
diff --git a/arch/powe
Add some debug information into the TM subsystem. When enable, now it
prints when there is a reclaim, recheckpoint or lazy TM disabling.
Signed-off-by: Breno Leitao
---
arch/powerpc/kernel/process.c | 10 +-
1 file changed, 9 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc
Since every kernel entrance is calling TM_KERNEL_ENTRY, it is not
expected to arrive at this point with a suspended transaction.
If that is the case, cause a warning and reclaim the current thread in
order to avoid a TM Bad Thing.
Signed-off-by: Breno Leitao
---
arch/powerpc/kernel/process.c
is the only
way to do so.
Signed-off-by: Breno Leitao
---
arch/powerpc/include/asm/thread_info.h | 2 +-
arch/powerpc/kernel/entry_64.S | 23 ++-
2 files changed, 15 insertions(+), 10 deletions(-)
diff --git a/arch/powerpc/include/asm/thread_info.h
b/arch/powerpc/include
Make sure that we are not suspended on ptrace and that the registers were
already reclaimed.
Since the data was already reclaimed, there is nothing to be done here
except to restore the SPRs.
Signed-off-by: Breno Leitao
---
arch/powerpc/kernel/ptrace.c | 16 +---
1 file changed, 13
when it was de-scheduled. (Checking if a
recheckpoint would be required will be done later, at restore_tm_state()
stage.)
On top of that, both tm_reclaim_task() and tm_recheckpoint_new_task()
functions are not used anymore, removing them.
Signed-off-by: Breno Leitao
---
arch/powerpc/kernel
calling it is
restore_tm_state().
Signed-off-by: Breno Leitao
---
arch/powerpc/kernel/signal_32.c | 38 +
arch/powerpc/kernel/signal_64.c | 30 --
2 files changed, 19 insertions(+), 49 deletions(-)
diff --git a/arch/powerpc/kernel/signal_32
the task has TIF_RESTORE_TM tag set every time there
is a reclaim, so, a recheckpoint will be executed later.
Signed-off-by: Breno Leitao
---
arch/powerpc/kernel/process.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index
. the MSR will
be the same that will be put into SRR1, which will be the MSR after RFID.
Signed-off-by: Breno Leitao
---
arch/powerpc/kernel/process.c | 38 ---
1 file changed, 26 insertions(+), 12 deletions(-)
diff --git a/arch/powerpc/kernel/process.c b/arch
in
the exception entrance, and it will be recheckpointed by restore_tm_state
later.
Adding a WARN_ON() warning if we hit the _unavailable_tm() in suspended
mode, i.e, the reclaim was not executed somehow in the trap entrance, and
this is a bug.
Signed-off-by: Breno Leitao
---
arch/powerpc
in r3 register, to specify if a reclaim was
executed or not.
This patchset is based on initial work done by Cyril:
https://patchwork.ozlabs.org/cover/875341/
Signed-off-by: Breno Leitao
---
arch/powerpc/include/asm/exception-64s.h | 46
arch/powerpc/kernel/entry_64.S
() is only called by TM_KERNEL_ENTRY
and tm_recheckpoint is only called by restore_tm_state(). All the rest
causes a warning.
Regards,
Breno
[1] Documentation/powerpc/transactional_memory.txt
[2] commit 4bb3c7a0208fc13ca70598efd109901a7cd45ae7
[3] https://github.com/leitao/htm_torture/
Breno
Commit f384796c40dc ("powerpc/mm: Add support for handling > 512TB address
in SLB miss") removed function slb_miss_bad_addr(struct pt_regs *regs), but
kept its declaration in the prototype file. This patch simply removes the
function definition.
Signed-off-by: Breno Leitao
---
ild again. I also tested the rfi_flush_test selftest as other
tests (ptrace/ and tm/) and everything seems to be normal again.
Thank you!
>> Reported-by: Breno Leitao
>> Signed-off-by: Naveen N. Rao
Tested-by: Breno Leitao
Hi Christophe,
On 10/24/18 12:12 PM, LEROY Christophe wrote:
> Breno Leitao a écrit :
>
>> hi Christophe,
>>
>> On 10/23/2018 12:38 PM, LEROY Christophe wrote:
>>> Breno Leitao a écrit :
>>>>
>>>> This patch
this undesired failure.
CC: Tyrel Datwyler
CC: Thiago Jung Bauermann
Signed-off-by: Breno Leitao
---
tools/testing/selftests/powerpc/ptrace/core-pkey.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/tools/testing/selftests/powerpc/ptrace/core-pkey.c
b/tools/testing/selftests
This patch creates a new macro that skips a test and prints a message to
stderr. This is useful to give an idea why the tests is being skipped,
other than just skipping the test blindly.
Signed-off-by: Breno Leitao
---
tools/testing/selftests/powerpc/include/utils.h | 10 ++
1 file
.
Signed-off-by: Breno Leitao
Reviewed-by: Segher Boessenkool
---
tools/testing/selftests/powerpc/ptrace/ptrace-gpr.c| 2 +-
tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c | 4 ++--
tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c | 2 +-
tools/testing/selftests/powerpc
: function
'huge_ptep_set_access_flags' with external linkage has definition
This patch removes the keyword from the definition part. It also removes
the extern keyword from the declaration part, since checkpatch --strict
complains about it.
Suggested-by: Christophe Leroy
Signed-off-by: Breno Leitao
hi Christophe,
On 10/23/2018 12:38 PM, LEROY Christophe wrote:
> Breno Leitao a écrit :
>>
>> This patch removes the keyword from the definition part, while keeps
>> it in
>> the declaration part.
>
> I think checkpatch also says that extern should be
Hi Tyrel,
On 10/23/2018 05:41 PM, Tyrel Datwyler wrote:
>> --- a/tools/testing/selftests/powerpc/ptrace/core-pkey.c
>> +++ b/tools/testing/selftests/powerpc/ptrace/core-pkey.c
>> @@ -352,17 +352,11 @@ static int write_core_pattern(const char *core_pattern)
>> FILE *f;
>>
>> f =
this undesired failure.
CC: Thiago Jung Bauermann
Signed-off-by: Breno Leitao
---
tools/testing/selftests/powerpc/ptrace/core-pkey.c | 10 ++
1 file changed, 2 insertions(+), 8 deletions(-)
diff --git a/tools/testing/selftests/powerpc/ptrace/core-pkey.c
b/tools/testing/selftests/powerpc/ptrace
by the tests.
Signed-off-by: Breno Leitao
---
tools/testing/selftests/powerpc/ptrace/ptrace-gpr.c| 2 +-
tools/testing/selftests/powerpc/ptrace/ptrace-tm-gpr.c | 4 ++--
tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-tar.c | 2 +-
tools/testing/selftests/powerpc/ptrace/ptrace-tm-spd-vsx.c
ll be used as base, and r0 is not allowed to be used, avoiding
this issue.
Other than that, removing flt_2 register from the input operands, since it
is not used by the inline assembly code at all.
Cc: sta...@vger.kernel.org
Signed-off-by: Breno Leitao
---
tools/testing/selftests/powerpc/ptrace
.
Signed-off-by: Breno Leitao
---
arch/powerpc/sysdev/xive/common.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/sysdev/xive/common.c
b/arch/powerpc/sysdev/xive/common.c
index 959a2a62f233..6a6178357529 100644
--- a/arch/powerpc/sysdev/xive/common.c
+++ b/arch
the function a static.
Signed-off-by: Breno Leitao
---
arch/powerpc/kernel/eeh_driver.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/kernel/eeh_driver.c b/arch/powerpc/kernel/eeh_driver.c
index 67619b4b3f96..c325dedfee73 100644
--- a/arch/powerpc/kernel/eeh_driver.c
the warning, basically turning all global variables that
are not declared as extern at asm/pkeys.h into static.
It also includes asm/mmu_context.h header, which contains the definition of
arch_vma_access_permitted.
Signed-off-by: Breno Leitao
---
arch/powerpc/mm/pkeys.c | 15 ---
1 file
definition to these
symbols, thus, restricting their usage only in the imc-pmu.c file.
Signed-off-by: Breno Leitao
---
arch/powerpc/perf/imc-pmu.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/perf/imc-pmu.c b/arch/powerpc/perf/imc-pmu.c
index 1fafc32b12a0
/powerpc/lib/feature-fixups.c:171:6: warning: symbol
'do_stf_exit_barrier_fixups' was not declared. Should it be static?
This patch declares both functions as static, as they are only called by
do_stf_barrier_fixups(), which is in the same source code file.
Signed-off-by: Breno Leitao
---
arch
/powerpc/sysdev/scom.c:86:24: warning: Using plain integer as NULL
pointer
This patch simply replaces zero by NULL.
Signed-off-by: Breno Leitao
---
arch/powerpc/sysdev/scom.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/sysdev/scom.c b/arch/powerpc/sysdev
of a
straightforward dereference.
Signed-off-by: Breno Leitao
---
arch/powerpc/xmon/xmon.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index 4264aedc7775..5c7187923a72 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch
'cpu_show_spec_store_bypass' was not declared. Should it be static?
This patch simply includes the proper header (linux/cpu.h) to match
function definition and declaration.
Signed-off-by: Breno Leitao
---
arch/powerpc/kernel/security.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powerpc
: function
'huge_ptep_set_access_flags' with external linkage has definition
This patch removes the keyword from the definition part, while keeps it in
the declaration part.
Signed-off-by: Breno Leitao
---
arch/powerpc/mm/pgtable.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch
-by: Breno Leitao
Signed-off-by: Gustavo Romero
---
tools/testing/selftests/powerpc/tm/Makefile | 3 +-
tools/testing/selftests/powerpc/tm/tm-core.c | 480 +++
tools/testing/selftests/powerpc/tm/tm.h | 4 +
3 files changed, 486 insertions(+), 1 deletion(-)
create mode
the SPRs, otherwise, the TM is lazily disabled and the thread
value is already up-to-date and could be used directly, and saving is
not required.
Fixes: cd63f3cf1d5 ("powerpc/tm: Fix saving of TM SPRs in core dump")
Signed-off-by: Breno Leitao
---
arch/powerpc/kernel/ptrace.c | 7 +
-by: Breno Leitao
---
arch/powerpc/include/asm/tm.h | 5 +
arch/powerpc/kernel/process.c | 5 -
arch/powerpc/kernel/traps.c | 5 -
3 files changed, 9 insertions(+), 6 deletions(-)
diff --git a/arch/powerpc/include/asm/tm.h b/arch/powerpc/include/asm/tm.h
index e94f6db5e367..646d45a2aaae
Hi Mikey,
On 09/28/2018 02:25 AM, Michael Neuling wrote:
>> Perfect, and if the transaction fail, the CPU will rollback the changes and
>> restore the checkpoint registers (replacing the r3 that contains the pid
>> value), thus, it will be like "getpid" system call didn't execute.
>
> No. If we
Hi Mikey,
On 09/28/2018 02:36 AM, Michael Neuling wrote:
+ WARN_ON(MSR_TM_SUSPENDED(mfmsr())); + + tm_enable(); +
tm_save_sprs(&(tsk->thread));
>>>
>>> Do we need to check if TM was enabled in the task before saving the
>>> TM SPRs?
>>>
>>> What happens if TM was lazily off and
Hi Mikey,
On 09/18/2018 02:36 AM, Michael Neuling wrote:
> On Wed, 2018-09-12 at 16:40 -0300, Breno Leitao wrote:
>> Make sure that we are not suspended on ptrace and that the registers were
>> already reclaimed.
>>
>> Since the data was already reclaimed, there
Hi Mikey,
On 09/17/2018 10:29 PM, Michael Neuling wrote:
> On Wed, 2018-09-12 at 16:40 -0300, Breno Leitao wrote:
>> Now the transaction reclaims happens very earlier in the trap handler, and
>> it is impossible to know precisely, at that early time, what should be set
>>
Hi Mikey,
On 09/18/2018 03:36 AM, Michael Neuling wrote:
> On Wed, 2018-09-12 at 16:40 -0300, Breno Leitao wrote:
>> The Documentation/powerpc/transactional_memory.txt says:
>>
>> "Syscalls made from within a suspended transaction are performed as norma
Hi Mikey,
On 09/18/2018 02:50 AM, Michael Neuling wrote:
> On Wed, 2018-09-12 at 16:40 -0300, Breno Leitao wrote:
>> Since the transaction will be doomed with treckpt., the TEXASR[FS]
>> should be set, to reflect that the transaction is a failure. This patch
>> ensures it b
Hi Mikey,
On 09/18/2018 02:41 AM, Michael Neuling wrote:
> On Wed, 2018-09-12 at 16:40 -0300, Breno Leitao wrote:
>> In the previous TM code, trecheckpoint was being executed in the middle of
>> an exception, thus, DSCR was being restored to default kernel DSCR value
>>
hi Mikey
On 09/18/2018 01:04 AM, Michael Neuling wrote:
>> On top of that, both tm_reclaim_task() and tm_recheckpoint_new_task()
>> functions are not used anymore, removing them.
>
> What about tm_reclaim_current(). This is being used in places like signals
> which I would have thought we could
Hi Mikey,
On 09/17/2018 10:31 PM, Michael Neuling wrote:
> On Wed, 2018-09-12 at 16:40 -0300, Breno Leitao wrote:
>> This patch creates a macro that will be invoked on all entrance to the
>> kernel, so, in kernel space the transaction will be completely reclaimed
>> and
Hi Mikey,
First of all, thanks for you detailed review. I really appreciate your
comments here.
On 09/17/2018 02:25 AM, Michael Neuling wrote:
> On Wed, 2018-09-12 at 16:40 -0300, Breno Leitao wrote:
>> This patchset for the hardware transactional memory (TM) subsystem aims to
>>
Hi Mikey,
On 09/25/2018 02:24 AM, Michael Neuling wrote:
> On Mon, 2018-09-24 at 11:32 -0300, Breno Leitao wrote:
>> Hi Mikey,
>>
>> On 09/24/2018 04:27 AM, Michael Neuling wrote:
>>> When we treclaim we store the userspace checkpointed r13 to a scratch
>>>
understand this patch does not change any code
being generated.
Signed-off-by: Breno Leitao
---
arch/powerpc/platforms/powernv/opal.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/powerpc/platforms/powernv/opal.c
b/arch/powerpc/platforms/powernv/opal.c
index
segments + TM. Seen
> as a random userspace segfault with r13 looking like a kernel address.
>
> Signed-off-by: Michael Neuling
Reviewed-by: Breno Leitao
I am wondering if the same problem could not happen with r1 as well, since r1
is kept in the paca->tm_scratch after MSR[RI] is ena
, it continues to have the current
arguments instead, meaning that the registers where not clobbered.
This test is basically the same test for x86 located at
tools/testing/selftests/x86/ptrace_syscall.c, limited to test PTRACE_SYSEMU
request, and ported to PowerPC.
Signed-off-by: Breno Leitao
-off-by: Breno Leitao
---
arch/powerpc/include/asm/thread_info.h | 4 +++-
arch/powerpc/include/uapi/asm/ptrace.h | 4
arch/powerpc/kernel/ptrace.c | 11 +++
3 files changed, 18 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/include/asm/thread_info.h
b/arch/powerpc
, and it could be replaced with an operation with right shift (addis),
since it is used alone, i.e. not being part of a composed macro, which has
different bits set, and would require LOAD_REG_IMMEDIATE().
Tested on a 64 bits Big Endian machine running a 32 bits task.
Signed-off-by: Breno Leitao
(partially) use it via
> OPAL_REINIT_CPUS_TM_SUSPEND_DISABLED. So HFSCR[TM] will be off from
> dt-ftrs but we need to turn it on for the no suspend case.
>
> This patch fixes this by enabling HFSCR TM in this case.
>
> Cc: sta...@vger.kernel.org # 4.15+
> Signed-off-by: Michael Neuling
Tested-by: Breno Leitao
.
In this scenario, ignore these two failures and avoid the whole test to
return failure.
Signed-off-by: Breno Leitao
Reviewed-by: Gustavo Romero
---
tools/testing/selftests/powerpc/tm/tm-unavailable.c | 9 ++---
tools/testing/selftests/powerpc/tm/tm.h | 9 +
2 files changed, 15
ransaction will succeed, because it will not anymore.
Signed-off-by: Breno Leitao
---
tools/testing/selftests/powerpc/tm/tm-syscall.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/tools/testing/selftests/powerpc/tm/tm-syscall.c
b/tools/testing/selftests/powerpc/tm/tm-syscall.c
index 45
Since the transaction will be doomed with treckpt., the TEXASR[FS]
should be set, to reflect that the transaction is a failure. This patch
ensures it before recheckpointing, and remove changes from other places
that were calling recheckpoint.
Signed-off-by: Breno Leitao
---
arch/powerpc/kernel
do not need to do the same thing with tm_reclaim,
since it already set the DSCR to the default value, after TRECLAIM is
called, in the following lines:
/* Load CPU's default DSCR */
ld r0, PACA_DSCR_DEFAULT(r13)
mtspr SPRN_DSCR, r0
Signed-off-by: Breno Leitao
Make sure that we are not suspended on ptrace and that the registers were
already reclaimed.
Since the data was already reclaimed, there is nothing to be done here
except to restore the SPRs.
Signed-off-by: Breno Leitao
---
arch/powerpc/kernel/ptrace.c | 10 --
1 file changed, 4
registers area to the expected value.
The current FP/VEC restoration is not necessary, since the transaction will
be aborted and the checkpointed values will be restore.
Signed-off-by: Breno Leitao
---
arch/powerpc/kernel/signal_32.c | 23 +++
arch/powerpc/kernel/signal_64.c | 15
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