-specific drivers/misc/cxl/ also defines a 'cxl'
trace system, however, it is unlikely that a single platform will ever
load both drivers simultaneously.
Cc: Steven Rostedt
Signed-off-by: Dan Williams
Reviewed-by: Dave Jiang
---
This patch is targeting v6.3. I am sending it out now
to a "const" version for const-safety and
consistency among architectures.
Signed-off-by: Krzysztof Kozlowski
Reviewed-by: Geert Uytterhoeven
Acked-by: Dave Jiang
---
Changes since v1:
1. Add Geert's review.
---
drivers/ntb/hw/intel/ntb_hw_gen1.c | 2 +-
drivers/ntb/hw/intel/ntb_hw_g
On 06/08/2017 06:25 AM, Christoph Hellwig wrote:
> DMA_ERROR_CODE is not a public API and will go away. Instead properly
> unwind based on the loop counter.
>
> Signed-off-by: Christoph Hellwig <h...@lst.de>
Acked-by: Dave Jiang <dave.ji...@intel.com>
> ---
>
Acked-by: Dave Jiang dji...@mvista.com
On 07/08/2009 09:15 AM, Ira W. Snyder wrote:
When building without CONFIG_PCI the edac_pci_idx variable is unused,
causing a build-time warning. Wrap the variable in #ifdef CONFIG_PCI, just
like the rest of the PCI support.
Signed-off-by: Ira W. Snyderi
Acked-by: Dave Jiang dji...@mvista.com
Yang Shi wrote:
Based on Kumar's new compatible types patch, add P2020 into
MPC85xx EDAC compatible lists so that EDAC can recognize
P2020 meomry controller and L2 cache controller and export
the relevant fields to sysfs.
EDAC MPC85xx DDR3 support
--
--
Dave Jiang
Software Engineer
MontaVista Software, Inc.
http://www.mvista.com
--
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Acked-by: Dave Jiang [EMAIL PROTECTED]
Kumar Gala wrote:
All other compatibles that are uniquely identifying the processor use
a prefix of the form fsl,mpc85...'. We add support for it so we
can deprecate the older 'fsl,85...' that was inproperly used here.
Additionally added mpc8536 mpc8560
--
--
Dave Jiang
Software Engineer
MontaVista Software, Inc.
http://www.mvista.com
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Acked-by: Dave Jiang [EMAIL PROTECTED]
Nate Case wrote:
From: Andrew Kilkenny [EMAIL PROTECTED]
This adds support for the dual-core MPC8572 processor. We have
to support making SPR changes on each core. Also, since we can
have multiple memory controllers sharing an interrupt, flag
Linuxppc-dev@ozlabs.org
https://ozlabs.org/mailman/listinfo/linuxppc-dev
Kumar can you put this one in please? Thanks!
http://patchwork.ozlabs.org/linuxppc/patch?q=Dave%20Jiangid=19008
--
--
Dave Jiang
Software Engineer
MontaVista Software, Inc
Publish the devices listed in dts under SOC as of_device for 85xx_cds
platform. The devices are needed by the 85xx EDAC driver.
Signed-off-by: Dave Jiang [EMAIL PROTECTED]
---
arch/powerpc/platforms/85xx/mpc85xx_cds.c | 14 ++
1 file changed, 14 insertions(+)
Index: 2.6.26-rc5
Publish the devices listed in dts under SOC as of_device for 85xx_cds
platform. The devices are needed by the 85xx EDAC driver.
Signed-off-by: Dave Jiang [EMAIL PROTECTED]
---
Added simple bus per Scott Wood
mrch/powerpc/platforms/85xx/pc85xx_cds.c | 15 +++
1 file changed, 15
Acked-by: Dave Jiang [EMAIL PROTECTED]
Kumar Gala wrote:
including of asm/mpc85xx.h causes build problems since it doesn't exist.
Also removed warning:
drivers/edac/mpc85xx_edac.c:45: warning: 'mpc85xx_ctl_name' defined but not used
Signed-off-by: Kumar Gala [EMAIL PROTECTED
Publish the devices listed in dts under SOC as of_device for mpc85xx_cds
platforms.
The memory controller, L2 cache-controller, and the PCI controller(s) are
published as of_device so the mpc85xx EDAC driver can claim them for usage.
Signed-off-by: Dave Jiang [EMAIL PROTECTED]
---
commit
Kumar Gala wrote:
On Feb 11, 2008, at 2:34 PM, Dave Jiang wrote:
Creating a platform device for the PCI error registers in order for
the
mpc85xx EDAC driver to pick up proper resources. This is to prevent
the
EDAC driver from monopolizing the of_device and thus preventing
future PCI
interrupts from the mv64x60 bridge
chip or via polling mechanism provided by the EDAC core code.
Signed-off-by: Dave Jiang [EMAIL PROTECTED]
Acked-by: Dale Farnsworth [EMAIL PROTECTED]
---
Updated with changes from Stephen Rothwell
mv64x60_dev.c | 88
interrupts from the mv64x60 bridge
chip or via polling mechanism provided by the EDAC core code.
Signed-off-by: Dave Jiang [EMAIL PROTECTED]
Acked-by: Dale Farnsworth [EMAIL PROTECTED]
---
commit 0acbcb74052fbd5823bfb262619db52dedc85a86
tree 905f2c324a4d55bbcde78d60f2537a5027a831fa
parent
EDAC driver can claim them for usage.
Signed-off-by: Dave Jiang [EMAIL PROTECTED]
---
commit 187841bf9dff25e4ac1a7174daa55bb036c724b1
tree 3206ffbbfc5075d195345281f72f7b52f060b41b
parent a99824f327c748b2753f4fa570eb1fefcd6a9c4d
author Dave Jiang [EMAIL PROTECTED] Mon, 11 Feb 2008 12:51:33 -0700
Creating a platform device for the PCI error registers in order for the
mpc85xx EDAC driver to pick up proper resources. This is to prevent the
EDAC driver from monopolizing the of_device and thus preventing future PCI
code from using the PCI of_device(s).
Signed-off-by: Dave Jiang [EMAIL
NM, it was a bad test causing weird behavior on PPC. :(
Dave Jiang wrote:
It seems the mmap() userland call on PPC causes the kernel to lose the ref
count for the mount point. This is what I did on a prpmc2800 board (74xx) with
latest powerpc.git tree (but also seem to happen on 8548 as well
. The error reporting can be done two ways, via
interrupts, or polling.
Signed-off-by: Dave Jiang [EMAIL PROTECTED]
Signed-off-by: Douglas Thompson [EMAIL PROTECTED]
---
Updated error cleanup path for probe routine via comments from 85xx EDAC
driver.
drivers/edac/Kconfig|6 +
drivers
Creating a platform device for the PCI error registers in order for the
mpc85xx EDAC driver to pick up proper resources. This is to prevent the EDAC
driver from monopolizing the of_device and thus preventing future PCI code from
using the PCI of_device(s).
Signed-off-by: Dave Jiang [EMAIL
, via interrupts or polling.
Signed-off-by: Dave Jiang [EMAIL PROTECTED]
Signed-off-by: Douglas Thompson [EMAIL PROTECTED]
---
Made PCI error devices as platform devices as per suggestion.
Also fixed up init routine error handling so that some sort of warning is
posted if failure to register one
Arnd Bergmann wrote:
On Tuesday 31 July 2007, Dave Jiang wrote:
Actually it seems that for me to grab the interrupt number I have to do the
platform device creation in fsl_soc.c and call arch_init() instead of doing
it
from fsl_add_bridge(). fsl_add_bridge() is called way too early
Arnd Bergmann wrote:
On Wednesday 01 August 2007, Dave Jiang wrote:
Doh! I sent out the reworked patches right before your comments. Do you
happen
to know where I can find an example of how to do this? In regards to making a
platform_device a child of the PCI host bridge that is Thanks
Arnd Bergmann wrote:
On Friday 27 July 2007, Dave Jiang wrote:
+static struct of_device_id mpc85xx_pci_err_of_match[] = {
+ {
+.type = pci,
+.compatible = fsl,mpc8540-pci,
+},
+ {},
+};
+
+static struct of_platform_driver mpc85xx_pci_err_driver
Arnd Bergmann wrote:
On Monday 30 July 2007, Dave Jiang wrote:
Arnd Bergmann wrote:
I'd suggest either to integrate EDAC into the 85xx specific PCI code,
or to have an extra device in the device tree for this.
How about I create a platform device just for EDAC and leave the PCI
of_device
Arnd Bergmann wrote:
On Monday 30 July 2007, Dave Jiang wrote:
What about the other option I mentioned, handling the EDAC stuff from the
fsl_add_bridge() function?
I'm not sure I follow your thought on this quite yet. Do you mean the setup
of
either of_device or platform_device or do you
Arnd Bergmann wrote:
On Monday 30 July 2007, Dave Jiang wrote:
Maybe we are just better off adding entries in the DTS to get around this
problem
The best solution may be to look at how it's structured at the
register level. If the PCI EDAC registers are implemented separately
from
Linas Vepstas wrote:
On Mon, Jul 30, 2007 at 01:17:40PM -0700, Dave Jiang wrote:
Arnd Bergmann wrote:
The best solution may be to look at how it's structured at the
register level. If the PCI EDAC registers are implemented separately
from the regular PCI registers, a device tree entry would
, via interrupts or polling.
Signed-off-by: Dave Jiang [EMAIL PROTECTED]
Signed-off-by: Douglas Thompson [EMAIL PROTECTED]
---
commit 8ab17eba61575673d4e6a637a3987253cad9adaa
tree 1280fcac7b336cae61cd1e4a6dc9a82741b766ec
parent 8a80b43ddd3a4f7694df75869e13c3fc6e6c89f6
author Dave Jiang [EMAIL
the mpc85xx EDAC driver can claim them for usage.
Signed-off-by: Dave Jiang [EMAIL PROTECTED]
---
commit 8a80b43ddd3a4f7694df75869e13c3fc6e6c89f6
tree 772b956da2f4a1a55564519ececaf2e54be32248
parent 46b2835771ad8ef19b8e081e8c90439408c7645f
author Dave Jiang [EMAIL PROTECTED] Thu, 26 Jul 2007 10:59:00 -0700
interrupts from the mv64x60 bridge
chip or via polling mechanism provided by the EDAC core code.
Signed-off-by: Dave Jiang [EMAIL PROTECTED]
Acked-by: Dale Farnsworth [EMAIL PROTECTED]
---
arch/powerpc/sysdev/mv64x60_dev.c | 115 +
1 files changed, 103
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