a newbie at this
level of PCI configuration).
Thank you in advance to any/all who can help me figure this out!
Tom
>> -Original Message-
[Morrison, Tom]
>>
>> There's a few things you can do, though I don't have time just right now
>> to give you a
associated with it...
Any other thoughts - whenever you can make them - would
be more than welcome!
Tom
>> -Original Message-
>> From: Benjamin Herrenschmidt [mailto:b...@kernel.crashing.org]
>> Sent: Wednesday, September 23, 2009 5:42 AM
>> To: Morrison, Tom
>&g
I am not exactly sure who to direct this question to (general Linux kernel or
LinuxPPC),
so I am directing to both - in hopes that someone will recognize this problem -
and perhaps
give me some suggestions on how to proceed...
I am running Linux (2.6.23x (and 2.6.27.x)) on a MPC8572 based system
: tmorri...@empirix.com
www.empirix.com
>> -----Original Message-
>> From: Morrison, Tom
>> Sent: Thursday, May 21, 2009 11:24 AM
>> To: Morrison, Tom; Kumar Gala
>> Cc: linuxppc-dev@ozlabs.org; Young, Andrew; Brown, Jeff; Geary Sean-
>> R60898
>&g
Just had a little conference with several co-workers...to go over
results
We think that LT0 (the one that maps the kernel) has been corrupted:
Entry EPN RPNTID TMASK WIMGE TSIZ U0:3 X0:1
---
LT0 C
org]
>> Sent: Thursday, May 21, 2009 10:45 AM
>> To: Morrison, Tom
>> Cc: linuxppc-dev@ozlabs.org; Young, Andrew; Brown, Jeff; Geary Sean-
>> R60898
>> Subject: Re: How to debug a hung multi-core system
>>
>> > [Morrison, Tom]
>> > >B
>> -Original Message-
>> From: Kumar Gala [mailto:ga...@kernel.crashing.org]
>> Sent: Thursday, May 21, 2009 9:13 AM
>> To: Morrison, Tom
>> Cc: linuxppc-dev@ozlabs.org; Young, Andrew; Brown, Jeff
>> Subject: Re: How to debug a hung multi-cor
All,
First off, we turned SPE off completely in our build - so we
could debug a much deeper problem that seems to be occurring
in our application (before we try to find a potential test
case for corruption of GPR registers).
We have had this problem for 3 weeks, and just recently have
come do
ere
after the context switches back (if some other task does something
else with the entire 64bits).
Tom
>>
>> >> -Original Message-
>> >> From: Kumar Gala [mailto:ga...@kernel.crashing.org]
>> >> Sent: Wednesday, May 06, 2009
iginal Message-
>> From: Kumar Gala [mailto:ga...@kernel.crashing.org]
>> Sent: Wednesday, May 06, 2009 8:44 AM
>> To: Morrison, Tom
>> Cc: Michael Neuling; linuxppc-dev@ozlabs.org
>> Subject: Re: MSR_SPE - being turned off...
>>
>> Can you describe the # of p
agement), so thank you for any insight you
may have on this front...
Tom
>> -Original Message-
>> From: Kumar Gala [mailto:ga...@kernel.crashing.org]
>> Sent: Wednesday, May 06, 2009 8:32 AM
>> To: Morrison, Tom
>> Cc: Michael Neuling; linuxppc-dev@ozlabs.org
will keep
trying
thank you for your patience and suggestions on this...and I will keep working it
Tom
From: Kumar Gala [mailto:ga...@kernel.crashing.org]
Sent: Wed 5/6/2009 12:23 AM
To: Morrison, Tom
Cc: Michael Neuling; linuxppc-dev@ozlabs.org
Subject: Re
of each GPR into these doubles...
We could then re-test and see if this helps?
Tom
>> -Original Message-
>> From: Michael Neuling [mailto:mi...@neuling.org]
>> Sent: Tuesday, May 05, 2009 8:02 PM
>> To: Morrison, Tom
>> Cc: Kumar Gala; linuxppc-dev@ozlabs.o
Ok...taken out...
>> -Original Message-
>> From: Kumar Gala [mailto:ga...@kernel.crashing.org]
>> Sent: Tuesday, May 05, 2009 5:18 PM
>> To: Morrison, Tom
>> Cc: linuxppc-dev@ozlabs.org; Michael Neuling
>> Subject: Re: MSR_SPE - being turned off...
&
; -Original Message-
>> From: Kumar Gala [mailto:ga...@kernel.crashing.org]
>> Sent: Tuesday, May 05, 2009 7:08 AM
>> To: Morrison, Tom
>> Cc: linuxppc-dev@ozlabs.org
>> Subject: Re: MSR_SPE - being turned off...
>>
>>
>> On May 4, 2009, at 5
I have both a MPC8548 SBC and MPC8572 system that are running different
flavors of the
same Linux - 2.6.23.
I explicitly am turning it on very early on. Later, I have an
application that is compiled
with SPE instructions (e.g.: evstdd) , and there is where the problems
happen. If I explicit
We are having a problem with an external interrupt not actually being
received / detected on the MPC8572.
This external device 'believes' that it has sent an interrupt
(over PCIe) to the MPC8572 and we believe that the associated
ExVPR register has correctly unmasked/configured this correctly.
B
I wrote:
>> I have an external watchdog timer that is going off - and pulsing
into
>> the MCP0 of the 8572E. I get the printk indicating that the MCP0 went
>> off - the problem is - how do I clear the condition that caused this
>> because my hardware engineer swears that the pulse is ONLY 250ms -
Running 2.6.23.25 kernel...
I have an external watchdog timer that is going off - and pulsing into
the MCP0 of the 8572E. I get the printk indicating that the MCP0 went
off - the problem is - how do I clear the condition that caused this
because my hardware engineer swears that the pulse is ONLY 2
Sorry for such a wide query...but I did some searching of the linux trees...
and I am at a loss to find what the below email refers to in terms of a fix
for pci expressand I am having a hard time finding it in all of the commits?
any pointers to the right tree and/or the specific fix would b
Has anybody every used this chip in their design??
FYI, we have a custom board that I am bringing up right now that has a
MPC8572E that has its PCIE1 connected to the subject line PLX8616
PCI Express Switch...
As part of the boot, we successfully discover config the internal bridge
(i
nge = <0 ff>;
ranges = <0200 0 c 6f00 c 6f00 0 8000
0100 0 000c 6E00 0 0100>;
-
Thank you for all your help/comments...
Sincerely,
Tom Morrison
-Original Message-
From: Becky Bruce [mailto:[EMAIL PROTECT
Thank you...I will take that recommendation...
I will try that and get some results before I complete my
response to Becky this morning...
T
-Original Message-
From: Kumar Gala [mailto:[EMAIL PROTECTED]
Sent: Tuesday, August 12, 2008 8:42 AM
To: Morrison, Tom
Cc: ppc-dev list; Becky
I am sorry, but I've butted my head against a tree for over a
week and some things just aren't making sense...especially how
the prom parse code is working to exact / resolve physical
addresses to then ioremap...
a) Setup, I have a working MPC8548E board using 2.6.23.8 (ARCH=ppc)
with PHYS/PT
I am wondering if there is a development branch that contains
support for the Freescale 8572CDS...Looking in the latest uboot
version (1.3.3) there is support for sbc8641 & sbc8548 - but
no specific support for a sbc8572?
Tom Morrison
Principal Software Engineer
EMPIRIX
20 Crosby Drive -
I have a MPC8548E Board in which with an earlier version of
the kernel (2.6.11++), we customized head_e500.S and other
files to support the PHYS_64BIT & PTE_64BIT based upon
the work done for PPC64. It works very well.
I am attempting to update our kernel to the latest and have
gotten the basic
I am working on a separate project where there is a
discontiguous physical memory map . In looking at
solutions, it looks like the way to go is to
use something like a SPARSEMEM option.
FWIW, it even mentions something about discontinuous
memory in the Device Tree example about the 970 CPU
(Doc
It looks like I am getting up to the point where the
rootfs has been NFS mounted correctly. Whew, but the
first thing the INIT program does it try to open the
/dev/console device - and it goes oops:
>> kernel BUG at drivers/char/tty_io.c:781!
>> Oops: Exception in kernel mode, sig: 5 [#1]
>> Empi
>> In order to debug the kernel 2.6, I want setup serial port with
>> UART on mpc85xx as early as possible. I add the register access
>> code at the beginning of platform_init(). For example, I try
>> to write THR register(0xe0004500). However the system just
>> hanging there with this line.
an I had imagined...
I continue to have problems, but I will itemize those in a
separate email.
Tom Morrison
-Original Message-
From: Andy Fleming [mailto:[EMAIL PROTECTED]
Sent: Monday, August 06, 2007 2:10 PM
To: Morrison, Tom
Cc: linuxppc-dev@ozlabs.org
Subject: Re: Trying to use De
All,
Connected to eth1 (etsec2) of my mpc8548 cpu is a 88E1145 and I
am trying to get the core functionality running with the device tree
paradigm - I know the sense of the 88E1145 is active-low for my
mpc8548 board and have it working with an older 2.6.11++ kernel.
I built this new kernel wi
I am a little confused here. I've been working in an older (2.6.11)
ppc release and haven't been paying much attention to where I
should be getting the latest / stable git tree (for powerpc).
I am working on an e500/8548 branch - it looks like Kumar's
Git tree looks relatively new with lo
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