Re: [PATCH] arch/powerpc/include/asm/barrier.h: redefine rmb and wmb to lwsync

2023-02-22 Thread Kautuk Consul
Sorry, sent the wrong patch! Please ignore this one. Sending the v2 in another email. On Wed, Feb 22, 2023 at 02:31:12PM +0530, Kautuk Consul wrote: > A link from ibm.com states: > "Ensures that all instructions preceding the call to __lwsync > complete before any subsequent store instructions

[PATCH] arch/powerpc/include/asm/barrier.h: redefine rmb and wmb to lwsync

2023-02-22 Thread Kautuk Consul
A link from ibm.com states: "Ensures that all instructions preceding the call to __lwsync complete before any subsequent store instructions can be executed on the processor that executed the function. Also, it ensures that all load instructions preceding the call to __lwsync complete before

Re: [PATCH] arch/powerpc/include/asm/barrier.h: redefine rmb and wmb to lwsync

2023-02-22 Thread Kautuk Consul
> No, I don't mean to use the existing #ifdef/elif/else. > > Define an #ifdef /#else dedicated to xmb macros. > > Something like that: > > @@ -35,9 +35,15 @@ >* However, on CPUs that don't support lwsync, lwsync actually maps to a >* heavy-weight sync, so smp_wmb() can be a

Re: [PATCH] arch/powerpc/include/asm/barrier.h: redefine rmb and wmb to lwsync

2023-02-22 Thread Christophe Leroy
Le 22/02/2023 à 09:16, Kautuk Consul a écrit : > On Wed, Feb 22, 2023 at 07:02:34AM +, Christophe Leroy wrote: >> >> >> Le 22/02/2023 à 07:01, Kautuk Consul a écrit : >>> A link from ibm.com states: >>> "Ensures that all instructions preceding the call to __lwsync >>>complete before any

Re: [PATCH] arch/powerpc/include/asm/barrier.h: redefine rmb and wmb to lwsync

2023-02-22 Thread Kautuk Consul
On Wed, Feb 22, 2023 at 08:28:19AM +, Christophe Leroy wrote: > > > Le 22/02/2023 à 09:21, Kautuk Consul a écrit : > >> On Wed, Feb 22, 2023 at 07:02:34AM +, Christophe Leroy wrote: > +/* Redefine rmb() to lwsync. */ > >>> > >>> WHat's the added value of this comment ? Isn't it

Re: [PATCH] arch/powerpc/include/asm/barrier.h: redefine rmb and wmb to lwsync

2023-02-22 Thread Christophe Leroy
Le 22/02/2023 à 09:21, Kautuk Consul a écrit : >> On Wed, Feb 22, 2023 at 07:02:34AM +, Christophe Leroy wrote: +/* Redefine rmb() to lwsync. */ >>> >>> WHat's the added value of this comment ? Isn't it obvious in the line >>> below that rmb() is being defined to lwsync ? Please avoid

Re: [PATCH] arch/powerpc/include/asm/barrier.h: redefine rmb and wmb to lwsync

2023-02-22 Thread Kautuk Consul
> On Wed, Feb 22, 2023 at 07:02:34AM +, Christophe Leroy wrote: > > > +/* Redefine rmb() to lwsync. */ > > > > WHat's the added value of this comment ? Isn't it obvious in the line > > below that rmb() is being defined to lwsync ? Please avoid useless comments. > Sure. Sorry, forgot to add

Re: [PATCH] arch/powerpc/include/asm/barrier.h: redefine rmb and wmb to lwsync

2023-02-22 Thread Kautuk Consul
On Wed, Feb 22, 2023 at 07:02:34AM +, Christophe Leroy wrote: > > > Le 22/02/2023 à 07:01, Kautuk Consul a écrit : > > A link from ibm.com states: > > "Ensures that all instructions preceding the call to __lwsync > > complete before any subsequent store instructions can be executed > >

Re: [PATCH] arch/powerpc/include/asm/barrier.h: redefine rmb and wmb to lwsync

2023-02-21 Thread Christophe Leroy
Le 22/02/2023 à 07:01, Kautuk Consul a écrit : > A link from ibm.com states: > "Ensures that all instructions preceding the call to __lwsync > complete before any subsequent store instructions can be executed > on the processor that executed the function. Also, it ensures that > all load

Re: [PATCH] arch/powerpc/include/asm/barrier.h: redefine rmb and wmb to lwsync

2023-02-21 Thread Kautuk Consul
Hi All, On Wed, Feb 22, 2023 at 11:31:07AM +0530, Kautuk Consul wrote: > /* The sub-arch has lwsync */ > #if defined(CONFIG_PPC64) || defined(CONFIG_PPC_E500MC) > -#define SMPWMB LWSYNC > +#undef rmb > +#undef wmb > +/* Redefine rmb() to lwsync. */ > +#define rmb()({__asm__

[PATCH] arch/powerpc/include/asm/barrier.h: redefine rmb and wmb to lwsync

2023-02-21 Thread Kautuk Consul
A link from ibm.com states: "Ensures that all instructions preceding the call to __lwsync complete before any subsequent store instructions can be executed on the processor that executed the function. Also, it ensures that all load instructions preceding the call to __lwsync complete before