Nick Piggin writes:
On Sun, Oct 12, 2008 at 07:47:32AM +0200, Nick Piggin wrote:
Implement a more optimal mutex fastpath for powerpc, making use of acquire
and release barrier semantics. This takes the mutex lock+unlock benchmark
from 203 to 173 cycles on a G5.
+static inline int
On Thu, Nov 06, 2008 at 03:09:08PM +1100, Paul Mackerras wrote:
Nick Piggin writes:
On Sun, Oct 12, 2008 at 07:47:32AM +0200, Nick Piggin wrote:
Implement a more optimal mutex fastpath for powerpc, making use of acquire
and release barrier semantics. This takes the mutex lock+unlock
On Mon, Oct 13, 2008 at 11:20:20AM -0500, Scott Wood wrote:
On Mon, Oct 13, 2008 at 11:15:47AM -0500, Scott Wood wrote:
On Sun, Oct 12, 2008 at 07:47:32AM +0200, Nick Piggin wrote:
+static inline int __mutex_cmpxchg_lock(atomic_t *v, int old, int new)
+{
+ int t;
+
+ __asm__
On Sun, Oct 12, 2008 at 07:47:32AM +0200, Nick Piggin wrote:
+static inline int __mutex_cmpxchg_lock(atomic_t *v, int old, int new)
+{
+ int t;
+
+ __asm__ __volatile__ (
+1: lwarx %0,0,%1 # mutex trylock\n\
+ cmpw0,%0,%2\n\
+ bne-2f\n
+
On Mon, Oct 13, 2008 at 11:15:47AM -0500, Scott Wood wrote:
On Sun, Oct 12, 2008 at 07:47:32AM +0200, Nick Piggin wrote:
+static inline int __mutex_cmpxchg_lock(atomic_t *v, int old, int new)
+{
+ int t;
+
+ __asm__ __volatile__ (
+1:lwarx %0,0,%1 # mutex
Implement a more optimal mutex fastpath for powerpc, making use of acquire
and release barrier semantics. This takes the mutex lock+unlock benchmark
from 203 to 173 cycles on a G5.
Signed-off-by: Nick Piggin [EMAIL PROTECTED]
---
Index: linux-2.6/arch/powerpc/include/asm/mutex.h
On Sun, Oct 12, 2008 at 07:47:32AM +0200, Nick Piggin wrote:
Implement a more optimal mutex fastpath for powerpc, making use of acquire
and release barrier semantics. This takes the mutex lock+unlock benchmark
from 203 to 173 cycles on a G5.
+static inline int
