Wolfgang Denk wrote:
Dear John,
in message 4b73d43f0906061708o763409d0u10a344dfc30e3...@mail.gmail.com you
wrote:
The big question seems to be what the RefMan means when talking about
the system clock frequency. Obiously it is NOT the CPU clock as
...
But which one is it?
My best
Dear Wolfgang,
In message 4a2cc1de.5040...@grandegger.com you wrote:
Hm... so that means on MPC512x we should use mpc512x_find_ips_freq(),
while on MPC5200 we should use mpc52xx_find_ipb_freq() - but hey,
apart from the name these two functions are identical.
Grant - how would you
On Sun, Jun 7, 2009 at 2:34 PM, Wolfgang Denkw...@denx.de wrote:
Dear John,
in message 4b73d43f0906061708o763409d0u10a344dfc30e3...@mail.gmail.com you
wrote:
The big question seems to be what the RefMan means when talking about
the system clock frequency. Obiously it is NOT the CPU
On Mon, Jun 8, 2009 at 2:19 AM, Wolfgang Denkw...@denx.de wrote:
Dear Wolfgang,
In message 4a2cc1de.5040...@grandegger.com you wrote:
Hm... so that means on MPC512x we should use mpc512x_find_ips_freq(),
while on MPC5200 we should use mpc52xx_find_ipb_freq() - but hey,
apart from the
My best guess is still that it is ips clock. I think I stated in a
I fully agree.
a) Table 16-18 in the manual mentions ips and the values given there look much
more like ips than ppc_proc_freq (25MHz?)
b) the excerpt from clock.c Wolfgang posted mentions ips as parent
c) I cannot
Dear John,
in message 4b73d43f0906061708o763409d0u10a344dfc30e3...@mail.gmail.com you
wrote:
The big question seems to be what the RefMan means when talking about
the system clock frequency. Obiously it is NOT the CPU clock as
...
But which one is it?
My best guess is still that it
Dear John,
In message 4b73d43f0905071909v6e6e8b2el9eb6d4a1b9038...@mail.gmail.com you
wrote:
I think the fec's parent clock is the ipb clock not the ppc core clock.
Could that be the problem?
I don't think so.
When debugging, I printed the actual clock frequencies, and they
looked as
Dear John,
in message 4b73d43f0906061527p7ca1b301ybcfc576870a16...@mail.gmail.com you
wrote:
I noticed the latest BSP from Freescale has this patch:
From: Chen Hongjun hong-jun.c...@freecale.com
Date: Thu, 16 Apr 2009 20:22:52 +0800
Subject: [PATCH] Fixed FEC bug for bluestone board.
I noticed the latest BSP from Freescale has this patch:
From: Chen Hongjun hong-jun.c...@freecale.com
Date: Thu, 16 Apr 2009 20:22:52 +0800
Subject: [PATCH] Fixed FEC bug for bluestone board.
Signed-off-by: Chen Hongjun hong-jun.c...@freecale.com
---
drivers/net/fs_enet/mii-fec.c |2 +-
1
The big question seems to be what the RefMan means when talking about
the system clock frequency. Obiously it is NOT the CPU clock as
code variants above assume. The examples in Table 17-24. Programming
Examples for MII_SPEED Register list system clock frequencies of
25, 33, 40 and
Signed-off-by: Wolfgang Denk w...@denx.de
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: John Rigby jcri...@gmail.com
---
This patch is NOT intended for inclusion into mainline, but rather a
request for help. For some reason which I don't understand yet, the
Ethernet interface on the ARIA
Dear Joakim Tjernlund,
In message
of97606123.49b50465-onc12575af.002e2518-c12575af.002e6...@transmode.se you
wrote:
Just a stab in the dark: Perhaps the fec-fecp-fec_mii_speed field is
misaligned or is 16 bits ?
Good idea. The RM documents the register at offset 0x44 and describes
it as 32
Wolfgang Denk w...@denx.de wrote on 07/05/2009 11:19:48:
Dear Joakim Tjernlund,
In message
of97606123.49b50465-onc12575af.002e2518-c12575af.002e6...@transmode.se
you wrote:
Just a stab in the dark: Perhaps the fec-fecp-fec_mii_speed field is
misaligned or is 16 bits ?
Good idea.
I think the fec's parent clock is the ipb clock not the ppc core clock.
Could that be the problem?
On Wed, May 6, 2009 at 2:21 PM, Wolfgang Denk w...@denx.de wrote:
Signed-off-by: Wolfgang Denk w...@denx.de
Cc: Grant Likely grant.lik...@secretlab.ca
Cc: John Rigby jcri...@gmail.com
---
This
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