Enables conditional branch filter support for POWER8
utilizing MMCRA register based filter and also invalidates
a BHRB branch filter combination involving conditional
branches.
Signed-off-by: Anshuman Khandual
---
arch/powerpc/perf/power8-pmu.c | 10 ++
1 file changed, 10 insertions(+)
Adding documentation support for conditional branch filter.
Signed-off-by: Anshuman Khandual
Reviewed-by: Stephane Eranian
---
tools/perf/Documentation/perf-record.txt | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/tools/perf/Documentation/perf-record.txt
b/tools/perf/Do
This patch simply changes the name of the variable from "bhrb_filter" to
"bhrb_hw_filter" in order to add one more variable which will track SW
filters in generic powerpc book3s code which will be implemented in the
subsequent patch.
Signed-off-by: Anshuman Khandual
---
arch/powerpc/perf/core-bo
This patch enables SW based post processing of BHRB captured branches
to be able to meet more user defined branch filtration criteria in perf
branch stack sampling framework. These changes increase the number of
branch filters and their valid combinations on any powerpc64 server
platform with BHRB
Adding perf record support for new branch stack filter criteria
PERF_SAMPLE_BRANCH_COND.
Signed-off-by: Anshuman Khandual
Reviewed-by: Stephane Eranian
---
tools/perf/builtin-record.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools/perf/builtin-record.c b/tools/perf/builtin-record.c
i
Generic powerpc branch instruction analysis support added in the code
patching library which will help the subsequent patch on SW based
filtering of branch records in perf. This patch also converts and
exports some of the existing local static functions through the header
file to be used else where
Powerpc kernel now supports SW based branch filters for book3s systems with some
specifc requirements while dealing with HW supported branch filters in order to
achieve overall OR semantics prevailing in perf branch stack sampling framework.
This patch adapts the BHRB branch filter configuration to
This patchset is the re-spin of the original branch stack
sampling
patchset which introduced new PERF_SAMPLE_BRANCH_COND branch filter. This
patchset
also enables SW based branch filtering support for book3s powerpc platforms
which
have PMU HW backed branch stack sampling support
POWER8 PMU based BHRB supports filtering for conditional branches.
This patch introduces new branch filter PERF_SAMPLE_BRANCH_COND which
will extend the existing perf ABI. Other architectures can provide
this functionality with either HW filtering support (if present) or
with SW filtering of instru
On 10/11/2013 11:59 AM, Thomas Hühn wrote:
Hi Claudiu,
Does this show up on a half duplex (100Mb/s) link?
In my testsetup I always used 1GBit Ethernet connections, so no 100MBit tested
yet.
Should I do so ?
Could you provide following for the gianfar interface, on your setup:
sure:
# et
On Wed, Oct 16, 2013 at 12:24:36AM +0100, Grant Likely wrote:
> On Wed, 18 Sep 2013 15:24:50 +0200, Thierry Reding
> wrote:
> > Interrupt references are currently resolved very early (when a device is
> > created). This has the disadvantage that it will fail in cases where the
> > interrupt paren
> Implement instr_is_load_store_2_06() to detect whether a given instruction
> is one of the fixed-point or floating-point load/store instructions in the
> POWER Instruction Set Architecture v2.06.
...
> +int instr_is_load_store_2_06(const unsigned int *instr)
> +{
> + unsigned int op, upper, l
On Tue, Oct 15, 2013 at 03:47:50PM -0500, Benjamin Herrenschmidt wrote:
> On Tue, 2013-10-15 at 17:36 +0200, Hendrik Brueckner wrote:
> > On Sat, Oct 12, 2013 at 07:43:24AM +1100, Benjamin Herrenschmidt wrote:
> > > On Fri, 2013-10-11 at 14:47 +0200, Hendrik Brueckner wrote:
> > > > The tiocmget/ti
On 10/16/2013 01:55 PM, David Laight wrote:
>> Implement instr_is_load_store_2_06() to detect whether a given instruction
>> is one of the fixed-point or floating-point load/store instructions in the
>> POWER Instruction Set Architecture v2.06.
> ...
The op code encoding is dependent on the ISA ve
The MPC5200 LPBFIFO driver requires the bestcomm module to be
enabled, otherwise building will fail. Fix it.
Cc: # 3.10+
Reported-by: Wolfgang Denk
Signed-off-by: Anatolij Gustschin
---
arch/powerpc/platforms/52xx/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch
Factor out PCI specific code in the PAMU driver.
Signed-off-by: Varun Sethi
---
drivers/iommu/fsl_pamu_domain.c | 88 +++
1 file changed, 43 insertions(+), 45 deletions(-)
diff --git a/drivers/iommu/fsl_pamu_domain.c b/drivers/iommu/fsl_pamu_domain.c
index
The first patch fixes a build failure, when we try to build for a Freescale
platform without PCI support.
The second patch enables a default DMA window for the device, once it's
detached from a domain. In case of vfio, once device is detached from a
guest it can be again used by the host.
The las
Once the PCIe device assigned to a guest VM (via VFIO) gets detached from the
iommu domain
(when guest terminates), its PAMU table entry is disabled. So, this would
prevent the device
from being used once it's assigned back to the host.
This patch allows for creation of a default DMA window corr
Add maintainers entry for Freescale PAMU driver.
Signed-off-by: Varun Sethi
---
MAINTAINERS |7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 8a0cbf3..5b6ea5c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -3511,6 +3511,13 @@ S: Maintained
F:
Hi,
Together with other OpenWRT users we currently use this workaround patch
(https://dev.openwrt.org/changeset/38409/trunk) that downgrades the gianfar
driver to kernel version 3.9, as 3.10 is just crashing.
With this workaround, several users with TPLink 4900 routers reported that
their syst
Actually, I was wrong, the mpc8379 is an e300c4.
So it seems clear to me that we compile in the book3s code because
this is an 83xx CPU part. I also see that Kconfig knows that I have
an core-fsl-emb but we don't actually compile the PMU backend for it
because there's no support for anything but
David Laight [david.lai...@aculab.com] wrote:
|
| I can't help feeling the code could do with some comments about
| which actual instructions are selected where.
At a high level, only the load and store instructions are selected.
I added a reference to the Appendix F (Opcode maps) in the functio
Anshuman Khandual [khand...@linux.vnet.ibm.com] wrote:
| On 10/16/2013 01:55 PM, David Laight wrote:
| >> Implement instr_is_load_store_2_06() to detect whether a given instruction
| >> is one of the fixed-point or floating-point load/store instructions in the
| >> POWER Instruction Set Architectur
On Tue, 2013-10-15 at 21:57 -0500, Tang Yuantian-B29983 wrote:
> > > > > >
> > > > > The device tree makes that quite clear.
> > > >
> > > > You chose to model it that way in the device tree; that doesn't make
> > > > it clear that the hardware works that way or that it's a good way to
> > > > mode
> -Original Message-
> From: Sethi Varun-B16395
> Sent: Wednesday, October 16, 2013 4:53 PM
> To: j...@8bytes.org; io...@lists.linux-foundation.org; linuxppc-
> d...@lists.ozlabs.org; linux-ker...@vger.kernel.org; Yoder Stuart-B08248; Wood
> Scott-B07421; alex.william...@redhat.com; Bhush
> -Original Message-
> From: Wang Dongsheng-B40534
> Sent: Tuesday, October 15, 2013 2:51 PM
> To: Wood Scott-B07421
> Cc: Bhushan Bharat-R65777; linuxppc-dev@lists.ozlabs.org; Wang
> Dongsheng-B40534
> Subject: [PATCH v5 4/4] powerpc/85xx: add sysfs for pw20 state and altivec
> idle
>
> -Original Message-
> From: Bhushan Bharat-R65777
> Sent: Wednesday, October 16, 2013 10:20 PM
> To: Sethi Varun-B16395; j...@8bytes.org; iommu@lists.linux-
> foundation.org; linuxppc-dev@lists.ozlabs.org; linux-
> ker...@vger.kernel.org; Yoder Stuart-B08248; Wood Scott-B07421;
> alex.wi
> >
> >
> > > -Original Message-
> > > From: Sethi Varun-B16395
> > > Sent: Wednesday, October 16, 2013 4:53 PM
> > > To: j...@8bytes.org; io...@lists.linux-foundation.org; linuxppc-
> > > d...@lists.ozlabs.org; linux-ker...@vger.kernel.org; Yoder
> > > Stuart-B08248; Wood Scott-B07421; a
> -Original Message-
> From: Bhushan Bharat-R65777
> Sent: Wednesday, October 16, 2013 10:43 PM
> To: Sethi Varun-B16395; j...@8bytes.org; iommu@lists.linux-
> foundation.org; linuxppc-dev@lists.ozlabs.org; linux-
> ker...@vger.kernel.org; Yoder Stuart-B08248; Wood Scott-B07421;
> alex.wi
> >
> > > >
> > > >
> > > > > -Original Message-
> > > > > From: Sethi Varun-B16395
> > > > > Sent: Wednesday, October 16, 2013 4:53 PM
> > > > > To: j...@8bytes.org; io...@lists.linux-foundation.org; linuxppc-
> > > > > d...@lists.ozlabs.org; linux-ker...@vger.kernel.org; Yoder
> > > > >
> -Original Message-
> From: Bhushan Bharat-R65777
> Sent: Wednesday, October 16, 2013 10:52 PM
> To: Sethi Varun-B16395; j...@8bytes.org; iommu@lists.linux-
> foundation.org; linuxppc-dev@lists.ozlabs.org; linux-
> ker...@vger.kernel.org; Yoder Stuart-B08248; Wood Scott-B07421;
> alex.wi
On Oct 15, 2013, at 8:16 AM, Gerhard Sittig wrote:
> On Mon, Oct 14, 2013 at 13:09 -0700, Greg Kroah-Hartman wrote:
>>
>> On Mon, Oct 14, 2013 at 02:40:44PM -0500, Kumar Gala wrote:
>>>
>>> Greg,
>>>
>>> Wondering your thoughts on drivers/qe vs something like
>>> drivers/soc/fsl/qe. The Quicc
On Wed, 2013-10-16 at 11:05 -0400, Martin Hicks wrote:
> Actually, I was wrong, the mpc8379 is an e300c4.
>
> So it seems clear to me that we compile in the book3s code because
> this is an 83xx CPU part. I also see that Kconfig knows that I have
> an core-fsl-emb but we don't actually compile th
On Wed, 2013-10-16 at 07:45 +0200, leroy christophe wrote:
> Le 15/10/2013 22:33, Scott Wood a écrit :
> > On Tue, 2013-10-15 at 18:27 +0200, leroy christophe wrote:
> >> Le 11/10/2013 17:13, Joakim Tjernlund a écrit :
> >>> "Linuxppc-dev"
> >>>
> >>> wrote on 2013/10/11 14:56:40:
> Activatin
On Wed, Oct 16, 2013 at 2:42 PM, Benjamin Herrenschmidt
wrote:
> On Wed, 2013-10-16 at 11:05 -0400, Martin Hicks wrote:
>> Actually, I was wrong, the mpc8379 is an e300c4.
>>
>> So it seems clear to me that we compile in the book3s code because
>> this is an 83xx CPU part. I also see that Kconfig
On Friday, October 11, 2013 03:32:15 PM Benjamin Herrenschmidt wrote:
> On Mon, 2013-09-30 at 23:44 +0300, Aaro Koskinen wrote:
> > Hi,
> >
> > This is a resend of the v2 patchset:
> >
> > http://marc.info/?t=13779701321&r=1&w=2
> >
> > No changes except rebasing. Any chance to get these
On Wed, 2013-10-16 at 17:16 -0400, Martin Hicks wrote:
> That does fix the problem. v3.11 with the following:
>
> diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
> index eeae308..e91cf67 100644
> --- a/arch/powerpc/perf/core-book3s.c
> +++ b/arch/powerpc/perf/core-
On Tue, Mar 06, 2012 at 05:10:56PM +0800, chenhui zhao wrote:
> From: chenhui zhao
>
> Issue:
> Applications using lwarx/stwcx instructions in the core to
> compete for a software lock or semaphore with a device on
> RapidIO using read atomic set, clr, inc, or dec in a similar
> manner may falsel
On Wed, 2013-10-16 at 11:04 +0200, Hendrik Brueckner wrote:
> Indeed, two callbacks change the DTR line. The main difference is that
> tiocmget/tiocmset can be called from user space by ioctl. That's not the case
> for the dtr_cts callback. Also, tiocmget/tiocmset provide more flags that can
> b
On 10/03/2013 08:58 AM, Mark Brown wrote:
On Wed, Oct 02, 2013 at 09:15:22PM -0700, Guenter Roeck wrote:
irq_of_parse_and_map() returns 0 on error, not NO_IRQ.
Applied, thanks.
Hi Mark,
do you plan to send this patch upstream anytime soon ?
It fixes an xtensa build problem, so it would be
> > > That shows the dividers as being somewhere in between the PLL and the
> MUX.
> > > The MUX is where the divider is selected. There's nothing in the
> > > PLL's programming interface that relates to the dividers. As such
> > > it's simpler to model it as being part of the MUX.
> > >
> > > -S
> -Original Message-
> From: Bhushan Bharat-R65777
> Sent: Thursday, October 17, 2013 1:01 AM
> To: Wang Dongsheng-B40534; Wood Scott-B07421
> Cc: linuxppc-dev@lists.ozlabs.org
> Subject: RE: [PATCH v5 4/4] powerpc/85xx: add sysfs for pw20 state and
> altivec idle
>
>
>
> > -Origin
> -Original Message-
> From: Wang Dongsheng-B40534
> Sent: Thursday, October 17, 2013 8:16 AM
> To: Bhushan Bharat-R65777; Wood Scott-B07421
> Cc: linuxppc-dev@lists.ozlabs.org
> Subject: RE: [PATCH v5 4/4] powerpc/85xx: add sysfs for pw20 state and altivec
> idle
>
>
>
> > -Origin
Commit e82b89a6f19bae73fb064d1b3dd91fcefbb478f4 introduces a trivial
local denial of service.
> --- a/arch/powerpc/kernel/vio.c
> +++ b/arch/powerpc/kernel/vio.c
> @@ -1351,11 +1351,15 @@ static ssize_t modalias_show(struct devi
> const char *cp;
>
> dn = dev->of_node;
> - if (!d
The below patch fix a compile issue with KVM_XICS. Please fold
diff --git a/arch/powerpc/kvm/book3s_xics.c b/arch/powerpc/kvm/book3s_xics.c
index cef3de9..c3c832b 100644
--- a/arch/powerpc/kvm/book3s_xics.c
+++ b/arch/powerpc/kvm/book3s_xics.c
@@ -840,6 +840,7 @@ int kvmppc_xics_hcall(struct kvm_
PPC44x supports page sizes other than 4K however when 64K page sizes
are selected compilation fails. This is due to a change in the
definition of pgtable_t introduced by the following patch:
commit 5c1f6ee9a31cbdac90bbb8ae1ba4475031ac74b4
Author: Aneesh Kumar K.V
powerpc: Reduce PTE table memory
Alistair Popple writes:
> PPC44x supports page sizes other than 4K however when 64K page sizes
> are selected compilation fails. This is due to a change in the
> definition of pgtable_t introduced by the following patch:
>
> commit 5c1f6ee9a31cbdac90bbb8ae1ba4475031ac74b4
> Author: Aneesh Kumar K
On Thu, 17 Oct 2013 10:55:25 Aneesh Kumar K.V wrote:
> Alistair Popple writes:
> > diff --git a/arch/powerpc/include/asm/page.h
> > b/arch/powerpc/include/asm/page.h index b9f4262..b142d58 100644
> > --- a/arch/powerpc/include/asm/page.h
> > +++ b/arch/powerpc/include/asm/page.h
> > @@ -403,7 +40
On Thu, 2013-10-17 at 04:53 +0100, Ben Hutchings wrote:
> Commit e82b89a6f19bae73fb064d1b3dd91fcefbb478f4 introduces a trivial
> local denial of service.
Oops. Prarit, please send a fix asap ! I'm travelling right now.
Thanks !
Ben.
> > --- a/arch/powerpc/kernel/vio.c
> > +++ b/arch/powerpc/kern
> -Original Message-
> From: Bhushan Bharat-R65777
> Sent: Thursday, October 17, 2013 11:20 AM
> To: Wang Dongsheng-B40534; Wood Scott-B07421
> Cc: linuxppc-dev@lists.ozlabs.org
> Subject: RE: [PATCH v5 4/4] powerpc/85xx: add sysfs for pw20 state and
> altivec idle
>
>
>
> > -Origi
Hi Vinod,
I have gotten ACK from Mark for both the 1/3 and 2/3 patches.
Thanks.
On 09/26/2013 05:33 PM, hongbo.zh...@freescale.com wrote:
From: Hongbo Zhang
This patch adds support to 8-channel DMA engine, thus the driver works for both
the new 8-channel and the legacy 4-channel DMA engines.
> -Original Message-
> From: Wang Dongsheng-B40534
> Sent: Thursday, October 17, 2013 11:22 AM
> To: Bhushan Bharat-R65777; Wood Scott-B07421
> Cc: linuxppc-dev@lists.ozlabs.org
> Subject: RE: [PATCH v5 4/4] powerpc/85xx: add sysfs for pw20 state and altivec
> idle
>
>
>
> > -Origi
PPC44x supports page sizes other than 4K however when 64K page sizes
are selected compilation fails. This is due to a change in the
definition of pgtable_t introduced by the following patch:
commit 5c1f6ee9a31cbdac90bbb8ae1ba4475031ac74b4
Author: Aneesh Kumar K.V
powerpc: Reduce PTE table memory
> -Original Message-
> From: Bhushan Bharat-R65777
> Sent: Thursday, October 17, 2013 2:00 PM
> To: Wang Dongsheng-B40534; Wood Scott-B07421
> Cc: linuxppc-dev@lists.ozlabs.org
> Subject: RE: [PATCH v5 4/4] powerpc/85xx: add sysfs for pw20 state and
> altivec idle
>
>
>
> > -Origin
> > > -Original Message-
> > > From: Wang Dongsheng-B40534
> > > Sent: Thursday, October 17, 2013 11:22 AM
> > > To: Bhushan Bharat-R65777; Wood Scott-B07421
> > > Cc: linuxppc-dev@lists.ozlabs.org
> > > Subject: RE: [PATCH v5 4/4] powerpc/85xx: add sysfs for pw20 state
> > > and altivec
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