On Fri, May 15, 2015 at 01:46:17PM +0800, Wei Yang wrote:
The patch caches the VF index in pci_dn, which can be used to calculate
VF's bus, device and function number. Those information helps to locate
the VF's PCI device instance when doing hotplug during EEH recovery if
necessary.
In order to support seccomp-filter we need to be able to cope with
seccomp potentially setting a return value for the syscall.
Currently this doesn't work, because we assume any failure from
do_syscall_trace_enter() should result in ENOSYS being returned to
userspace.
The complication is that we
On Fri, May 15, 2015 at 01:46:16PM +0800, Wei Yang wrote:
During the EEH recovery, when a device's driver is not EEH aware or no
driver is bound with a device, EEH core would do hotplug on this device.
While it isn't feasible for a VF with usual hotplug procedure. During
removal of a VF, virtual
On Fri, May 15, 2015 at 01:46:25PM +0800, Wei Yang wrote:
Commit 262af557dd75(powerpc/powernv: Enable M64 aperatus for PHB3)
introduces the concept of compound PE, and they are linked together to
master PE's slaves lish_head with the list field. While this field is
usually used to linked to the
On Fri, May 15, 2015 at 01:46:20PM +0800, Wei Yang wrote:
EEH on powerpc platform needs eeh_dev structure to track the PCI device
status. Since VFs are created/released dynamically, VF's eeh_dev is also
dynamically created/released in system.
This patch creates/removes eeh_dev when pci_dn is
On Fri, May 15, 2015 at 01:46:21PM +0800, Wei Yang wrote:
On powernv platform, VF PE is a special PE which is different from the Bus
PE. On the EEH side, it needs a corresponding concept to handle the VF PE
properly. For example, we need to create VF PE when VF's pci_dev is
initialized in kernel.
On Fri, May 15, 2015 at 04:19:16PM +1000, Gavin Shan wrote:
On Fri, May 15, 2015 at 01:46:20PM +0800, Wei Yang wrote:
EEH on powerpc platform needs eeh_dev structure to track the PCI device
status. Since VFs are created/released dynamically, VF's eeh_dev is also
dynamically created/released in
Use resource_size_t to accommodate sizes greater than the size of an
unsigned long int on platforms that have more than 32 bit
physical addresses
Signed-off-by: Cristian Stoica cristian.sto...@freescale.com
Changes in v2:
- update definitions is pgtable_64.c as well - or else we get broken
When VF BAR size is larger than 64MB, we group VFs in terms of M64 BAR,
which means those VFs in a group should form a compound PE.
This patch links those VF PEs into compound PE in this case.
Signed-off-by: Wei Yang weiy...@linux.vnet.ibm.com
---
arch/powerpc/platforms/powernv/pci-ioda.c |
Commit 262af557dd75(powerpc/powernv: Enable M64 aperatus for PHB3)
introduces the concept of compound PE, and they are linked together to
master PE's slaves lish_head with the list field. While this field is
usually used to linked to the phb-ioda.pe_list to represents the PE is
used.
This patch
On Thu, 14 May 2015 13:53:57 +1000
Alexey Kardashevskiy a...@ozlabs.ru wrote:
On 05/14/2015 01:00 AM, Thomas Huth wrote:
On Tue, 12 May 2015 01:39:12 +1000
Alexey Kardashevskiy a...@ozlabs.ru wrote:
...
-/*
- * hwaddr is a kernel virtual address here (0xc... bazillion),
- * tce_build
To call do_syscall_trace_enter() we need pt_regs in r3, but we don't need
to recalculate it based on r1, it's already in r9.
Signed-off-by: Michael Ellerman m...@ellerman.id.au
---
arch/powerpc/kernel/entry_64.S | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git
On Fri, May 15, 2015 at 01:46:22PM +0800, Wei Yang wrote:
Before VF PE is introduced, there isn't a method to reset an individual PCI
function. And since skiboot firmware is not aware of the VF, the VF's reset
should be done in kernel.
This patch introduces a function pnv_eeh_vf_pe_reset() to do
On Fri, May 15, 2015 at 01:46:24PM +0800, Wei Yang wrote:
Compared with Bus PE, VF PE just has one single pci function. This
introduces the difference of error handling on a VF PE.
For example in the hotplug case, EEH needs to remove and re-create the VF
properly. In the case when PF's
Compared with Bus PE, VF PE just has one single pci function. This
introduces the difference of error handling on a VF PE.
For example in the hotplug case, EEH needs to remove and re-create the VF
properly. In the case when PF's error_detected() disable SRIOV, this patch
introduces a flag to mark
Since skiboot firmware is not aware of VFs, the restore action for VF
should be done in kernel.
The patch introduces function pnv_eeh_restore_vf_config() to restore PCI
config space for VFs after reset.
Signed-off-by: Wei Yang weiy...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/pci-bridge.h
On Fri, May 15, 2015 at 01:46:23PM +0800, Wei Yang wrote:
Since skiboot firmware is not aware of VFs, the restore action for VF
should be done in kernel.
The patch introduces function pnv_eeh_restore_vf_config() to restore PCI
config space for VFs after reset.
Signed-off-by: Wei Yang
We now have the right pieces in place to enable seccomp-filter on
64-bit. We select HAVE_ARCH_SECCOMP_FILTER to enable the code, and we
also need to switch to using secure_computing() rather than the strict
variant.
Enabling support on 32-bit should just be a matter of fixing the
assembler in
On Fri, May 15, 2015 at 05:27:52PM +1000, Gavin Shan wrote:
On Fri, May 15, 2015 at 01:46:23PM +0800, Wei Yang wrote:
Since skiboot firmware is not aware of VFs, the restore action for VF
should be done in kernel.
The patch introduces function pnv_eeh_restore_vf_config() to restore PCI
config
On Fri, May 15, 2015 at 11:34:47AM +1000, Michael Ellerman wrote:
On Wed, 2015-05-13 at 18:11 +0200, Torsten Duwe wrote:
In order to avoid an endless recursion, functions that may get
called from the data access handler must not call into tracing
functions, which may cause data access
Thanks for review.
Made changes as suggested.
On 05/14/2015 08:51 PM, trigg wrote:
On 14-May-2015, at 16:16, Vipin K Parashar vi...@linux.vnet.ibm.com wrote:
This patch adds support for FSP EPOW (Early Power Off Warning) and
DPO (Delayed Power Off) events support for PowerNV platform. EPOW
This patch adds support for FSP EPOW (Early Power Off Warning) and
DPO (Delayed Power Off) events for PowerNV platform. EPOW events are
generated by SPCN/FSP due to various critical system conditions that
need system shutdown. Few examples of these conditions are high ambient
temperature or system
This patch adds support for FSP EPOW (Early Power Off Warning) and
DPO (Delayed Power Off) events for PowerNV platform. EPOW events are
generated by SPCN/FSP due to various critical system conditions that
need system shutdown. Few examples of these conditions are high ambient
temperature or system
During the EEH recovery, when a device's driver is not EEH aware or no
driver is bound with a device, EEH core would do hotplug on this device.
While it isn't feasible for a VF with usual hotplug procedure. During
removal of a VF, virtual bus should be removed if necessary. During the
re-creation,
The patch caches the VF index in pci_dn, which can be used to calculate
VF's bus, device and function number. Those information helps to locate
the VF's PCI device instance when doing hotplug during EEH recovery if
necessary.
Signed-off-by: Wei Yang weiy...@linux.vnet.ibm.com
Acked-by: Gavin Shan
EEH on powerpc platform needs eeh_dev structure to track the PCI device
status. Since VFs are created/released dynamically, VF's eeh_dev is also
dynamically created/released in system.
This patch creates/removes eeh_dev when pci_dn is created/removed for VFs,
and marks it with EEH_DEV_VF type.
Compared with Bus PE, VF PE just has one single pci function. This
introduces the difference of error handling on a VF PE.
For example in the hotplug case, EEH needs to remove and re-create the VF
properly. In the case when PF's error_detected() disable SRIOV, this patch
introduces a flag to mark
Hi Vipin,
I am almost done, just a few nitpicks :-)
~Trigg
On Fri, May 15, 2015 at 4:11 PM, Vipin K Parashar
vi...@linux.vnet.ibm.com wrote:
This patch adds support for FSP EPOW (Early Power Off Warning) and
DPO (Delayed Power Off) events for PowerNV platform. EPOW events are
generated by
As commit ac205b7b (PCI: make sriov work with hotplug remove) indicates,
when removing PCI devices on a bus which has VFs, we need to remove them
in the reverse order.
This patch applies this pattern to the hotplug removal code for the powerpc
arch.
Signed-off-by: Wei Yang
On powernv platform, VF PE is a special PE which is different from the Bus
PE. On the EEH side, it needs a corresponding concept to handle the VF PE
properly. For example, we need to create VF PE when VF's pci_dev is
initialized in kernel. And add a flag to mark it is a VF PE.
This patch
When VF BAR size is larger than 64MB, we group VFs in terms of M64 BAR,
which means those VFs in a group should form a compound PE.
This patch links those VF PEs into compound PE in this case.
Signed-off-by: Wei Yang weiy...@linux.vnet.ibm.com
---
arch/powerpc/platforms/powernv/pci-ioda.c |
Architectures like ppc64 [1] need to do special things while clearing
pmd before a collapse. For them this operation is largely different
from a normal hugepage pte clear. Hence add a separate function
to clear pmd before collapse. After this patch pmdp_* functions
operate only on hugepage pte,
Changes from V4:
* Folded patches in -mm
mm-thp-split-out-pmd-collpase-flush-into-a-separate-functions-fix.patch
mm-thp-split-out-pmd-collpase-flush-into-a-separate-functions-fix-2.patch
mm-clarify-that-the-function-operateds-on-hugepage-pte-fix.patch
* Fix VM_BUG_ON on x86.
the default
This patchset enables EEH on SRIOV VFs. The general idea is to create proper
VF edev and VF PE and handle them properly.
Different from the Bus PE, VF PE just contain one VF. This introduces the
difference of EEH error handling on a VF PE. Generally, it has several
differences.
First, the VF's
The address cache is used to find the related eeh_dev for a given MMIO
address. From the definition of pci_dev.resource[], it keeps MMIO address
in following order: 6 normal BAR, ROM BAR, 6 IOV BAR, 4 Bridge window.
In the address cache, first it doesn't cache bridge device, second the IOV
BAR
Before VF PE is introduced, there isn't a method to reset an individual PCI
function. And since skiboot firmware is not aware of the VF, the VF's reset
should be done in kernel.
This patch introduces a function pnv_eeh_vf_pe_reset() to do the FLR or AF
FLR to a VF.
Signed-off-by: Wei Yang
Since skiboot firmware is not aware of VFs, the restore action for VF
should be done in kernel.
The patch introduces function pnv_eeh_restore_vf_config() to restore PCI
config space for VFs after reset.
Signed-off-by: Wei Yang weiy...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/pci-bridge.h
Also move the pmd_trans_huge check to generic code.
Acked-by: Kirill A. Shutemov kirill.shute...@linux.intel.com
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
arch/powerpc/include/asm/pgtable-ppc64.h | 4
arch/powerpc/mm/pgtable_64.c | 11 ---
Am 15.05.2015 um 16:27 schrieb Alex Bennée:
+++ b/arch/s390/include/uapi/asm/kvm.h
@@ -114,8 +114,6 @@ struct kvm_fpu {
__u64 fprs[16];
};
-#define KVM_GUESTDBG_USE_HW_BP 0x0001
[...]
+++ b/include/uapi/linux/kvm.h
[...]
+#define KVM_GUESTDBG_USE_SW_BP
diff --git a/include/asm-generic/pgtable.h b/include/asm-generic/pgtable.h
index 39f1d6a2b04d..acdcaac77d93 100644
--- a/include/asm-generic/pgtable.h
+++ b/include/asm-generic/pgtable.h
@@ -189,6 +189,28 @@ extern void pmdp_splitting_flush(struct vm_area_struct
*vma,
Am 15.05.2015 um 16:27 schrieb Alex Bennée:
index ef1a5fc..aca4f86 100644
--- a/arch/s390/include/uapi/asm/kvm.h
+++ b/arch/s390/include/uapi/asm/kvm.h
@@ -114,8 +114,6 @@ struct kvm_fpu {
__u64 fprs[16];
};
-#define KVM_GUESTDBG_USE_HW_BP 0x0001
-
diff --git
On Thu, 14 May 2015, Michal Hocko wrote:
On Wed 13-05-15 11:00:36, Eric B Munson wrote:
On Mon, 11 May 2015, Eric B Munson wrote:
On Fri, 08 May 2015, Andrew Morton wrote:
On Fri, 8 May 2015 15:33:43 -0400 Eric B Munson emun...@akamai.com
wrote:
mlock() allows a
We have confusing functions to clear pmd, pmd_clear_* and pmd_clear.
Add _huge_ to pmdp_clear functions so that we are clear that they
operate on hugepage pte.
We don't bother about other functions like pmdp_set_wrprotect,
pmdp_clear_flush_young, because they operate on PTE bits and hence
On 05/14/2015 05:03 PM, Benjamin Herrenschmidt wrote:
This patch adds the ability to the DMA direct ops to fallback to the IOMMU
ops for coherent alloc/free if the coherent mask of the device isn't
suitable for accessing the direct DMA space and the device also happens
to have an active IOMMU
On 2015-05-15 19:33, David Hildenbrand wrote:
Am 15.05.2015 um 16:27 schrieb Alex Bennée:
+++ b/arch/s390/include/uapi/asm/kvm.h
@@ -114,8 +114,6 @@ struct kvm_fpu {
__u64 fprs[16];
};
-#define KVM_GUESTDBG_USE_HW_BP 0x0001
[...]
+++ b/include/uapi/linux/kvm.h
[...]
Currently x86, powerpc and soon arm64 use the same two architecture
specific bits for guest debug support for software and hardware
breakpoints. This makes the shared values explicit.
Signed-off-by: Alex Bennée alex.ben...@linaro.org
Reviewed-by: Andrew Jones drjo...@redhat.com
-
v4
- claim
Am 15.05.2015 um 16:27 schrieb Alex Bennée:
+++ b/arch/s390/include/uapi/asm/kvm.h
@@ -114,8 +114,6 @@ struct kvm_fpu {
__u64 fprs[16];
};
-#define KVM_GUESTDBG_USE_HW_BP 0x0001
[...]
+++ b/include/uapi/linux/kvm.h
[...]
+#define KVM_GUESTDBG_USE_SW_BP
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