[PATCH] powerpc/process: fix altivec SPR not being saved

In save_sprs() in process.c contains the following test: if (cpu_has_feature(cpu_has_feature(CPU_FTR_ALTIVEC))) t->vrsave = mfspr(SPRN_VRSAVE); CPU feature with the mask 0x1 is CPU_FTR_COHERENT_ICACHE so the test is equivilent to: if

[PATCH] freescale:Make the function ucc_geth_tx have a return type of void

This makes the function ucc_geth_tx have a return type of void now due to this particular function always completing without ever executing a non recoverable error. Signed-off-by: Nicholas Krause --- drivers/net/ethernet/freescale/ucc_geth.c | 3 +-- 1 file changed, 1

[PATCH v4 7/8] T104xQDS: Add qe node to t104xqds

add qe node to t104xqds.dtsi Signed-off-by: Zhao Qiang --- Changes for v2 - rebase Changes for v3 - rebase Changes for v4 - rebase arch/powerpc/boot/dts/fsl/t104xqds.dtsi | 38 + 1 file changed, 38 insertions(+) diff

[PATCH v4 8/8] QE-UART: modify of_device_id for qe-uart driver

Drop device type and modify compatible to SoC specific compatible. Signed-off-by: Zhao Qiang --- drivers/tty/serial/ucc_uart.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/tty/serial/ucc_uart.c b/drivers/tty/serial/ucc_uart.c index

Re: [PATCH][v4] livepatch/ppc: Enable livepatching on powerpc

On 04/03/16 23:42, Torsten Duwe wrote: > On Thu, Mar 03, 2016 at 05:52:01PM +0100, Petr Mladek wrote: > [...] >> index ec7f8aada697..2d5333c228f1 100644 >> --- a/arch/powerpc/kernel/entry_64.S >> +++ b/arch/powerpc/kernel/entry_64.S >> @@ -1265,6 +1271,31 @@ ftrace_call: >> ld r0,

[PATCH v4 3/8] QE: Add uqe_serial document to bindings

Add uqe_serial document to Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/uqe_serial.txt Signed-off-by: Zhao Qiang --- Changes for v2 - modify tx/rx-clock-name specification Changes for v3 - NA Changes for v4 - drop device_type - modify

Re: Problems with swapping in v4.5-rc on POWER

On Fri, 2016-03-04 at 09:58 -0800, Hugh Dickins wrote: > > The alternative bisection was as unsatisfactory as the first: > again it fingered an irrelevant merge (rather than any commit > pulled in by that merge) as the bad commit. > > It seems this issue is too intermittent for bisection to be

[PATCH v4 1/8] QE: Add IC, SI and SIRAM document to device tree bindings.

Add IC, SI and SIRAM document of QE to Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe.txt Signed-off-by: Zhao Qiang Acked-by: Rob Herring --- changes for v2 - Add interrupt-controller in Required properties - delete address-cells and

[PATCH v4 4/8] bindings: move cpm_qe binding from powerpc/fsl to soc/fsl

cpm_qe is supported on both powerpc and arm. and the QE code has been moved from arch/powerpc into drivers/soc/fsl, so move cpm_qe binding from powerpc/fsl to soc/fsl Signed-off-by: Zhao Qiang Acked-by: Rob Herring --- Changes for v3 - NA Changes for

RE: [PATCH v3 3/7] QE: Add uqe_serial document to bindings

On Tue, Mar 05, 2016 at 12:26PM, Rob Herring wrote: > -Original Message- > From: Rob Herring [mailto:r...@kernel.org] > Sent: Saturday, March 05, 2016 12:26 PM > To: Qiang Zhao > Cc: o...@buserror.net; Yang-Leo Li ; Xiaobo Xie >

[PATCH v4 2/8] QE: Add ucc hdlc document to bindings

Add ucc hdlc document to Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/network.txt Signed-off-by: Zhao Qiang Acked-by: Rob Herring --- Changes for v2 - use ucc-hdlc instead of ucc_hdlc - add more information to properties. Changes for

[PATCH v4 6/8] T104xRDB: Add qe node to t104xrdb

add qe node to t104xrdb.dtsi Signed-off-by: Zhao Qiang --- Changes for v2 - rebase Changes for v3 - rebase Changes for v4 - rebase arch/powerpc/boot/dts/fsl/t104xrdb.dtsi | 38 + 1 file changed, 38 insertions(+) diff

[PATCH v4 5/8] T104xD4RDB: Add qe node to t104xd4rdb

add qe node to t104xd4rdb.dtsi and t1040si-post.dtsi. Signed-off-by: Zhao Qiang --- Changes for v2 - rebase Changes for v3 - rebase Changes for v4 - rebase arch/powerpc/boot/dts/fsl/t1040si-post.dtsi | 45 +

[PATCH kernel 0/9] KVM, PPC, VFIO: Enable in-kernel acceleration

This enables in-kernel acceleration of H_PUT_TCE/etc hypercalls for pseries guests using VFIO. As pseries is a para-virtualized environment, the guest can see and control IOMMUs via special hypercalls which let the guest to add and remove mappings in real hardware IOMMU. This was posted last time

[PATCH kernel 1/9] KVM: PPC: Reserve KVM_CAP_SPAPR_TCE_VFIO capability number

This adds a capability number for in-kernel support for VFIO on SPAPR platform. The capability will tell the user space whether in-kernel handlers of H_PUT_TCE can handle VFIO-targeted requests or not. If not, the user space must not attempt allocating a TCE table in the host kernel via the

[PATCH kernel 2/9] powerpc/mmu: Add real mode support for IOMMU preregistered memory

This makes mm_iommu_lookup() able to work in realmode by replacing list_for_each_entry_rcu() (which can do debug stuff which can fail in real mode) with list_for_each_entry_lockless(). This adds realmode version of mm_iommu_ua_to_hpa() which adds explicit vmalloc'd-to-linear address conversion.

Re: [PATCH v6 20/20] cxl: Remove cxl_get_phys_dev() kernel API

Acked-by: Ian Munsie ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev

Re: [PATCH][v4] livepatch/ppc: Enable livepatching on powerpc

On Fri, 2016-03-04 at 10:31 +0100, Miroslav Benes wrote: > On Fri, 4 Mar 2016, Michael Ellerman wrote: > > On Thu, 2016-03-03 at 17:52 +0100, Petr Mladek wrote: > > > > > 3. Added an error message when including > > >powerpc/include/asm/livepatch.h without HAVE_LIVEPATCH > > > > I

[PATCH kernel 7/9] KVM: PPC: Create a virtual-mode only TCE table handlers

In-kernel VFIO acceleration needs different handling in real and virtual modes which makes it hard to support both modes in the same handler. This creates a copy of kvmppc_rm_h_stuff_tce and kvmppc_rm_h_put_tce in addition to the existing kvmppc_rm_h_put_tce_indirect. Signed-off-by: Alexey

[PATCH kernel 6/9] KVM: PPC: Associate IOMMU group with guest view of TCE table

The existing in-kernel TCE table for emulated devices contains guest physical addresses which are accesses by emulated devices. Since we need to keep this information for VFIO devices too in order to implement H_GET_TCE, we are reusing it. This adds IOMMU group list to kvmppc_spapr_tce_table.

[PATCH kernel 9/9] KVM: PPC: VFIO device: support SPAPR TCE

sPAPR TCE IOMMU is para-virtualized and the guest does map/unmap via hypercalls which take a logical bus id (LIOBN) as a target IOMMU identifier. LIOBNs are made up, advertised to guest systems and linked to IOMMU groups by the user space. In order to enable acceleration for IOMMU operations in

[PATCH kernel 5/9] KVM: PPC: Enable IOMMU_API for KVM_BOOK3S_64 permanently

It does not make much sense to have KVM in book3s-64 and not to have IOMMU bits for PCI pass through support as it costs little and allows VFIO to function on book3s KVM. Having IOMMU_API always enabled makes it unnecessary to have a lot of "#ifdef IOMMU_API" in arch/powerpc/kvm/book3s_64_vio*.

Re: [PATCH] powerpc/process: fix altivec SPR not being saved

On Mon, 2016-03-07 at 09:33 +1100, Oliver O'Halloran wrote: > In save_sprs() in process.c contains the following test: > > if (cpu_has_feature(cpu_has_feature(CPU_FTR_ALTIVEC))) > t->vrsave = mfspr(SPRN_VRSAVE); > > CPU feature with the mask 0x1 is CPU_FTR_COHERENT_ICACHE so

Re: [PATCH] powerpc/process: fix altivec SPR not being saved

Hi Oliver, > In save_sprs() in process.c contains the following test: > > if (cpu_has_feature(cpu_has_feature(CPU_FTR_ALTIVEC))) > t->vrsave = mfspr(SPRN_VRSAVE); > > CPU feature with the mask 0x1 is CPU_FTR_COHERENT_ICACHE so the test > is equivilent to: > > if

Re: [PATCH v6 00/20] cxl: Add support for powerVM guest

Thanks guys - I'm pretty happy with this series now and am happy for this to be merged, unless @mpe has any comments. Cheers, -Ian ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev

Re: [PATCH v6 14/20] cxl: Support to flash a new image on the adapter from a guest

> +struct cxl_adapter_image { > +__u64 flags; > +__u64 data; > +__u64 len_data; > +__u64 len_image; > +__u64 reserved1; > +__u64 reserved2; > +__u64 reserved3; > +__u64 reserved4; > +}; Thanks, that looks better now :) Acked-by: Ian Munsie

[PATCH kernel 4/9] powerpc/powernv/iommu: Add real mode version of xchg()

In real mode, TCE tables are invalidated using different cache-inhibited store instructions which is different from the virtual mode. This defines and implements exchange_rm() callback. This does not define set_rm/clear_rm/flush_rm callbacks as there is no user for those - exchange/exchange_rm

[PATCH kernel 3/9] KVM: PPC: Use preregistered memory API to access TCE list

VFIO on sPAPR already implements guest memory pre-registration when the entire guest RAM gets pinned. This can be used to translate the physical address of a guest page containing the TCE list from H_PUT_TCE_INDIRECT. This makes use of the pre-registrered memory API to access TCE list pages in

[PATCH kernel 8/9] KVM: PPC: Add in-kernel handling for VFIO

This allows the host kernel to handle H_PUT_TCE, H_PUT_TCE_INDIRECT and H_STUFF_TCE requests targeted an IOMMU TCE table used for VFIO without passing them to user space which saves time on switching to user space and back. Both real and virtual modes are supported. The kernel tries to handle a

Re: [PATCH v6 13/20] cxl: sysfs support for guests

Acked-by: Ian Munsie ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev

Re: [PATCH kernel 1/9] KVM: PPC: Reserve KVM_CAP_SPAPR_TCE_VFIO capability number

On Mon, Mar 07, 2016 at 02:41:09PM +1100, Alexey Kardashevskiy wrote: > This adds a capability number for in-kernel support for VFIO on > SPAPR platform. > > The capability will tell the user space whether in-kernel handlers of > H_PUT_TCE can handle VFIO-targeted requests or not. If not, the

Re: [PATCH kernel 2/9] powerpc/mmu: Add real mode support for IOMMU preregistered memory

On Mon, Mar 07, 2016 at 02:41:10PM +1100, Alexey Kardashevskiy wrote: > This makes mm_iommu_lookup() able to work in realmode by replacing > list_for_each_entry_rcu() (which can do debug stuff which can fail in > real mode) with list_for_each_entry_lockless(). > > This adds realmode version of

Re: [PATCH kernel 3/9] KVM: PPC: Use preregistered memory API to access TCE list

On Mon, Mar 07, 2016 at 02:41:11PM +1100, Alexey Kardashevskiy wrote: > VFIO on sPAPR already implements guest memory pre-registration > when the entire guest RAM gets pinned. This can be used to translate > the physical address of a guest page containing the TCE list > from H_PUT_TCE_INDIRECT. >

Re: [PATCH kernel 4/9] powerpc/powernv/iommu: Add real mode version of xchg()

On Mon, Mar 07, 2016 at 02:41:12PM +1100, Alexey Kardashevskiy wrote: > In real mode, TCE tables are invalidated using different > cache-inhibited store instructions which is different from > the virtual mode. > > This defines and implements exchange_rm() callback. This does not > define

Re: [PATCH kernel 4/9] powerpc/powernv/iommu: Add real mode version of xchg()

On 03/07/2016 05:05 PM, David Gibson wrote: On Mon, Mar 07, 2016 at 02:41:12PM +1100, Alexey Kardashevskiy wrote: In real mode, TCE tables are invalidated using different cache-inhibited store instructions which is different from the virtual mode. This defines and implements exchange_rm()

[RFC PATCH v4 1/7] PCI: Add a new option for resource_alignment to reassign alignment

When using resource_alignment kernel parameter, the current implement reassigns the alignment by changing resources' size which can potentially break some drivers. So this patch adds a new option "noresize" for the parameter to solve this problem. Signed-off-by: Yongji Xie

[RFC PATCH v4 4/7] PCI: Modify resource_alignment to support multiple devices

When vfio passthrough a PCI device of which MMIO BARs are smaller than PAGE_SIZE, guest will not handle the mmio accesses to the BARs which leads to mmio emulations in host. This is because vfio will not allow to passthrough one BAR's mmio page which may be shared with other BARs. To solve this

[RFC PATCH v4 7/7] powerpc/powernv/pci-ioda: Add IOMMU_CAP_INTR_REMAP for IODA host bridge

This patch adds IOMMU_CAP_INTR_REMAP for IODA host bridge so that we can mmap MSI-X table in vfio driver. Signed-off-by: Yongji Xie --- arch/powerpc/platforms/powernv/pci-ioda.c | 17 + 1 file changed, 17 insertions(+) diff --git

Re: [PATCH kernel 6/9] KVM: PPC: Associate IOMMU group with guest view of TCE table

On Mon, Mar 07, 2016 at 02:41:14PM +1100, Alexey Kardashevskiy wrote: > The existing in-kernel TCE table for emulated devices contains > guest physical addresses which are accesses by emulated devices. > Since we need to keep this information for VFIO devices too > in order to implement H_GET_TCE,

[RFC PATCH v4 0/7] vfio-pci: Allow to mmap sub-page MMIO BARs and MSI-X table

Current vfio-pci implementation disallows to mmap sub-page(size < PAGE_SIZE) MMIO BARs and MSI-X table. This is because sub-page BARs' mmio page may be shared with other BARs and MSI-X table should not be accessed directly from the guest for security reasons. But these will easily cause some

[RFC PATCH v4 2/7] PCI: Use IORESOURCE_WINDOW to identify bridge resources

Now we use the IORESOURCE_STARTALIGN to identify bridge resources in __assign_resources_sorted(). But there would be some problems because some PCI devices' resources may also use IORESOURCE_STARTALIGN, e.g. using "noresize" option of resource_alignment kernel parameter. So this patch replaces

[RFC PATCH v4 5/7] vfio-pci: Allow to mmap sub-page MMIO BARs if the mmio page is exclusive

Current vfio-pci implementation disallows to mmap sub-page(size < PAGE_SIZE) MMIO BARs because these BARs' mmio page may be shared with other BARs. But we should allow to mmap these sub-page MMIO BARs if PCI resource allocator can make sure these BARs' mmio page will not be shared with other

[RFC PATCH v4 6/7] vfio-pci: Allow to mmap MSI-X table if IOMMU_CAP_INTR_REMAP was set

Current vfio-pci implementation disallows to mmap MSI-X table in case that user get to touch this directly. But we should allow to mmap these MSI-X tables if IOMMU supports interrupt remapping which can ensure that a given pci device can only shoot the MSIs assigned for it. Signed-off-by: Yongji

[RFC PATCH v4 3/7] PCI: Ignore resource_alignment if PCI_PROBE_ONLY was set

The resource_alignment will releases memory resources allocated by firmware so that kernel can reassign new resources later on. But this will cause the problem that no resources can be allocated by kernel if PCI_PROBE_ONLY was set, e.g. on pSeries platform because PCI_PROBE_ONLY force kernel to