[powerpc:next 90/96] warning: (PPC_C2K && ..) selects NOT_COHERENT_CACHE which has unmet direct dependencies (4xx || ..)

tree: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next head: df4c7983189491302a6000b2dcb14d8093f8fddf commit: 968159c0031ac1e07ab4426397e786c9c483f068 [90/96] powerpc/8xx: Getting rid of remaining use of CONFIG_8xx config: powerpc-c2k_defconfig (attached as .config)

Re: [bug report] powerpc/mm/radix: Avoid flushing the PWC on every flush_tlb_range

On Fri, Aug 11, 2017 at 03:16:08PM -0700, Tyrel Datwyler wrote: > On 08/11/2017 01:15 PM, Dan Carpenter wrote: > > Hello Benjamin Herrenschmidt, > > > > This is a semi-automatic email about new static checker warnings. > > > > The patch 424de9c6e3f8: "powerpc/mm/radix: Avoid flushing the PWC on

Re: [PATCH 3/6] powerpc/mm: Ensure cpumask update is ordered

On Fri, 2017-08-11 at 21:06 +1000, Nicholas Piggin wrote: > Other than that your series seems good to me if you repost it you > can add > > Reviewed-by: Nicholas Piggin > > This one out of the series is the bugfix so it should go to stable > as well, right? Yup. Ben.

Re: [bug report] powerpc/mm/radix: Avoid flushing the PWC on every flush_tlb_range

On 08/11/2017 01:15 PM, Dan Carpenter wrote: > Hello Benjamin Herrenschmidt, > > This is a semi-automatic email about new static checker warnings. > > The patch 424de9c6e3f8: "powerpc/mm/radix: Avoid flushing the PWC on > every flush_tlb_range" from Jul 19, 2017, leads to the following >

Re: [PATCH 0/4] Allow non-legacy cards to be vgaarb default

On Tue, Jul 25, 2017 at 03:56:20PM +, Gabriele Paoloni wrote: > > Having practically zero background in gfx development (either kernel or > > Xorg), I think the problem is that vga_default_device() / > > vga_set_default_device(), which -- apparently -- "boot_vga" is based > > upon, come from

Re: [PATCH 1/3] powerpc: simplify and fix VGA default device behaviour

On Fri, Aug 04, 2017 at 08:20:31PM +1000, Daniel Axtens wrote: > Some powerpc devices provide a PCI display that isn't picked up by > the VGA arbiter, presumably because it doesn't support the PCI > legacy VGA ranges. > > Commit c2e1d84523ad ("powerpc: Set default VGA device") introduced > an

Re: [PATCH net-next] fsl/fman: implement several errata workarounds

From: Florinel Iordache Date: Thu, 10 Aug 2017 16:47:04 +0300 > Implemented workarounds for the following dTSEC Erratum: > A002, A004, A0012, A0014, A004839 on several operations > that involve MAC CFG register changes: adjust link, > rx pause frames, modify MAC

Re: [PATCH v2 2/3] livepatch: send a fake signal to all blocking tasks

On Thu, Aug 10, 2017 at 12:48:14PM +0200, Miroslav Benes wrote: > Last, sending the fake signal is not automatic. It is done only when > admin requests it by writing 1 to force sysfs attribute in livepatch > sysfs directory. 'writing 1' -> 'writing "signal"' (unless you take my suggestion to

[bug report] powerpc/mm/radix: Avoid flushing the PWC on every flush_tlb_range

Hello Benjamin Herrenschmidt, This is a semi-automatic email about new static checker warnings. The patch 424de9c6e3f8: "powerpc/mm/radix: Avoid flushing the PWC on every flush_tlb_range" from Jul 19, 2017, leads to the following Smatch complaint: arch/powerpc/mm/tlb-radix.c:368

[PATCH] powerpc/perf: double unlock bug in imc_common_cpuhp_mem_free()

There is a typo so we call unlock instead of lock. Fixes: 885dcd709ba9 ("powerpc/perf: Add nest IMC PMU support") Signed-off-by: Dan Carpenter --- I also don't understand how the _imc_refc[node_id].lock works. Why can't we use ref->lock everywhere? They seem

Re: [v6 04/15] mm: discard memblock data later

Hi Michal, This suggestion won't work, because there are arches without memblock support: tile, sh... So, I would still need to have: #ifdef CONFIG_MEMBLOCK in page_alloc, or define memblock_discard() stubs in nobootmem headfile. In either case it would become messier than what it is right

[PATCH] drivers/macintosh: make wf_control_ops and wf_pid_param const

Make wf_control_ops const as they are only stored in the ops field of a wf_control structure, which is const. Make wf_pid_param const as they are only used during a copy operation. Done using Coccinelle. Signed-off-by: Bhumika Goyal --- Cross compiled windfarm_smu_controls.o

[RFC v7 26/25] mm/mprotect, powerpc/mm/pkeys, x86/mm/pkeys: Add sysfs interface

Expose useful information for programs using memory protection keys. Provide implementation for powerpc and x86. On a powerpc system with pkeys support, here is what is shown: $ head /sys/kernel/mm/protection_keys/* ==> /sys/kernel/mm/protection_keys/disable_execute_supported <== true ==>

[PATCH v2 14/14] powerpc/64s: idle ESL=0 stop can avoid MSR and save/restore overhead

When stop is executed with EC=ESL=0, it appears to execute like a normal instruction (resuming from NIP when woken by interrupt). So all the save/restore handling can be avoided completely. In particular NV GPRs do not have to be saved, and MSR does not have to be switched back to kernel MSR. So

[PATCH v2 13/14] powerpc/64s: idle POWER9 can execute stop in virtual mode

The hardware can execute stop in any context, and KVM does not require real mode because siblings do not share MMU state. This saves a switch to real-mode when going idle. Acked-by: Gautham R. Shenoy Signed-off-by: Nicholas Piggin ---

[PATCH v2 12/14] KVM: PPC: Book3S HV: POWER9 can execute stop without a sync sequence

Reviewed-by: Gautham R. Shenoy Signed-off-by: Nicholas Piggin --- arch/powerpc/kvm/book3s_hv_rmhandlers.S | 24 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S

[PATCH v2 11/14] powerpc/64s: idle POWER9 can execute stop without a sync sequence

Reviewed-by: Gautham R. Shenoy Signed-off-by: Nicholas Piggin --- arch/powerpc/include/asm/cpuidle.h | 16 arch/powerpc/kernel/idle_book3s.S | 26 -- 2 files changed, 20 insertions(+), 22 deletions(-) diff

[PATCH v2 10/14] KVM: PPC: Book3S HV: POWER9 does not require secondary thread management

POWER9 CPUs have independent MMU contexts per thread, so KVM does not need to quiesce secondary threads, so the hwthread_req/hwthread_state protocol does not have to be used. So patch it away on POWER9, and patch away the branch from the Linux idle wakeup to kvm_start_guest that is never used.

[PATCH v2 09/14] powerpc/64: runlatch CTRL[RUN] set optimisation

The CTRL register is read-only except bit 63 which is the run latch control. This means it can be updated with a mtspr rather than mfspr/mtspr. Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/process.c | 35 +++ 1 file changed, 27

[PATCH v2 08/14] powerpc/64s: irq replay remove spurious irq reason

HVI interrupts have always used 0x500, so remove the dead branch. Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/exceptions-64s.S | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S index

[PATCH v2 07/14] powerpc/64: remove redundant instruction in interrupt replay

Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/entry_64.S | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S index ec67f67dafab..3f2666d24a7e 100644 --- a/arch/powerpc/kernel/entry_64.S +++

[PATCH v2 06/14] powerpc/64s: irq replay external use the HV handler in HV mode on POWER9

POWER9 host external interrupts use the h_virt_irq_common handler, so use that to replay them rather than using the hardware_interrupt_common handler. Both call do_IRQ, but using the correct handler reduces i-cache footprint. Signed-off-by: Nicholas Piggin ---

[PATCH v2 05/14] powerpc/64s: irq replay merge HV and non-HV paths for doorbell replay

This results in smaller code, and fewer branches. Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/entry_64.S | 6 +- arch/powerpc/kernel/exceptions-64s.S | 2 +- arch/powerpc/kernel/irq.c| 2 -- 3 files changed, 2 insertions(+), 8 deletions(-)

[PATCH v2 04/14] powerpc/64: cleanup __check_irq_replay

Move the clearing of irq_happened bits into the condition where they were found to be set. This reduces instruction count slightly, and reduces stores into irq_happened. Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/irq.c | 45

[PATCH v2 03/14] powerpc/64s: masked interrupt returns to kernel so avoid r13 restore

Places in the kernel where r13 is not the PACA pointer must have maskable interrupts disabled, so r13 does not have to be restored when returning from a soft-masked interrupt. Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/exceptions-64s.S | 2 +- 1 file changed, 1

[PATCH v2 02/14] powerpc/64s: masked interrupt avoid instruction

EE is always enabled in SRR1 for masked interrupts, so clearing it can use xor. Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/exceptions-64s.S | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/arch/powerpc/kernel/exceptions-64s.S

[PATCH v2 01/14] powerpc/64s: masked interrupt avoid branch

Interrupts which do not require EE to be cleared can all be tested with a single bitwise test. Signed-off-by: Nicholas Piggin --- arch/powerpc/kernel/exceptions-64s.S | 6 ++ 1 file changed, 2 insertions(+), 4 deletions(-) diff --git

[PATCH v2 00/14] idle and soft-irq improvements and POWER9 idle optimisation

Since last time: - Split out KVM parts. Technically they don't actually have dependencies with the Linux patches I suppose, so they could be merged via different trees. Logically I think they are better to stay together. - Fix and simplify the KVM secondary thread management patch, thanks

Re: [FIX PATCH v0] powerpc: Fix memory unplug failure on radix guest

On Fri, Aug 11, 2017 at 02:07:51PM +0530, Aneesh Kumar K.V wrote: Reza Arbab writes: On Thu, Aug 10, 2017 at 02:53:48PM +0530, Bharata B Rao wrote: diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c index f830562..24ecf53 100644 ---

Re: [v6 07/15] mm: defining memblock_virt_alloc_try_nid_raw

Sure, I could do this, but as I understood from earlier Dave Miller's comments, we should do one logical change at a time. Hence, introduce API in one patch use it in another. So, this is how I tried to organize this patch set. Is this assumption incorrect? Well, it really depends. If the patch

Re: [v6 04/15] mm: discard memblock data later

I will address your comment, and send out a new patch. Should I send it out separately from the series or should I keep it inside? I would post it separatelly. It doesn't depend on the rest. OK, I will post it separately. No it does not depend on the rest, but the reset depends on this. So,

Re: [v6 15/15] mm: debug for raw alloctor

When CONFIG_DEBUG_VM is enabled, this patch sets all the memory that is returned by memblock_virt_alloc_try_nid_raw() to ones to ensure that no places excpect zeroed memory. Please fold this into the patch which introduces memblock_virt_alloc_try_nid_raw. OK I am not sure CONFIG_DEBUG_VM is

Re: [v6 14/15] mm: optimize early system hash allocations

Clients can call alloc_large_system_hash() with flag: HASH_ZERO to specify that memory that was allocated for system hash needs to be zeroed, otherwise the memory does not need to be zeroed, and client will initialize it. If memory does not need to be zero'd, call the new

Re: [v6 13/15] mm: stop zeroing memory during allocation in vmemmap

On 08/11/2017 09:04 AM, Michal Hocko wrote: On Mon 07-08-17 16:38:47, Pavel Tatashin wrote: Replace allocators in sprase-vmemmap to use the non-zeroing version. So, we will get the performance improvement by zeroing the memory in parallel when struct pages are zeroed. First of all this should

Re: [v6 07/15] mm: defining memblock_virt_alloc_try_nid_raw

On Fri 11-08-17 11:58:46, Pasha Tatashin wrote: > On 08/11/2017 08:39 AM, Michal Hocko wrote: > >On Mon 07-08-17 16:38:41, Pavel Tatashin wrote: > >>A new variant of memblock_virt_alloc_* allocations: > >>memblock_virt_alloc_try_nid_raw() > >> - Does not zero the allocated memory > >> -

Re: [v6 09/15] sparc64: optimized struct page zeroing

Add an optimized mm_zero_struct_page(), so struct page's are zeroed without calling memset(). We do eight to tent regular stores based on the size of struct page. Compiler optimizes out the conditions of switch() statement. Again, this doesn't explain why we need this. You have mentioned those

Re: [v6 08/15] mm: zero struct pages during initialization

I believe this deserves much more detailed explanation why this is safe. What actually prevents any pfn walker from seeing an uninitialized struct page? Please make your assumptions explicit in the commit log so that we can check them independently. There is nothing prevents pfn walkers from

Re: [v6 04/15] mm: discard memblock data later

On Fri 11-08-17 11:49:15, Pasha Tatashin wrote: > >I guess this goes all the way down to > >Fixes: 7e18adb4f80b ("mm: meminit: initialise remaining struct pages in > >parallel with kswapd") > > I will add this to the patch. > > >>Signed-off-by: Pavel Tatashin >

Re: [v6 07/15] mm: defining memblock_virt_alloc_try_nid_raw

On 08/11/2017 08:39 AM, Michal Hocko wrote: On Mon 07-08-17 16:38:41, Pavel Tatashin wrote: A new variant of memblock_virt_alloc_* allocations: memblock_virt_alloc_try_nid_raw() - Does not zero the allocated memory - Does not panic if request cannot be satisfied OK, this looks good

Re: [PATCH] PCI: Convert to using %pOF instead of full_name

t;b...@kernel.crashing.org> > >> Cc: Paul Mackerras <pau...@samba.org> > >> Cc: Michael Ellerman <m...@ellerman.id.au> > >> Cc: linux-...@vger.kernel.org > >> Cc: linux-arm-ker...@lists.infradead.org > >> Cc: linux-te...@vger.kernel.org &

Re: [v6 05/15] mm: don't accessed uninitialized struct pages

On 08/11/2017 05:37 AM, Michal Hocko wrote: On Mon 07-08-17 16:38:39, Pavel Tatashin wrote: In deferred_init_memmap() where all deferred struct pages are initialized we have a check like this: if (page->flags) { VM_BUG_ON(page_zone(page) != zone); goto

Re: [v6 04/15] mm: discard memblock data later

I guess this goes all the way down to Fixes: 7e18adb4f80b ("mm: meminit: initialise remaining struct pages in parallel with kswapd") I will add this to the patch. Signed-off-by: Pavel Tatashin Reviewed-by: Steven Sistare Reviewed-by:

Re: [v6 02/15] x86/mm: setting fields in deferred pages

AFAIU register_page_bootmem_info_node is only about struct pages backing pgdat, usemap and memmap. Those should be in reserved memblocks and we do not initialize those at later times, they are not relevant to the deferred initialization as your changelog suggests so the ordering with

Re: [v6 01/15] x86/mm: reserve only exiting low pages

Struct pages are initialized by going through __init_single_page(). Since the existing physical memory in memblock is represented in memblock.memory list, struct page for every page from this list goes through __init_single_page(). By a page _from_ this list you mean struct pages backing the

Re: [v6 00/15] complete deferred page initialization

On Fri 11-08-17 11:13:07, Pasha Tatashin wrote: > On 08/11/2017 03:58 AM, Michal Hocko wrote: > >[I am sorry I didn't get to your previous versions] > > Thank you for reviewing this work. I will address your comments, and > send-out a new patches. > > >> > >>In this work we do the following: >

Re: [v6 00/15] complete deferred page initialization

On 08/11/2017 03:58 AM, Michal Hocko wrote: [I am sorry I didn't get to your previous versions] Thank you for reviewing this work. I will address your comments, and send-out a new patches. In this work we do the following: - Never read access struct page until it was initialized How is

[PATCH v2 4/8] powerpc/xive: introduce xive_esb_write()

Signed-off-by: Cédric Le Goater --- arch/powerpc/sysdev/xive/common.c | 11 ++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/arch/powerpc/sysdev/xive/common.c b/arch/powerpc/sysdev/xive/common.c index 8a58662ed793..ac5f18a66742 100644 ---

Re: [PATCH] ASoC: Freescale: Delete an error message for a failed memory allocation in three functions

On Fri, 2017-08-11 at 15:32 +0200, SF Markus Elfring wrote: > From 885ccd6c63291dcd4854a0cbaab5188cdc3db805 Mon Sep 17 00:00:00 2001 > From: Markus Elfring > Date: Fri, 11 Aug 2017 15:10:43 +0200 > Subject: [PATCH] ASoC: Freescale: Delete an error message for a

[PATCH v2 8/8] powerpc/xive: improve debugging macros

Having the CPU identifier in the debug logs is helpful when tracking issues. Also add some more logging and fix a compile issue in xive_do_source_eoi(). Signed-off-by: Cédric Le Goater --- arch/powerpc/sysdev/xive/common.c | 8 ++-- 1 file changed, 6 insertions(+), 2

[PATCH v2 7/8] powerpc/xive: add XIVE Exploitation Mode to CAS

On POWER9, the Client Architecture Support (CAS) negotiation process determines whether the guest operates in XIVE Legacy compatibility or in XIVE exploitation mode. Now that we have initial guest support for the XIVE interrupt controller, let's inform the hypervisor what we can do. The platform

[PATCH v2 0/8] guest exploitation of the XIVE interrupt controller

Hello, On a POWER9 sPAPR machine, the Client Architecture Support (CAS) negotiation process determines whether the guest operates with an interrupt controller using the legacy model, as found on POWER8, or in XIVE exploitation mode, the newer POWER9 interrupt model. This patchset is a first

[PATCH v2 6/8] powerpc/xive: introduce H_INT_ESB hcall

The H_INT_ESB hcall() is used to issue a load or store to the ESB page instead of using the MMIO pages. This can be used as a workaround on some HW issues. The OS knows that this hcall should be used on an interrupt source when the ESB hcall flag is set to 1 in the hcall H_INT_GET_SOURCE_INFO. To

[PATCH v2 1/8] powerpc/xive: introduce a common routine xive_queue_page_alloc()

This routine will be used in the spapr backend. Also introduce a short xive_alloc_order() helper. Signed-off-by: Cédric Le Goater --- arch/powerpc/sysdev/xive/common.c| 16 arch/powerpc/sysdev/xive/native.c| 16 +---

[PATCH v2 5/8] powerpc/xive: add the HW IRQ number under xive_irq_data

It will be required later by the H_INT_ESB hcall. Signed-off-by: Cédric Le Goater --- arch/powerpc/include/asm/xive.h | 1 + arch/powerpc/sysdev/xive/native.c | 2 ++ arch/powerpc/sysdev/xive/spapr.c | 2 ++ 3 files changed, 5 insertions(+) diff --git

[PATCH v2 3/8] powerpc/xive: rename xive_poke_esb() in xive_esb_read()

xive_poke_esb() is performing a load/read so it is better named as xive_esb_read() as we will need to introduce a xive_esb_write() routine. Also use the XIVE_ESB_LOAD_EOI offset when EOI'ing LSI interrupts. Signed-off-by: Cédric Le Goater --- Changes since v1: - fixed naming.

[PATCH v2 2/8] powerpc/xive: guest exploitation of the XIVE interrupt controller

This is the framework for using XIVE in a PowerVM guest. The support is very similar to the native one in a much simpler form. Instead of OPAL calls, a set of Hypervisors call are used to configure the interrupt sources and the event/notification queues of the guest: - H_INT_GET_SOURCE_INFO

[PATCH] ASoC: Freescale: Delete an error message for a failed memory allocation in three functions

>From 885ccd6c63291dcd4854a0cbaab5188cdc3db805 Mon Sep 17 00:00:00 2001 From: Markus Elfring Date: Fri, 11 Aug 2017 15:10:43 +0200 Subject: [PATCH] ASoC: Freescale: Delete an error message for a failed memory allocation in three functions Omit an extra message for

Re: [v6 15/15] mm: debug for raw alloctor

On Mon 07-08-17 16:38:49, Pavel Tatashin wrote: > When CONFIG_DEBUG_VM is enabled, this patch sets all the memory that is > returned by memblock_virt_alloc_try_nid_raw() to ones to ensure that no > places excpect zeroed memory. Please fold this into the patch which introduces

Re: [v6 14/15] mm: optimize early system hash allocations

On Mon 07-08-17 16:38:48, Pavel Tatashin wrote: > Clients can call alloc_large_system_hash() with flag: HASH_ZERO to specify > that memory that was allocated for system hash needs to be zeroed, > otherwise the memory does not need to be zeroed, and client will initialize > it. > > If memory does

Re: [v6 13/15] mm: stop zeroing memory during allocation in vmemmap

On Mon 07-08-17 16:38:47, Pavel Tatashin wrote: > Replace allocators in sprase-vmemmap to use the non-zeroing version. So, > we will get the performance improvement by zeroing the memory in parallel > when struct pages are zeroed. First of all this should be probably merged with the previous

Re: [v6 09/15] sparc64: optimized struct page zeroing

On Mon 07-08-17 16:38:43, Pavel Tatashin wrote: > Add an optimized mm_zero_struct_page(), so struct page's are zeroed without > calling memset(). We do eight to tent regular stores based on the size of > struct page. Compiler optimizes out the conditions of switch() statement. Again, this doesn't

Re: [v6 08/15] mm: zero struct pages during initialization

On Mon 07-08-17 16:38:42, Pavel Tatashin wrote: > Add struct page zeroing as a part of initialization of other fields in > __init_single_page(). I believe this deserves much more detailed explanation why this is safe. What actually prevents any pfn walker from seeing an uninitialized struct page?

Re: [v6 07/15] mm: defining memblock_virt_alloc_try_nid_raw

On Mon 07-08-17 16:38:41, Pavel Tatashin wrote: > A new variant of memblock_virt_alloc_* allocations: > memblock_virt_alloc_try_nid_raw() > - Does not zero the allocated memory > - Does not panic if request cannot be satisfied OK, this looks good but I would not introduce

[GIT PULL] Please pull powerpc/linux.git powerpc-4.13-6 tag

Hi Linus, Please pull some more powerpc fixes for 4.13: The following changes since commit 3db40c312c2c1eb2187c5731102fa8ff380e6e40: powerpc/64: Fix __check_irq_replay missing decrementer interrupt (2017-08-04 12:55:49 +1000) are available in the git repository at:

Re: [V11,1/3] powernv: powercap: Add support for powercap framework

On Thu, 2017-08-10 at 03:31:18 UTC, Shilpasri G Bhat wrote: > Adds a generic powercap framework to change the system powercap > inband through OPAL-OCC command/response interface. > > Signed-off-by: Shilpasri G Bhat Series applied to powerpc next, thanks.

Re: [01/12] powerpc/8xx: Simplify CONFIG_8xx checks in Makefile

On Tue, 2017-08-08 at 11:58:40 UTC, Christophe Leroy wrote: > The entire 8xx directory is omitted if CONFIG_8xx is not enabled, so > within the 8xx/Makefile CONFIG_8xx is always y. So convert > obj-$(CONFIG_8xx) to the more obvious obj-y. > > Signed-off-by: Christophe Leroy

Re: powerpc/xive: Fix section mismatch warnings

On Tue, 2017-08-08 at 11:44:14 UTC, Michael Ellerman wrote: > Both xive_core_init() and xive_native_init() are called from and call > __init routines, so they should also be __init. > > Signed-off-by: Michael Ellerman Applied to powerpc next.

Re: powerpc/mm: Fix section mismatch warning in early_check_vec5()

On Tue, 2017-08-08 at 11:44:08 UTC, Michael Ellerman wrote: > early_check_vec5() is called from and calls __init routines, so should > also be __init. > > Signed-off-by: Michael Ellerman Applied to powerpc next.

Re: [1/9] powerpc/47x: Guard 47x cputable entries with CONFIG_PPC_47x

On Tue, 2017-08-08 at 06:39:17 UTC, Michael Ellerman wrote: > Currently we build the 47x cputable entries even when CONFIG_PPC_47x is > disabled. That means a kernel built without CONFIG_PPC_47x will claim to > support a 47x CPU and start booting, only to break somewhere later > because it doesn't

Re: powerpc: fix invalid use of register expressions

On Sat, 2017-08-05 at 17:55:11 UTC, Andreas Schwab wrote: > binutils >= 2.26 now warns about misuse of register expressions in > assembler operands that are actually literals, for example: > > arch/powerpc/kernel/entry_64.S:535: Warning: invalid register expression > > Signed-off-by: Andreas

Re: powerpc/mm: Invalidate partition table cache on host proc tbl base update

On Thu, 2017-08-03 at 04:15:51 UTC, Suraj Jitindar Singh wrote: > The host process table base is stored in the partition table by calling > the function native_register_process_table(). Currently this just sets > the entry in memory and is missing a proceeding cache invalidation > instruction. Any

Re: powerpc: xive: ensure active irqd when setting affinity

On Thu, 2017-08-03 at 01:38:22 UTC, Sukadev Bhattiprolu wrote: > >From fd0abf5c61b6041fdb75296e8580b86dc91d08d6 Mon Sep 17 00:00:00 2001 > From: Benjamin Herrenschmidt > Date: Tue, 1 Aug 2017 20:54:41 -0500 > Subject: [PATCH] powerpc: xive: ensure active irqd when

Re: powerpc/pseries: Check memory device state before onlining/offlining

On Wed, 2017-08-02 at 18:03:22 UTC, Nathan Fontenot wrote: > When DLPAR adding or removing memory we need to check the device > offline status before trying to online/offline the memory. This is > needed because calls device_online() and device_offline() will return > non-zero for memory that is

Re: [v2,1/4] powerpc/64s: fix mce accounting for powernv

On Tue, 2017-08-01 at 12:00:51 UTC, Nicholas Piggin wrote: > --- > arch/powerpc/kernel/traps.c | 7 +++ > 1 file changed, 7 insertions(+) > > diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c > index bfcfd9ef09f2..5adfea2dc822 100644 > --- a/arch/powerpc/kernel/traps.c >

Re: powerpc/perf: Add PM_LD_MISS_L1 and PM_BR_2PATH to power9 event list

On Mon, 2017-07-31 at 09:33:21 UTC, Madhavan Srinivasan wrote: > Add couple of more events (PM_LD_MISS_L1 and PM_BR_2PATH) to > power9 event list and power9_event_alternatives array (these > events can be counted in more than one PMC). > > Signed-off-by: Madhavan Srinivasan

Re: powerpc/perf: Factor out PPMU_ONLY_COUNT_RUN check code from power8

On Mon, 2017-07-31 at 08:02:41 UTC, Madhavan Srinivasan wrote: > There are some hardware events on Power systems which only > count when the processor is not idle, and there are some > fixed-function counters which count such events. For example, > the "run cycles" event counts cycles when the

Re: [v4,1/5] powerpc/lib/sstep: Add cmpb instruction emulation

On Mon, 2017-07-31 at 00:58:22 UTC, Matt Brown wrote: > This patch adds emulation of the cmpb instruction, enabling xmon to > emulate this instruction. > Tested for correctness against the cmpb asm instruction on ppc64le. > > Signed-off-by: Matt Brown > Reviewed-by:

Re: [v2,2/2] 44x/fsp2: enable eMMC arasan for fsp2 platform

On Tue, 2017-07-25 at 11:40:04 UTC, Ivan Mikhaylov wrote: > Add mmc0 changes for enabling arasan emmc and change > defconfig appropriately. > > Signed-off-by: Ivan Mikhaylov Applied to powerpc next, thanks. https://git.kernel.org/powerpc/c/754f030908c3615781e9e3559d8ba1

Re: powerpc/perf: Update default sdar_mode value for power9

On Tue, 2017-07-25 at 05:35:51 UTC, Madhavan Srinivasan wrote: > Commit 20dd4c624d251 ('powerpc/perf: Fix SDAR_MODE value for continous > sampling on Power9') set the default sdar_mode value in MMCRA[SDAR_MODE] > to be used as 0b01 (Update on TLB miss). And this value is set if sdar_mode > from

Re: powerpc/pseries: energy driver only print message when LPAR guest

On Fri, 2017-07-21 at 01:16:44 UTC, Nicholas Piggin wrote: > On Thu, 20 Jul 2017 23:03:21 +1000 > Michael Ellerman wrote: > > > Nicholas Piggin writes: > > > > > This driver currently reports the H_BEST_ENERGY is unsupported even > > > when booting in a

Re: [1/2] powerpc/perf: Cleanup of PM_BR_CMPL vs. PM_BRU_CMPL in power9 event list

On Mon, 2017-01-09 at 13:30:14 UTC, Madhavan Srinivasan wrote: > Fixes:34922527a2bcb ('powerpc/perf: Add power9 event list macros for generic > and cache events') > Signed-off-by: Madhavan Srinivasan Applied to powerpc next, thanks.

Re: [PATCH 3/6] powerpc/mm: Ensure cpumask update is ordered

On Mon, 24 Jul 2017 21:20:07 +1000 Nicholas Piggin wrote: > On Mon, 24 Jul 2017 14:28:00 +1000 > Benjamin Herrenschmidt wrote: > > > There is no guarantee that the various isync's involved with > > the context switch will order the update of the CPU

Re: [RFC v7 24/25] powerpc: Deliver SEGV signal on pkey violation

Thiago Jung Bauermann writes: > Ram Pai writes: > >> The value of the AMR register at the time of exception >> is made available in gp_regs[PT_AMR] of the siginfo. >> >> The value of the pkey, whose protection got violated, >> is made available

Re: [v6 04/15] mm: discard memblock data later

On Fri, Aug 11, 2017 at 11:32:49AM +0200, Michal Hocko wrote: > > Signed-off-by: Pavel Tatashin > > Reviewed-by: Steven Sistare > > Reviewed-by: Daniel Jordan > > Reviewed-by: Bob Picco > >

[PATCH] rtc: rtctest: Improve support detection

The rtc-generic and opal-rtc are failing to run this test as they do not support all the features. Let's treat the error returns and skip to the following test. Theoretically the test_DATE should be also adjusted, but as it's enabled on demand I think it makes sense to fail in such case.

[PATCH 0/1] rtc: rtctest: Support opal-rtc and rtc-generic

On ppc64le machines the opal-rtc, resp rtc-generic in guest is used. They only support minimal set of functionality and fail this test in not-yet treated way. This extends the checks and skips to the next test when feature is not supported. Lukáš Doktor (1): rtc: rtctest: Improve support

Re: [v6 05/15] mm: don't accessed uninitialized struct pages

On Mon 07-08-17 16:38:39, Pavel Tatashin wrote: > In deferred_init_memmap() where all deferred struct pages are initialized > we have a check like this: > > if (page->flags) { > VM_BUG_ON(page_zone(page) != zone); > goto free_range; > } > > This way we are

Re: [v6 04/15] mm: discard memblock data later

[CC Mel] On Mon 07-08-17 16:38:38, Pavel Tatashin wrote: > There is existing use after free bug when deferred struct pages are > enabled: > > The memblock_add() allocates memory for the memory array if more than > 128 entries are needed. See comment in e820__memblock_setup(): > > * The

Re: [v6 02/15] x86/mm: setting fields in deferred pages

[CC Mel - the full series is here http://lkml.kernel.org/r/1502138329-123460-1-git-send-email-pasha.tatas...@oracle.com] On Mon 07-08-17 16:38:36, Pavel Tatashin wrote: > Without deferred struct page feature (CONFIG_DEFERRED_STRUCT_PAGE_INIT), > flags and other fields in "struct page"es are never

Re: [FIX PATCH v0] powerpc: Fix memory unplug failure on radix guest

Bharata B Rao writes: > For a PowerKVM guest, it is possible to specify a DIMM device in > addition to the system RAM at boot time. When such a cold plugged DIMM > device is removed from a radix guest, we hit the following warning in the > guest kernel resulting in

RE: [PATCH net-next] fsl/fman: implement several errata workarounds

> -Original Message- > From: Florinel Iordache [mailto:florinel.iorda...@nxp.com] > Subject: [PATCH net-next] fsl/fman: implement several errata workarounds > > Implemented workarounds for the following dTSEC Erratum: > A002, A004, A0012, A0014, A004839 on several operations > that

Re: [FIX PATCH v0] powerpc: Fix memory unplug failure on radix guest

Reza Arbab writes: > On Thu, Aug 10, 2017 at 02:53:48PM +0530, Bharata B Rao wrote: >>diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c >>index f830562..24ecf53 100644 >>--- a/arch/powerpc/kernel/prom.c >>+++ b/arch/powerpc/kernel/prom.c >>@@ -524,6

[PATCH] powerpc/vdso64: Add support for CLOCK_{REALTIME/MONOTONIC}_COARSE

Current vDSO64 implementation does not have support for coarse clocks (CLOCK_MONOTONIC_COARSE, CLOCK_REALTIME_COARSE), for which it falls back to system call, increasing the response time, vDSO implementation reduces the cycle time. Below is a benchmark of the difference in execution time with and

[PATCH kernel] PCI: Disable IOV before pcibios_sriov_disable()

From: Gavin Shan The PowerNV platform is the only user of pcibios_sriov_disable(). The IOV BAR could be shifted by pci_iov_update_resource(). The warning message in the function is printed if the IOV capability is in enabled (PCI_SRIOV_CTRL_VFE && PCI_SRIOV_CTRL_MSE)

Re: [v6 01/15] x86/mm: reserve only exiting low pages

On Mon 07-08-17 16:38:35, Pavel Tatashin wrote: > Struct pages are initialized by going through __init_single_page(). Since > the existing physical memory in memblock is represented in memblock.memory > list, struct page for every page from this list goes through > __init_single_page(). By a page

Re: [v6 00/15] complete deferred page initialization

[I am sorry I didn't get to your previous versions] On Mon 07-08-17 16:38:34, Pavel Tatashin wrote: [...] > SMP machines can benefit from the DEFERRED_STRUCT_PAGE_INIT config option, > which defers initializing struct pages until all cpus have been started so > it can be done in parallel. > >

Re: [RFC v7 09/25] powerpc: store and restore the pkey state across context switches

Thiago Jung Bauermann writes: > Ram Pai writes: >> --- a/arch/powerpc/kernel/process.c >> +++ b/arch/powerpc/kernel/process.c >> @@ -42,6 +42,7 @@ >> #include >> #include >> #include >> +#include >> >> #include >> #include >> @@

[PATCH 1/2] powerpc/powernv/npu: Move tlb flush before launching ATSD

The nest mmu tlb flush needs to happen before the GPU translation shootdown is launched to avoid the GPU refilling its tlb with stale nmmu translations prior to the nmmu flush completing. Signed-off-by: Alistair Popple Cc: sta...@vger.kernel.org ---

[PATCH 2/2] powerpc/powernv/npu: Don't explicitly flush nmmu tlb

The nest mmu required an explicit flush as a tlbi would not flush it in the same way as the core. However an alternate firmware fix exists which should eliminate the need for this flush, so instead add a device-tree property (ibm,nmmu-flush) on the NVLink2 PHB to enable it only if required.