Re: [PATCH v2 1/3] powerpc/mm: Enable radix GTSE only if supported.

Bharata B Rao writes: > Make GTSE an MMU feature and enable it by default for radix. > However for guest, conditionally enable it if hypervisor supports > it via OV5 vector. Let prom_init ask for radix GTSE only if the > support exists. > > Having GTSE as an MMU feature will make it easy to enabl

Re: [PATCH v2 2/3] powerpc/pseries: H_REGISTER_PROC_TBL should ask for GTSE only if enabled

Bharata B Rao writes: > H_REGISTER_PROC_TBL asks for GTSE by default. GTSE flag bit should > be set only when GTSE is supported. > Reviewed-by: Aneesh Kumar K.V > Signed-off-by: Bharata B Rao > --- > arch/powerpc/platforms/pseries/lpar.c | 8 +--- > 1 file changed, 5 insertions(+), 3 dele

Re: [PATCH v2 3/3] powerpc/mm/book3s64/radix: Off-load TLB invalidations to host when !GTSE

Bharata B Rao writes: > From: Nicholas Piggin > > When platform doesn't support GTSE, let TLB invalidation requests > for radix guests be off-loaded to the host using H_RPT_INVALIDATE > hcall. > Reviewed-by: Aneesh Kumar K.V > Signed-off-by: Nicholas Piggin > Signed-off-by: Bharata B Rao >

Re: [PATCH] ASoC: fsl_asrc: Add an option to select internal ratio mode

On Tue, Jun 30, 2020 at 4:09 AM Nicolin Chen wrote: > > On Mon, Jun 29, 2020 at 09:58:35PM +0800, Shengjiu Wang wrote: > > The ASRC not only supports ideal ratio mode, but also supports > > internal ratio mode. > > > > For internal rato mode, the rate of clock source should be divided > > with no

Re: [PATCH 3/3] powerpc/pseries: Add KVM guest doorbell restrictions

Excerpts from Paul Mackerras's message of June 30, 2020 12:27 pm: > On Sun, Jun 28, 2020 at 01:04:28AM +1000, Nicholas Piggin wrote: >> KVM guests have certain restrictions and performance quirks when >> using doorbells. This patch tests for KVM environment in doorbell >> setup, and optimises IPI p

[PATCH 1/4] powerpc/sstep: support new VSX vector paired storage access instructions

VSX Vector Paired instructions loads/stores an octword (32 bytes) from/to storage into two sequential VSRs. Add `analyse_instr()` support to these new instructions, * Load VSX Vector Paired (lxvp) * Load VSX Vector Paired Indexed (lxvpx) * Prefixed Load VSX Vector Paired (pl

[PATCH 0/4] VSX 32-byte vector paired load/store instructions

VSX vector paired instructions operates with octword (32-byte) operand for loads and stores between storage and a pair of two sequential Vector-Scalar Registers (VSRs). There are 4 word instructions and 2 prefixed instructions that provides this 32-byte storage access operations - lxvp, lxvpx, stxv

[PATCH 2/4] powerpc/sstep: support emulation for vsx vector paired storage access instructions

add emulate_step() changes to support vsx vector paired storage access instructions that provides octword operands loads/stores between storage and set of 64 Vector Scalar Registers (VSRs). Signed-off-by: Balamuruhan S --- arch/powerpc/include/asm/sstep.h | 2 +- arch/powerpc/lib/sstep.c

[PATCH 3/4] powerpc ppc-opcode: add opcodes for vsx vector paired instructions

add instruction opcodes for new vsx vector paired instructions, * Load VSX Vector Paired (lxvp) * Load VSX Vector Paired Indexed (lxvpx) * Store VSX Vector Paired (stxvp) * Store VSX Vector Paired Indexed (stxvpx) Signed-off-by: Balamuruhan S --- arch/powerpc/incl

[PATCH 4/4] powerpc sstep: add testcases for vsx load/store instructions

add testcases for vsx load/store vector paired instructions, * Load VSX Vector Paired (lxvp) * Load VSX Vector Paired Indexed (lxvpx) * Prefixed Load VSX Vector Paired (plxvp) * Store VSX Vector Paired (stxvp) * Store VSX Vector Paired Indexed (stxvpx)

Re: [PATCH v4 7/8] lockdep: Change hardirq{s_enabled,_context} to per-cpu variables

Peter Zijlstra wrote: ... > -#define lockdep_assert_irqs_disabled() do {\ > - WARN_ONCE(debug_locks && !current->lockdep_recursion && \ > - current->hardirqs_enabled,\ > - "IRQs not disabled as e

Re: [PATCH 04/11] ppc64/kexec_file: avoid stomping memory used by special regions

On 30/06/20 9:00 am, piliu wrote: > > > On 06/29/2020 01:55 PM, Hari Bathini wrote: >> >> >> On 28/06/20 7:44 am, piliu wrote: >>> Hi Hari, >> >> Hi Pingfan, >> >>> >>> After a quick through for this series, I have a few question/comment on >>> this patch for the time being. Pls see comment in

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