Hello Randy,
On Thu, Jun 08, 2023 at 05:33:28PM -0700, Randy Dunlap wrote:
> When SERIAL_8250_CONSOLE is not set but PPC_UDBG_16550=y,
> the legacy_serial code references fsl8250_handle_irq, which is
> only built when SERIAL_8250_CONSOLE is set.
>
> Be consistent in referencing the used
I expect this to fix the
arch/mips/mm/tlb-r4k.c:300:16: warning: variable 'pmdp' set but not used
reported by the kernel test robot; but I am uncomfortable rearranging
lines in this tlb_probe_hazard() area, and would be glad for review and
testing by someone familiar with mips - thanks in advance!
On 5/27/23 01:44, Yu Zhao wrote:
+#define kvm_arch_has_test_clear_young kvm_arch_has_test_clear_young
+static inline bool kvm_arch_has_test_clear_young(void)
+{
+ return IS_ENABLED(CONFIG_X86_64) &&
+ (!IS_REACHABLE(CONFIG_KVM) || (tdp_mmu_enabled &&
shadow_accessed_mask));
ISA v3.1 introduces new sync types for store ordering.
stncisync
stcisync
stsync
Add ppc-opcode defines for these. This changes PPC_RAW_SYNC to take
L,SC parameters and adds a PPC_RAW_HWSYNC for callers that want the
plain old sync (aka hwsync).
Signed-off-by: Nicholas Piggin
---
mmiowb must ensure MMIO stores inside a spin lock critical section on
one CPU will not be seen by the device after another CPU takes the
same lock and performs MMIOs.
This just requires cache inhibited stores to be ordered with the store
to unlock the spinlock, so wmb() can be used.
stncisync orders less than lwsync (only cacheable store-store, not
load-load or load-store) so it should be as cheap or cheaper.
Microbenchmarks with no actual loads to order shows that the basic
execution cost is the same on POWER10.
Signed-off-by: Nicholas Piggin
---
The most expensive ordering for hwsync to provide is the store-load
barrier, because all prior stores have to be drained to the caches
before subsequent instructions can complete.
stsync just orders stores which means it can just be a barrer that
goes down the store queue and orders draining, and
On 5/31/23 21:17, Jason Gunthorpe wrote:
+ int (*test_clear_young)(struct mmu_notifier *mn, struct mm_struct *mm,
+ unsigned long start, unsigned long end,
+ bool clear, unsigned long *bitmap);
+
Why leave clear_young behind?
On 5/27/23 01:44, Yu Zhao wrote:
TLDR
This patchset adds a fast path to clear the accessed bit without
taking kvm->mmu_lock. It can significantly improve the performance of
guests when the host is under heavy memory pressure.
ChromeOS has been using a similar approach [1] since mid 2021
Parse the device tree in early init to find the memory block size to be
used by the kernel. Consolidate the memory block size device tree parsing
to one helper and use that on both powernv and pseries. We still want to
use machine-specific callback because on all machine types other than
powernv
Certain devices can possess non-standard memory capacities, not constrained
to multiples of 1GB. Provide a kernel parameter so that we can map the
device memory completely on memory hotplug.
Restrict memory_block_size value to a power of 2 value similar to LMB size.
The memory block size should
On 06/08/2023 08:56 PM, Arnd Bergmann wrote:
On Thu, Jun 8, 2023, at 09:04, Tiezhu Yang wrote:
On 05/09/2023 05:37 PM, Arnd Bergmann wrote:
On Tue, May 9, 2023, at 09:05, Tiezhu Yang wrote:
I think we are completely safe on the architectures that were
added since the linux-3.x days (arm64,
On 09/06/23 11:03 am, Mahesh J Salgaonkar wrote:
On 2023-06-09 10:48:46 Fri, Hari Bathini wrote:
Invoke ibm,os-term call with rtas_call_unlocked(), without using the
RTAS spinlock, to avoid deadlock in the unlikely event of a machine
crash while making an RTAS call.
Thanks for the patch.
Invoke ibm,os-term call with rtas_call_unlocked(), without using the
RTAS spinlock, to avoid deadlock in the unlikely event of a machine
crash while making an RTAS call.
Signed-off-by: Hari Bathini
---
arch/powerpc/kernel/rtas.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff
From: Christophe Leroy
By taking GENERIC_IOREMAP method, the generic generic_ioremap_prot(),
generic_iounmap(), and their generic wrapper ioremap_prot(), ioremap()
and iounmap() are all visible and available to arch. Arch needs to
provide wrapper functions to override the generic versions if
With SERIAL_8250=y and SERIAL_8250_FSL_CONSOLE=n the both
IS_ENABLED(CONFIG_SERIAL_8250) and IS_REACHABLE(CONFIG_SERIAL_8250)
evaluate to true and so fsl8250_handle_irq() is used. However this
function is only available if CONFIG_SERIAL_8250_CONSOLE=y (and thus
SERIAL_8250_FSL=y).
To prepare
Hello,
this is the fourth iteration of trying to make the FSL workaround code
active even without 8250 console support.
The first patch is a fix for commit 66eff0ef528b (powerpc/legacy_serial:
Warn about 8250 devices operated without active FSL workarounds) that
currently is in tty-next. This
On 2023-06-09 12:44:04 Fri, Hari Bathini wrote:
> Invoke ibm,os-term call with rtas_call_unlocked(), without using the
> RTAS spinlock, to avoid deadlock in the unlikely event of a machine
> crash while making an RTAS call.
>
> Signed-off-by: Hari Bathini
> ---
> arch/powerpc/kernel/rtas.c | 4
The hcall H_GET_PERF_COUNTER_INFO with counter request value as
PROCESSOR_BUS_TOPOLOGY(0XD0), can be used to get the system
topology information. To expose the system topology information,
patch adds sysfs file called "processor_bus_topology" to the
"/sys/devices/hv_gpci/interface/" of hv_gpci pmu
The hcall H_GET_PERF_COUNTER_INFO can be used to get data related to
chips, dimms and system topology, by passing different counter request
values.
Patchset adds sysfs files to "/sys/devices/hv_gpci/interface/"
of hv_gpci pmu driver, which will expose system topology information
using
The hcall H_GET_PERF_COUNTER_INFO with counter request value as
PROCESSOR_CONFIG(0X90), can be used to get the system
processor configuration information. To expose the system
processor config information, patch adds sysfs file called
"processor_config" to the "/sys/devices/hv_gpci/interface/"
of
The hcall H_GET_PERF_COUNTER_INFO with counter request value as
AFFINITY_DOMAIN_INFORMATION_BY_DOMAIN(0XB0), can be used to get
the system affinity domain via domain information. To expose the system
affinity domain via domain information, patch adds sysfs file called
"affinity_domain_via_domain"
Add details of the new hv-gpci interface file called
"affinity_domain_via_virtual_processor" in the ABI documentation.
Signed-off-by: Kajol Jain
---
.../sysfs-bus-event_source-devices-hv_gpci| 15 +++
1 file changed, 15 insertions(+)
diff --git
Add details of the new hv-gpci interface file called
"affinity_domain_via_domain" in the ABI documentation.
Signed-off-by: Kajol Jain
---
.../sysfs-bus-event_source-devices-hv_gpci| 15 +++
1 file changed, 15 insertions(+)
diff --git
Christophe Leroy writes:
> Le 12/05/2023 à 18:09, Marco Elver a écrit :
>> On Fri, 12 May 2023 at 17:31, Christophe Leroy
>> wrote:
>>>
>>> Activating KCSAN on a 32 bits architecture leads to the following
>>> link-time failure:
>>>
>>> LD .tmp_vmlinux.kallsyms1
>>>
On Fri, 09 Jun 2023 01:59:35 +0100,
Yu Zhao wrote:
>
> TLDR
>
> Apache Spark spent 12% less time sorting four billion random integers twenty
> times (in ~4 hours) after this patchset [1].
Why are the 3 architectures you have considered being evaluated with 3
different benchmarks? I am not
"Nicholas Piggin" writes:
> On Mon Jun 5, 2023 at 6:58 PM AEST, Christophe Leroy wrote:
>> Looking at generated code for handle_signal32() shows calls to a
>> function called __unsafe_save_user_regs.constprop.0 while user access
>> is open.
>>
>> And that __unsafe_save_user_regs.constprop.0
Add details of the new hv-gpci interface file called
"processor_bus_topology" in the ABI documentation.
Signed-off-by: Kajol Jain
---
.../sysfs-bus-event_source-devices-hv_gpci| 29 +++
1 file changed, 29 insertions(+)
diff --git
The hcall H_GET_PERF_COUNTER_INFO with counter request value as
AFFINITY_DOMAIN_INFORMATION_BY_VIRTUAL_PROCESSOR(0XA0), can be used to get
the system affinity domain via virtual processor information. To expose
the system affinity domain via virtual processor information, patch adds
sysfs file
Add details of the new hv-gpci interface file called
"processor_config" in the ABI documentation.
Signed-off-by: Kajol Jain
---
.../sysfs-bus-event_source-devices-hv_gpci| 15 +++
1 file changed, 15 insertions(+)
diff --git
Add details of the new hv-gpci interface file called
"affinity_domain_via_partition" in the ABI documentation.
Signed-off-by: Kajol Jain
---
.../sysfs-bus-event_source-devices-hv_gpci| 15 +++
1 file changed, 15 insertions(+)
diff --git
The hcall H_GET_PERF_COUNTER_INFO with counter request value as
AFFINITY_DOMAIN_INFORMATION_BY_PARTITION(0XB1), can be used to get
the system affinity domain via partition information. To expose the system
affinity domain via partition information, patch adds sysfs file called
Use the recently added of_property_read_reg() helper to get the
untranslated "reg" address value.
Signed-off-by: Rob Herring
---
drivers/macintosh/smu.c | 15 +++
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/drivers/macintosh/smu.c b/drivers/macintosh/smu.c
index
Allocate a domain from a group. Automatically obtains the iommu_ops to use
from the device list of the group. Convert the internal callers to use it.
Tested-by: Steven Price
Tested-by: Marek Szyprowski
Tested-by: Nicolin Chen
Signed-off-by: Jason Gunthorpe
---
drivers/iommu/iommu.c | 66
This callback requests the driver to create only a __IOMMU_DOMAIN_PAGING
domain, so it saves a few lines in a lot of drivers needlessly checking
the type.
More critically, this allows us to sweep out all the
IOMMU_DOMAIN_UNMANAGED and IOMMU_DOMAIN_DMA checks from a lot of the
drivers, simplifying
Use the recently added of_property_read_reg() helper to get the
untranslated "reg" address value.
Signed-off-by: Rob Herring
---
arch/powerpc/sysdev/fsl_rio.c | 14 +++---
arch/powerpc/sysdev/fsl_rmu.c | 9 +
2 files changed, 4 insertions(+), 19 deletions(-)
diff --git
Use the recently added of_property_read_reg() helper to get the
untranslated "reg" address value.
Signed-off-by: Rob Herring
---
drivers/cpufreq/pmac32-cpufreq.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/cpufreq/pmac32-cpufreq.c
On Thu, Jun 01, 2023 at 08:47:28PM +0100, Robin Murphy wrote:
> > diff --git a/drivers/iommu/fsl_pamu_domain.c
> > b/drivers/iommu/fsl_pamu_domain.c
> > index ca4f5ebf028783..8d5d6a3acf9dfd 100644
> > --- a/drivers/iommu/fsl_pamu_domain.c
> > +++ b/drivers/iommu/fsl_pamu_domain.c
> > @@ -192,13
Except for dart every driver returns 0 or IDENTITY from def_domain_type().
The drivers that return IDENTITY have some kind of good reason, typically
that quirky hardware really can't support anything other than IDENTITY.
Arrange things so that if the driver says it needs IDENTITY then
I've avoided doing this because there is no way to make this happen
without an intrusion into the core code. Up till now this has avoided
needing the core code's probe path with some hackery - but now that
default domains are becoming mandatory it is unavoidable. The core probe
path must be run to
What exynos calls exynos_iommu_detach_device is actually putting the iommu
into identity mode.
Move to the new core support for ARM_DMA_USE_IOMMU by defining
ops->identity_domain.
Tested-by: Marek Szyprowski
Acked-by: Marek Szyprowski
Signed-off-by: Jason Gunthorpe
---
What msm does during omap_iommu_set_platform_dma() is actually putting the
iommu into identity mode.
Move to the new core support for ARM_DMA_USE_IOMMU by defining
ops->identity_domain.
This driver does not support IOMMU_DOMAIN_DMA, however it cannot be
compiled on ARM64 either. Most likely it
On Wed, Jun 7, 2023 at 5:56 PM Nicholas Piggin wrote:
[snip]
>
> Is there a particular reason some reg sets are broken into their own
> patches? Looking at this hunk you think the VR one got missed, but it's
> in its own patch.
>
> Not really a big deal but I wouldn't mind them all in one patch.
On Thu, Jun 8, 2023 at 8:47 PM Naveen N Rao wrote:
>
> Ftrace on ppc32 expects a three instruction sequence at the beginning of
> each function when specifying -pg:
> mflrr0
> stw r0,4(r1)
> bl _mcount
>
> This is the case with all supported versions of gcc.
This is used when the iommu driver is taking control of the dma_ops,
currently only on S390 and power spapr. It is designed to preserve the
original ops->detach_dev() semantic that these S390 was built around.
Provide an opaque domain type and a 'default_domain' ops value that allows
the driver
This allows a driver to set a global static to an IDENTITY domain and
the core code will automatically use it whenever an IDENTITY domain
is requested.
By making it always available it means the IDENTITY can be used in error
handling paths to force the iommu driver into a known state. Devices
"ranges" is a standard property, and we have common helper functions
for parsing it, so let's use the for_each_of_range() iterator.
Signed-off-by: Rob Herring
---
arch/powerpc/platforms/512x/mpc512x_lpbfifo.c | 46 ++-
1 file changed, 14 insertions(+), 32 deletions(-)
diff
"ranges" is a standard property with common parsing functions. Users
shouldn't be implementing their own parsing of it. Refactor the FSL RapidIO
"ranges" parsing to use of_range_to_resource() instead.
Signed-off-by: Rob Herring
---
arch/powerpc/sysdev/fsl_soc.c | 16
1 file
On 5/22/23 11:00, Vladimir Oltean wrote:
> On Mon, May 22, 2023 at 10:42:04AM -0400, Sean Anderson wrote:
>> Have you had a chance to review this driver?
>
> Partially / too little (and no, I don't have an answer yet). I am
> debugging a SERDES protocol change procedure from XFI to SGMII.
I'd
Prior to commit 1b932ceddd19 ("iommu: Remove detach_dev callbacks") the
sun50i_iommu_detach_device() function was being called by
ops->detach_dev().
This is an IDENTITY domain so convert sun50i_iommu_detach_device() into
sun50i_iommu_identity_attach() and a full IDENTITY domain and thus hook it
On Wed, Jun 7, 2023 at 3:38 PM Gautam Menghani wrote:
>
> On Mon, Jun 05, 2023 at 04:48:48PM +1000, Jordan Niethe wrote:
> > From: Michael Neuling
>
> Hi,
> There are some minor typos in the documentation pointed out below
Thank you, will correct in the next revision.
Jordan
>
>
> >
On Wed, Jun 7, 2023 at 7:09 PM Nicholas Piggin wrote:
[snip]
>
> You lost your comments.
Thanks
>
> > diff --git a/arch/powerpc/include/asm/kvm_book3s.h
> > b/arch/powerpc/include/asm/kvm_book3s.h
> > index 0ca2d8b37b42..c5c57552b447 100644
> > --- a/arch/powerpc/include/asm/kvm_book3s.h
> >
Even though dma-iommu.c and CONFIG_ARM_DMA_USE_IOMMU do approximately the
same stuff, the way they relate to the IOMMU core is quiet different.
dma-iommu.c expects the core code to setup an UNMANAGED domain (of type
IOMMU_DOMAIN_DMA) and then configures itself to use that domain. This
becomes the
This brings back the ops->detach_dev() code that commit
1b932ceddd19 ("iommu: Remove detach_dev callbacks") deleted and turns it
into an IDENTITY domain.
Also reverts commit 584d334b1393 ("iommu/ipmmu-vmsa: Remove
ipmmu_utlb_disable()")
Signed-off-by: Jason Gunthorpe
---
Thierry says this is not used anymore, and doesn't think it makes sense as
an iommu driver. The HW it supports is about 10 years old now and newer HW
uses different IOMMU drivers.
As this is the only driver with a GART approach, and it doesn't really
meet the driver expectations from the IOMMU
On Thu May 25, 2023 at 1:56 AM EEST, Jerry Snitselaar wrote:
> On Tue, Apr 18, 2023 at 09:44:07AM -0400, Stefan Berger wrote:
> > Simplify tpm_read_log_of() by moving reusable parts of the code into
> > an inline function that makes it commonly available so it can be
> > used also for kexec
What omap does during omap_iommu_set_platform_dma() is actually putting
the iommu into identity mode.
Move to the new core support for ARM_DMA_USE_IOMMU by defining
ops->identity_domain.
This driver does not support IOMMU_DOMAIN_DMA, however it cannot be
compiled on ARM64 either. Most likely it
All ARM64 iommu drivers should support IOMMU_DOMAIN_DMA to enable
dma-iommu.c.
tegra is blocking dma-iommu usage, and also default_domain's, because it
wants an identity translation. This is needed for some device quirk. The
correct way to do this is to support IDENTITY domains and use
The PLATFORM domain will be set as the default domain and attached as
normal during probe. The driver will ignore the initial attach from a NULL
domain to the PLATFORM domain.
After this, the PLATFORM domain's attach_dev will be called whenever we
detach from an UNMANAGED domain (eg for VFIO).
POWER is using the set_platform_dma_ops() callback to hook up its private
dma_ops, but this is buired under some indirection and is weirdly
happening for a BLOCKED domain as well.
For better documentation create a PLATFORM domain to manage the dma_ops,
since that is what it is for, and make the
"ranges" is a standard property with common parsing functions. Users
shouldn't be implementing their own parsing of it. Refactor the FSL RapidIO
"ranges" parsing to use of_range_to_resource() instead.
One change is the original code would look for "#size-cells" and
"#address-cells" in the parent
What tegra-smmu does during tegra_smmu_set_platform_dma() is actually
putting the iommu into identity mode.
Move to the new core support for ARM_DMA_USE_IOMMU by defining
ops->identity_domain.
Signed-off-by: Jason Gunthorpe
---
drivers/iommu/tegra-smmu.c | 37
At this point every iommu driver will cause a default_domain to be
selected, so we can finally remove this gap from the core code.
The following table explains what each driver supports and what the
resulting default_domain will be:
ops->defaut_domain
[ It would be good to get this in linux-next, we have some good test
coverage on the ARM side already, thanks! ]
It has been a long time coming, this series completes the default_domain
transition and makes it so that the core IOMMU code will always have a
non-NULL default_domain for every driver
On 6/9/23 14:18, Jarkko Sakkinen wrote:
On Thu May 25, 2023 at 1:56 AM EEST, Jerry Snitselaar wrote:
On Tue, Apr 18, 2023 at 09:44:07AM -0400, Stefan Berger wrote:
Simplify tpm_read_log_of() by moving reusable parts of the code into
an inline function that makes it commonly available so it
This brings back the ops->detach_dev() code that commit
1b932ceddd19 ("iommu: Remove detach_dev callbacks") deleted and turns it
into an IDENTITY domain.
Signed-off-by: Jason Gunthorpe
---
drivers/iommu/arm/arm-smmu/qcom_iommu.c | 39 +
1 file changed, 39 insertions(+)
All drivers are now using IDENTITY or PLATFORM domains for what this did,
we can remove it now. It is no longer possible to attach to a NULL domain.
Tested-by: Heiko Stuebner
Tested-by: Niklas Schnelle
Tested-by: Steven Price
Tested-by: Marek Szyprowski
Tested-by: Nicolin Chen
Signed-off-by:
On Wed, Jun 7, 2023 at 5:53 PM Nicholas Piggin wrote:
[snip]
>
> The general idea is fine, some of the names could use a bit of
> improvement. What's a BOOK3S_WRAPPER for example, is it not a
> VCPU_WRAPPER, or alternatively why isn't a VCORE_WRAPPER Book3S
> as well?
Yeah the names are not
On 6/9/23 06:39, Uwe Kleine-König wrote:
> With SERIAL_8250=y and SERIAL_8250_FSL_CONSOLE=n the both
> IS_ENABLED(CONFIG_SERIAL_8250) and IS_REACHABLE(CONFIG_SERIAL_8250)
> evaluate to true and so fsl8250_handle_irq() is used. However this
> function is only available if
Hi--
On 5/16/23 11:54, Pali Rohár wrote:
> On Tuesday 16 May 2023 08:28:54 Randy Dunlap wrote:
>> In a randconfig with CONFIG_SERIAL_CPM=m and
>> CONFIG_PPC_EARLY_DEBUG_CPM=y, there is a build error:
>> ERROR: modpost: "udbg_putc" [drivers/tty/serial/cpm_uart/cpm_uart.ko]
>> undefined!
>>
>>
This driver is nonsensical. To not block migrating the core API away from
NULL default_domains give it a hacky of a PLATFORM domain that keeps it
working exactly as it always did.
Leave some comments around to warn away any future people looking at this.
Signed-off-by: Jason Gunthorpe
---
What mtk does during mtk_iommu_v1_set_platform_dma() is actually putting
the iommu into identity mode. Make this available as a proper IDENTITY
domain.
The mtk_iommu_v1_def_domain_type() from
commit 8bbe13f52cb7 ("iommu/mediatek-v1: Add def_domain_type") explains
this was needed to allow
This brings back the ops->detach_dev() code that commit
1b932ceddd19 ("iommu: Remove detach_dev callbacks") deleted and turns it
into an IDENTITY domain.
Signed-off-by: Jason Gunthorpe
---
drivers/iommu/mtk_iommu.c | 23 +++
1 file changed, 23 insertions(+)
diff --git
These drivers are all trivially converted since the function is only
called if the domain type is going to be
IOMMU_DOMAIN_UNMANAGED/DMA.
Tested-by: Heiko Stuebner
Tested-by: Steven Price
Tested-by: Marek Szyprowski
Tested-by: Nicolin Chen
Signed-off-by: Jason Gunthorpe
---
These drivers don't support IOMMU_DOMAIN_DMA, so this commit effectively
allows them to support that mode.
The prior work to require default_domains makes this safe because every
one of these drivers is either compilation incompatible with dma-iommu.c,
or already establishing a default_domain. In
On Wed, Jun 7, 2023 at 3:54 PM Nicholas Piggin wrote:
>
> On Mon Jun 5, 2023 at 4:48 PM AEST, Jordan Niethe wrote:
> > There is existing support for nested guests on powernv hosts however the
> > hcall interface this uses is not support by other PAPR hosts.
>
> I kind of liked it being called
On Wed, Jun 7, 2023 at 6:27 PM Nicholas Piggin wrote:
[snip]
>
> This is a tour de force in one of these things, so I hate to be
> the "me smash with club" guy, but what if you allocated buffers
> with enough room for all the state (or 99% of cases, in which
> case an overflow would make an
On Thu, Jun 8, 2023 at 11:41 AM Mike Rapoport wrote:
>
> On Tue, Jun 06, 2023 at 11:21:59AM -0700, Song Liu wrote:
> > On Mon, Jun 5, 2023 at 3:09 AM Mark Rutland wrote:
> >
> > [...]
> >
> > > > > > Can you give more detail on what parameters you need? If the only
> > > > > > extra
> > > > > >
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