[PATCH] powerpc: kernel: remove useless code which related with 'max_cpus'
Since not need 'max_cpus' after the related commit, the related code are useless too, need be removed. The related commit: c1aa687 powerpc: Clean up obsolete code relating to decrementer and timebase The related warning: arch/powerpc/kernel/smp.c:323:43: warning: parameter ‘max_cpus’ set but not used [-Wunused-but-set-parameter] Signed-off-by: Chen Gang gang.c...@asianux.com --- arch/powerpc/kernel/smp.c |8 1 files changed, 0 insertions(+), 8 deletions(-) diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c index 38b0ba6..8c2bae4 100644 --- a/arch/powerpc/kernel/smp.c +++ b/arch/powerpc/kernel/smp.c @@ -345,14 +345,6 @@ void __init smp_prepare_cpus(unsigned int max_cpus) cpumask_set_cpu(boot_cpuid, cpu_sibling_mask(boot_cpuid)); cpumask_set_cpu(boot_cpuid, cpu_core_mask(boot_cpuid)); - - if (smp_ops) - if (smp_ops-probe) - max_cpus = smp_ops-probe(); - else - max_cpus = NR_CPUS; - else - max_cpus = 1; } void smp_prepare_boot_cpu(void) -- 1.7.7.6 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] powerpc: kernel: remove useless code which related with 'max_cpus'
On 07/22/2013 11:28 AM, Chen Gang wrote:
Since not need 'max_cpus' after the related commit, the related code
are useless too, need be removed.
The related commit:
c1aa687 powerpc: Clean up obsolete code relating to decrementer and timebase
The related warning:
arch/powerpc/kernel/smp.c:323:43: warning: parameter ‘max_cpus’ set but not
used [-Wunused-but-set-parameter]
Signed-off-by: Chen Gang gang.c...@asianux.com
---
arch/powerpc/kernel/smp.c |8
1 files changed, 0 insertions(+), 8 deletions(-)
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index 38b0ba6..8c2bae4 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc/kernel/smp.c
@@ -345,14 +345,6 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
cpumask_set_cpu(boot_cpuid, cpu_sibling_mask(boot_cpuid));
cpumask_set_cpu(boot_cpuid, cpu_core_mask(boot_cpuid));
-
- if (smp_ops)
- if (smp_ops-probe)
- max_cpus = smp_ops-probe();
No, you can't just remove the call to -probe(). Its essential.
For example, one such -probe() routine, xics_smp_probe() does some
pretty important stuff, such as populating the -cause_ipi function
pointer etc, see below:
143 int __init xics_smp_probe(void)
144 {
145 /* Setup cause_ipi callback based on which ICP is used */
146 smp_ops-cause_ipi = icp_ops-cause_ipi;
147
148 /* Register all the IPIs */
149 xics_request_ipi();
150
151 return cpumask_weight(cpu_possible_mask);
152 }
- else
- max_cpus = NR_CPUS;
- else
- max_cpus = 1;
}
Yes, max_cpus is unused, but you have to be careful while removing
code.
Regards,
Srivatsa S. Bhat
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Re: [PATCH] powerpc: kernel: remove useless code which related with 'max_cpus'
On 07/22/2013 02:18 PM, Srivatsa S. Bhat wrote:
On 07/22/2013 11:28 AM, Chen Gang wrote:
Since not need 'max_cpus' after the related commit, the related code
are useless too, need be removed.
The related commit:
c1aa687 powerpc: Clean up obsolete code relating to decrementer and
timebase
The related warning:
arch/powerpc/kernel/smp.c:323:43: warning: parameter �max_cpus� set but
not used [-Wunused-but-set-parameter]
Signed-off-by: Chen Gang gang.c...@asianux.com
---
arch/powerpc/kernel/smp.c |8
1 files changed, 0 insertions(+), 8 deletions(-)
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index 38b0ba6..8c2bae4 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc/kernel/smp.c
@@ -345,14 +345,6 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
cpumask_set_cpu(boot_cpuid, cpu_sibling_mask(boot_cpuid));
cpumask_set_cpu(boot_cpuid, cpu_core_mask(boot_cpuid));
-
- if (smp_ops)
- if (smp_ops-probe)
- max_cpus = smp_ops-probe();
No, you can't just remove the call to -probe(). Its essential.
For example, one such -probe() routine, xics_smp_probe() does some
pretty important stuff, such as populating the -cause_ipi function
pointer etc, see below:
143 int __init xics_smp_probe(void)
144 {
145 /* Setup cause_ipi callback based on which ICP is used */
146 smp_ops-cause_ipi = icp_ops-cause_ipi;
147
148 /* Register all the IPIs */
149 xics_request_ipi();
150
151 return cpumask_weight(cpu_possible_mask);
152 }
OK, thanks.
- else
- max_cpus = NR_CPUS;
- else
- max_cpus = 1;
}
Yes, max_cpus is unused, but you have to be careful while removing
code.
I should send patch v2, soon. :-)
Regards,
Srivatsa S. Bhat
Thanks.
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[PATCH] arch: powerpc: kvm: add signed type cast for comparation
'rmls' is 'unsigned long', lpcr_rmls() will return negative number when
failure occurs, so it need a type cast for comparing.
'lpid' is 'unsigned long', kvmppc_alloc_lpid() return negative number
when failure occurs, so it need a type cast for comparing.
Signed-off-by: Chen Gang gang.c...@asianux.com
---
arch/powerpc/kvm/book3s_hv.c |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 2efa9dd..7629cd3 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -1809,7 +1809,7 @@ static int kvmppc_hv_setup_htab_rma(struct kvm_vcpu *vcpu)
rma_size = PAGE_SHIFT;
rmls = lpcr_rmls(rma_size);
err = -EINVAL;
- if (rmls 0) {
+ if ((long)rmls 0) {
pr_err(KVM: Can't use RMA of 0x%lx bytes\n, rma_size);
goto out_srcu;
}
@@ -1874,7 +1874,7 @@ int kvmppc_core_init_vm(struct kvm *kvm)
/* Allocate the guest's logical partition ID */
lpid = kvmppc_alloc_lpid();
- if (lpid 0)
+ if ((long)lpid 0)
return -ENOMEM;
kvm-arch.lpid = lpid;
--
1.7.7.6
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Re: [PATCH V3 2/2] powerpc, perf: BHRB filter configuration should follow the task
On 06/24/2013 12:50 PM, Michael Neuling wrote: Anshuman Khandual khand...@linux.vnet.ibm.com wrote: When the task moves around the system, the corresponding cpuhw per cpu strcuture should be popullated with the BHRB filter request value so that PMU could be configured appropriately with that during the next call into power_pmu_enable(). Signed-off-by: Anshuman Khandual khand...@linux.vnet.ibm.com benh you might want to fix the spelling mistakes above strcuture - structure popullated - populated Otherwise: Acked-by: Michael Neuling mi...@neuling.org Hey Ben, These patches have not been applied yet. Would like me to correct these spellings myself and send out again. Please do let me know. Thanks ! Regards Anshuman ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v2] powerpc: kernel: remove useless code which related with 'max_cpus'
Since not need 'max_cpus' after the related commit, the related code are useless too, need be removed. The related commit: c1aa687 powerpc: Clean up obsolete code relating to decrementer and timebase The related warning: arch/powerpc/kernel/smp.c:323:43: warning: parameter ‘max_cpus’ set but not used [-Wunused-but-set-parameter] Signed-off-by: Chen Gang gang.c...@asianux.com --- arch/powerpc/kernel/smp.c |9 ++--- 1 files changed, 2 insertions(+), 7 deletions(-) diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c index 38b0ba6..7edbd5b 100644 --- a/arch/powerpc/kernel/smp.c +++ b/arch/powerpc/kernel/smp.c @@ -346,13 +346,8 @@ void __init smp_prepare_cpus(unsigned int max_cpus) cpumask_set_cpu(boot_cpuid, cpu_sibling_mask(boot_cpuid)); cpumask_set_cpu(boot_cpuid, cpu_core_mask(boot_cpuid)); - if (smp_ops) - if (smp_ops-probe) - max_cpus = smp_ops-probe(); - else - max_cpus = NR_CPUS; - else - max_cpus = 1; + if (smp_ops smp_ops-probe) + smp_ops-probe(); } void smp_prepare_boot_cpu(void) -- 1.7.7.6 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH V3 2/2] powerpc, perf: BHRB filter configuration should follow the task
On Mon, 2013-07-22 at 12:09 +0530, Anshuman Khandual wrote: These patches have not been applied yet. Would like me to correct these spellings myself and send out again. Please do let me know. Thanks ! No, it's ok, I'll add them to my batch. Usually I assume that perf related stuff goes through acme's perf tree so I might have overlooked them because of that. Michael, you're ok with these ? Cheers, Ben ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH] powerpc: platforms: powernv: add '__init' for pnv_pci_init_ioda2_phb()
pnv_pci_init_ioda2_phb() is only used during boot up, so need add
'__init' to save the related memory, and avoid related warning:
The function .pnv_pci_init_ioda2_phb() references
the function __init .pnv_pci_init_ioda_phb().
This is often because .pnv_pci_init_ioda2_phb lacks a __init
annotation or the annotation of .pnv_pci_init_ioda_phb is wrong.
Signed-off-by: Chen Gang gang.c...@asianux.com
---
arch/powerpc/platforms/powernv/pci-ioda.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c
b/arch/powerpc/platforms/powernv/pci-ioda.c
index 49b57b9..d8140b1 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -1266,7 +1266,7 @@ void __init pnv_pci_init_ioda_phb(struct device_node *np,
opal_pci_set_pe(phb_id, 0, 0, 7, 1, 1 , OPAL_MAP_PE);
}
-void pnv_pci_init_ioda2_phb(struct device_node *np)
+void __init pnv_pci_init_ioda2_phb(struct device_node *np)
{
pnv_pci_init_ioda_phb(np, 0, PNV_PHB_IODA2);
}
--
1.7.7.6
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Re: [PATCH v2] powerpc: kernel: remove useless code which related with 'max_cpus'
On 07/22/2013 12:10 PM, Chen Gang wrote: Since not need 'max_cpus' after the related commit, the related code are useless too, need be removed. The related commit: c1aa687 powerpc: Clean up obsolete code relating to decrementer and timebase The related warning: arch/powerpc/kernel/smp.c:323:43: warning: parameter ‘max_cpus’ set but not used [-Wunused-but-set-parameter] Signed-off-by: Chen Gang gang.c...@asianux.com This version looks good. Reviewed-by: Srivatsa S. Bhat srivatsa.b...@linux.vnet.ibm.com Regards, Srivatsa S. Bhat --- arch/powerpc/kernel/smp.c |9 ++--- 1 files changed, 2 insertions(+), 7 deletions(-) diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c index 38b0ba6..7edbd5b 100644 --- a/arch/powerpc/kernel/smp.c +++ b/arch/powerpc/kernel/smp.c @@ -346,13 +346,8 @@ void __init smp_prepare_cpus(unsigned int max_cpus) cpumask_set_cpu(boot_cpuid, cpu_sibling_mask(boot_cpuid)); cpumask_set_cpu(boot_cpuid, cpu_core_mask(boot_cpuid)); - if (smp_ops) - if (smp_ops-probe) - max_cpus = smp_ops-probe(); - else - max_cpus = NR_CPUS; - else - max_cpus = 1; + if (smp_ops smp_ops-probe) + smp_ops-probe(); } void smp_prepare_boot_cpu(void) ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v2] powerpc: kernel: remove useless code which related with 'max_cpus'
On 07/22/2013 02:51 PM, Srivatsa S. Bhat wrote: On 07/22/2013 12:10 PM, Chen Gang wrote: Since not need 'max_cpus' after the related commit, the related code are useless too, need be removed. The related commit: c1aa687 powerpc: Clean up obsolete code relating to decrementer and timebase The related warning: arch/powerpc/kernel/smp.c:323:43: warning: parameter ‘max_cpus’ set but not used [-Wunused-but-set-parameter] Signed-off-by: Chen Gang gang.c...@asianux.com This version looks good. Reviewed-by: Srivatsa S. Bhat srivatsa.b...@linux.vnet.ibm.com Thank you very much. Regards, Srivatsa S. Bhat --- arch/powerpc/kernel/smp.c |9 ++--- 1 files changed, 2 insertions(+), 7 deletions(-) diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c index 38b0ba6..7edbd5b 100644 --- a/arch/powerpc/kernel/smp.c +++ b/arch/powerpc/kernel/smp.c @@ -346,13 +346,8 @@ void __init smp_prepare_cpus(unsigned int max_cpus) cpumask_set_cpu(boot_cpuid, cpu_sibling_mask(boot_cpuid)); cpumask_set_cpu(boot_cpuid, cpu_core_mask(boot_cpuid)); -if (smp_ops) -if (smp_ops-probe) -max_cpus = smp_ops-probe(); -else -max_cpus = NR_CPUS; -else -max_cpus = 1; +if (smp_ops smp_ops-probe) +smp_ops-probe(); } void smp_prepare_boot_cpu(void) -- Chen Gang ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[Suggestion] powerpc: xmon: about 'longjmp' related warning.
Hello Maintainers: With allmodconfig and EXTRA_CFLAGS=-W, it reports warnings below: arch/powerpc/xmon/xmon.c:3027:6: warning: variable ‘i’ might be clobbered by ‘longjmp’ or ‘vfork’ [-Wclobbered] arch/powerpc/xmon/xmon.c:3068:6: warning: variable ‘i’ might be clobbered by ‘longjmp’ or ‘vfork’ [-Wclobbered] arch/powerpc/xmon/xmon.c:352:48: warning: argument ‘fromipi’ might be clobbered by ‘longjmp’ or ‘vfork’ [-Wclobbered] Excuse me, I am not quite sure about it whether can cause issue or not. Welcome any members' suggestions or completions for it. Thanks. -- Chen Gang ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 1/2] Powerpc: Add voltage ranges support for T4
Special voltages that can be support by eSDHC of T4 in esdhc node.
Signed-off-by: Haijun Zhang haijun.zh...@freescale.com
Signed-off-by: Anton Vorontsov cbouatmai...@gmail.com
---
Documentation/devicetree/bindings/mmc/fsl-esdhc.txt | 3 +++
arch/powerpc/boot/dts/fsl/t4240si-post.dtsi | 1 +
2 files changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt
b/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt
index bd9be0b..4aeae6e 100644
--- a/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt
+++ b/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt
@@ -19,6 +19,8 @@ Optional properties:
bus-width = 1 property.
- sdhci,auto-cmd12: specifies that a controller can only handle auto
CMD12.
+ - 3300 3300: specifies that eSDHC controller can support voltages ranges
+from 3300 to 3300. This is an optional.
Example:
@@ -29,4 +31,5 @@ sdhci@2e000 {
interrupt-parent = ipic;
/* Filled in by U-Boot */
clock-frequency = 0;
+ voltage-ranges = 3300 3300;
};
diff --git a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
index bd611a9..1ef2d2d 100644
--- a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
@@ -399,6 +399,7 @@
sdhc@114000 {
compatible = fsl,t4240-esdhc, fsl,esdhc;
sdhci,auto-cmd12;
+ voltage-ranges = 1800 1800 3300 3300;
};
/include/ qoriq-i2c-0.dtsi
/include/ qoriq-i2c-1.dtsi
--
1.8.0
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[PATCH 2/2] mmc: esdhc: get voltage from dts file
Add voltage-range support in esdhc of T4, So we can choose
to read voltages from dts file as one optional.
If we can get a valid voltage-range from device node, we use
this voltage as the final voltage support. Else we still read
from capacity or from other provider.
Signed-off-by: Haijun Zhang haijun.zh...@freescale.com
Signed-off-by: Anton Vorontsov cbouatmai...@gmail.com
---
drivers/mmc/host/sdhci-of-esdhc.c | 31 +++
drivers/mmc/host/sdhci.c | 3 +++
include/linux/mmc/sdhci.h | 1 +
3 files changed, 35 insertions(+)
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c
b/drivers/mmc/host/sdhci-of-esdhc.c
index 15039e2..8b4b27a 100644
--- a/drivers/mmc/host/sdhci-of-esdhc.c
+++ b/drivers/mmc/host/sdhci-of-esdhc.c
@@ -262,6 +262,35 @@ static int esdhc_pltfm_bus_width(struct sdhci_host *host,
int width)
return 0;
}
+static void esdhc_get_voltage(struct sdhci_host *host,
+ struct platform_device *pdev)
+{
+ const u32 *voltage_ranges;
+ int num_ranges, i;
+ struct device_node *np;
+ np = pdev-dev.of_node;
+
+ voltage_ranges = of_get_property(np, voltage-ranges, num_ranges);
+ num_ranges = num_ranges / sizeof(*voltage_ranges) / 2;
+ if (!voltage_ranges || !num_ranges) {
+ dev_info(pdev-dev, OF: voltage-ranges unspecified\n);
+ return;
+ }
+
+ for (i = 0; i num_ranges; i++) {
+ const int j = i * 2;
+ u32 mask;
+ mask = mmc_vddrange_to_ocrmask(be32_to_cpu(voltage_ranges[j]),
+ be32_to_cpu(voltage_ranges[j + 1]));
+ if (!mask) {
+ dev_info(pdev-dev,
+ OF: false voltage-ranges specified\n);
+ return;
+ }
+ host-ocr_mask |= mask;
+ }
+}
+
static const struct sdhci_ops sdhci_esdhc_ops = {
.read_l = esdhc_readl,
.read_w = esdhc_readw,
@@ -317,6 +346,8 @@ static int sdhci_esdhc_probe(struct platform_device *pdev)
/* call to generic mmc_of_parse to support additional capabilities */
mmc_of_parse(host-mmc);
+ esdhc_get_voltage(host, pdev);
+
ret = sdhci_add_host(host);
if (ret)
sdhci_pltfm_free(pdev);
diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
index a78bd4f..57541e0 100644
--- a/drivers/mmc/host/sdhci.c
+++ b/drivers/mmc/host/sdhci.c
@@ -3119,6 +3119,9 @@ int sdhci_add_host(struct sdhci_host *host)
SDHCI_MAX_CURRENT_MULTIPLIER;
}
+ if (host-ocr_mask)
+ ocr_avail = host-ocr_mask;
+
mmc-ocr_avail = ocr_avail;
mmc-ocr_avail_sdio = ocr_avail;
if (host-ocr_avail_sdio)
diff --git a/include/linux/mmc/sdhci.h b/include/linux/mmc/sdhci.h
index e3c6a74..3e781b8 100644
--- a/include/linux/mmc/sdhci.h
+++ b/include/linux/mmc/sdhci.h
@@ -171,6 +171,7 @@ struct sdhci_host {
unsigned intocr_avail_sdio; /* OCR bit masks */
unsigned intocr_avail_sd;
unsigned intocr_avail_mmc;
+ u32 ocr_mask; /* available voltages */
wait_queue_head_t buf_ready_int; /* Waitqueue for Buffer Read
Ready interrupt */
unsigned inttuning_done;/* Condition flag set when
CMD19 succeeds */
--
1.8.0
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RE: [PATCH 1/2] Powerpc: Add voltage ranges support for T4
Subject: [PATCH 1/2] Powerpc: Add voltage ranges support for T4
Special voltages that can be support by eSDHC of T4 in esdhc node.
Signed-off-by: Haijun Zhang haijun.zh...@freescale.com
Signed-off-by: Anton Vorontsov cbouatmai...@gmail.com
--- a/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt
+++ b/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt
@@ -19,6 +19,8 @@ Optional properties:
bus-width = 1 property.
- sdhci,auto-cmd12: specifies that a controller can only handle auto
CMD12.
+ - 3300 3300: specifies that eSDHC controller can support voltages
ranges
+from 3300 to 3300. This is an optional.
This is an optional. is an unclear statement.
+++ b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
@@ -399,6 +399,7 @@
sdhc@114000 {
compatible = fsl,t4240-esdhc, fsl,esdhc;
sdhci,auto-cmd12;
+ voltage-ranges = 1800 1800 3300 3300;
This is IMHO incorrect and potentially dangerous.
The T4 silicon will only support 1.8V on SDHC pins per hardware specification.
The Freescale T4240QDS reference board has extra voltage shifters added to
allow 3.3V operation, but that is _not_ a silicon feature. It is a specific
board feature that may or may not translate to other boards, depending on how
SD spec conformant a board builder wants to be.
If the intent is to state that a physical SDHC interface on a board has to be
built to support 3.3V operation to be SD spec conformant for off-the-shelf
cards because a reset would change the signal voltage to 3.3V, then I am not
sure that putting this down as silicon feature without further explanation
about the background anywhere is the right way to go.
IMHO silicon features are really just silicon features and not technically
optional external circuitry additions implied by common use.
Best regards,
Heinz
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[PATCH] Fix a typo in pSeries_lpar_hpte_insert()
Fix a typo in pSeries_lpar_hpte_insert() Signed-off-by: Denis Kirjanov k...@linux-powerpc.org --- arch/powerpc/platforms/pseries/lpar.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/powerpc/platforms/pseries/lpar.c b/arch/powerpc/platforms/pseries/lpar.c index 0da39fe..c4112ed 100644 --- a/arch/powerpc/platforms/pseries/lpar.c +++ b/arch/powerpc/platforms/pseries/lpar.c @@ -136,7 +136,7 @@ static long pSeries_lpar_hpte_insert(unsigned long hpte_group, flags = 0; /* Make pHyp happy */ - if ((rflags _PAGE_NO_CACHE) !(rflags _PAGE_WRITETHRU)) + if ((rflags _PAGE_NO_CACHE) !(rflags _PAGE_WRITETHRU)) hpte_r = ~_PAGE_COHERENT; if (firmware_has_feature(FW_FEATURE_XCMO) !(hpte_r HPTE_R_N)) flags |= H_COALESCE_CAND; -- 1.8.0.2 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v3 00/31] add COMMON_CLK support for PowerPC MPC512x
this series
- fixes several drivers that are used in the MPC512x platform (UART,
SPI, ethernet, PCI, USB, CAN, NAND flash, video capture) in how they
handle clocks (appropriately acquire and setup them, hold references
during use, release clocks after use)
- introduces support for the common clock framework (CCF, COMMON_CLK
Kconfig option) in the PowerPC based MPC512x platform, which brings
device tree based clock lookup as well
although the series does touch several subsystems -- tty (serial), spi,
net (can, fs_enet), mtd (nfc), usb, i2c, media (viu), and dts -- all of
the patches are strictly clock related
it appears most appropriate to take this series through either the clk
or the powerpc trees after it has passed review and other subsystem
maintainers ACKed the clock setup related driver modifications
the series passes 'checkpatch.pl --strict' except for one warning which
cannot get resolved, since that either breaks compilation (the data type
is preset by the clk-provider.h API) or requires a cast which shadows
real mismatches:
WARNING: static const char * array should probably be static const char *
const
#436: FILE: arch/powerpc/platforms/512x/clock-commonclk.c:335:
+static const char *parent_names_mux0[] = {
total: 0 errors, 1 warnings, 0 checks, 845 lines checked
each step in the series was build and run tested (with a display that is
attached to the DIU as well as SPI, with an SPI attached NOR flash, with
multiple UART ports such that one is not the boot console, with EEPROMs
attached to I2C, with an SD card, booting from network)
changes in v3:
- rebase the series against v3.11-rc2
- re-ordered the series to first address all general clock handling
concerns in existing drivers, before introducing common clock support
in the platform's clock driver
- slightly rework the SPI (01/31), UART (02/31), and PSC FIFO (23/31)
clock handling in comparison to v2 which introduced those fixes
(devm_{get,put}_clk() calls, fewer goto labels in error paths)
- fix and improve clock handling (balance allocation and release of
clocks, check for errors during setup) in all of the other drivers
which this series has touched before in naive ways: USB (03/31), NAND
flash (04/31), video capture (05/31), I2C (06/31), ethernet (08/31),
PCI (09/31), CAN (11/31)
- silence a build warning in the ethernet driver (07/31)
- eliminate all PPC_CLOCK references, use 'per' clock names for NAND
flash (25/31) and VIU (26/31) as well
- unbreak CAN operation for the period between introducing common clock
support in the platform's clock driver and introducing common clock
support in the CAN peripheral driver as well as providing clock specs
in the device tree (provide clkdev aliases for SYS and REF)
- improve common clock support for CAN (devm_{get,put}_clk() calls,
check enable() errors, keep a reference to used clocks, disable and
put clocks after use)
- reworded several commit messages to better reflect the kind of change
and because fixes were applied before adding common infrastructure
support
- point to individual numbered patches of the series in the list of
changes for v2 as well
changes in v2:
- cleanup of the UART (02/24) and SPI (01/24) clock handling before the
introduction of common clock support for the platform, as incomplete
clock handling becomes fatal or more dangerous later (which in turn
changes the context of the device tree lookup only followup patch
later)
- reordered the sequence of patches to keep the serial communication
related parts together (UART, SPI, and PSC FIFO changes after common
clock support was introduced, which have become 11-14/24 now)
- updated commit messages for the clock API use cleanup in the serial
communication drivers, updated comments and reworded commit messages
in the core clock driver to expand on the pre-enable workaround and
clkdev registration (09/24)
- keep a reference to the PSC FIFO clock during use instead of looking
up the clock again in the uninit() routine (14/24)
- remove the clkdev.h header file inclusion directive with the removal
of the clkdev registration call (13/24)
Gerhard Sittig (31):
spi: mpc512x: cleanup clock API use
serial: mpc512x: cleanup clock API use
USB: fsl-mph-dr-of: cleanup clock API use
mtd: mpc5121_nfc: cleanup clock API use
[media] fsl-viu: cleanup clock API use
i2c: mpc: cleanup clock API use
fs_enet: silence a build warning (unused variable)
fs_enet: cleanup clock API use
powerpc/fsl-pci: improve clock API use
net: can: mscan: add a comment on reg to idx mapping
net: can: mscan: improve clock API use
powerpc: mpc512x: array decl for MCLK registers in CCM
clk: wrap I/O access for improved portability
dts: mpc512x: prepare for preprocessor support
dts: mpc512x: introduce dt-bindings/clock/ header
dts: mpc512x: add clock related device tree specs
clk: mpc512x: introduce COMMON_CLK for MPC512x
dts: mpc512x: add clock specs for
[PATCH v3 01/31] spi: mpc512x: cleanup clock API use
cleanup the MPC512x SoC's SPI master's use of the clock API
- get, prepare, and enable the MCLK during probe; disable, unprepare and
put the MCLK upon remove; hold a reference to the clock over the
period of use
- fetch MCLK rate (reference) once during probe and slightly reword BCLK
(bitrate) determination to reduce redundancy as well as to not exceed
the maximum text line length
- stick with the PPC_CLOCK 'psc%d_mclk' name for clock lookup, only
switch to a fixed string later after device tree based clock lookup
will have become available
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/spi/spi-mpc512x-psc.c | 52 +++--
1 file changed, 34 insertions(+), 18 deletions(-)
diff --git a/drivers/spi/spi-mpc512x-psc.c b/drivers/spi/spi-mpc512x-psc.c
index 29fce6a..823e5e0 100644
--- a/drivers/spi/spi-mpc512x-psc.c
+++ b/drivers/spi/spi-mpc512x-psc.c
@@ -38,7 +38,8 @@ struct mpc512x_psc_spi {
struct mpc512x_psc_fifo __iomem *fifo;
unsigned int irq;
u8 bits_per_word;
- u32 mclk;
+ struct clk *clk_mclk;
+ u32 mclk_rate;
struct completion txisrdone;
};
@@ -72,6 +73,7 @@ static void mpc512x_psc_spi_activate_cs(struct spi_device
*spi)
struct mpc52xx_psc __iomem *psc = mps-psc;
u32 sicr;
u32 ccr;
+ int speed;
u16 bclkdiv;
sicr = in_be32(psc-sicr);
@@ -95,10 +97,10 @@ static void mpc512x_psc_spi_activate_cs(struct spi_device
*spi)
ccr = in_be32(psc-ccr);
ccr = 0xFF00;
- if (cs-speed_hz)
- bclkdiv = (mps-mclk / cs-speed_hz) - 1;
- else
- bclkdiv = (mps-mclk / 100) - 1;/* default 1MHz */
+ speed = cs-speed_hz;
+ if (!speed)
+ speed = 100;/* default 1MHz */
+ bclkdiv = (mps-mclk_rate / speed) - 1;
ccr |= (((bclkdiv 0xff) 16) | (((bclkdiv 8) 0xff) 8));
out_be32(psc-ccr, ccr);
@@ -386,19 +388,11 @@ static int mpc512x_psc_spi_port_config(struct spi_master
*master,
{
struct mpc52xx_psc __iomem *psc = mps-psc;
struct mpc512x_psc_fifo __iomem *fifo = mps-fifo;
- struct clk *spiclk;
- int ret = 0;
- char name[32];
u32 sicr;
u32 ccr;
+ int speed;
u16 bclkdiv;
- sprintf(name, psc%d_mclk, master-bus_num);
- spiclk = clk_get(master-dev, name);
- clk_enable(spiclk);
- mps-mclk = clk_get_rate(spiclk);
- clk_put(spiclk);
-
/* Reset the PSC into a known state */
out_8(psc-command, MPC52xx_PSC_RST_RX);
out_8(psc-command, MPC52xx_PSC_RST_TX);
@@ -425,7 +419,8 @@ static int mpc512x_psc_spi_port_config(struct spi_master
*master,
ccr = in_be32(psc-ccr);
ccr = 0xFF00;
- bclkdiv = (mps-mclk / 100) - 1;/* default 1MHz */
+ speed = 100;/* default 1MHz */
+ bclkdiv = (mps-mclk_rate / speed) - 1;
ccr |= (((bclkdiv 0xff) 16) | (((bclkdiv 8) 0xff) 8));
out_be32(psc-ccr, ccr);
@@ -445,7 +440,7 @@ static int mpc512x_psc_spi_port_config(struct spi_master
*master,
mps-bits_per_word = 8;
- return ret;
+ return 0;
}
static irqreturn_t mpc512x_psc_spi_isr(int irq, void *dev_id)
@@ -479,6 +474,9 @@ static int mpc512x_psc_spi_do_probe(struct device *dev, u32
regaddr,
struct spi_master *master;
int ret;
void *tempp;
+ int psc_num;
+ char clk_name[16];
+ struct clk *clk;
master = spi_alloc_master(dev, sizeof *mps);
if (master == NULL)
@@ -521,16 +519,32 @@ static int mpc512x_psc_spi_do_probe(struct device *dev,
u32 regaddr,
goto free_master;
init_completion(mps-txisrdone);
+ psc_num = master-bus_num;
+ snprintf(clk_name, sizeof(clk_name), psc%d_mclk, psc_num);
+ clk = devm_clk_get(dev, clk_name);
+ if (IS_ERR(clk))
+ goto free_irq;
+ ret = clk_prepare_enable(clk);
+ if (ret) {
+ devm_clk_put(dev, clk);
+ goto free_irq;
+ }
+ mps-clk_mclk = clk;
+ mps-mclk_rate = clk_get_rate(clk);
+
ret = mpc512x_psc_spi_port_config(master, mps);
if (ret 0)
- goto free_irq;
+ goto free_clock;
ret = spi_register_master(master);
if (ret 0)
- goto free_irq;
+ goto free_clock;
return ret;
+free_clock:
+ clk_disable_unprepare(mps-clk_mclk);
+ devm_clk_put(dev, mps-clk_mclk);
free_irq:
free_irq(mps-irq, mps);
free_master:
@@ -547,6 +561,8 @@ static int mpc512x_psc_spi_do_remove(struct device *dev)
struct mpc512x_psc_spi *mps = spi_master_get_devdata(master);
spi_unregister_master(master);
+ clk_disable_unprepare(mps-clk_mclk);
+ devm_clk_put(dev, mps-clk_mclk);
free_irq(mps-irq, mps);
if (mps-psc)
[PATCH v3 04/31] mtd: mpc5121_nfc: cleanup clock API use
prepare before enable isn't optional, do check for and propagate clock
setup errors, adjust error code paths to correctly balance get/put and
prepare/unprepare and enable/disable, use devm_{get,put}_clk()
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/mtd/nand/mpc5121_nfc.c | 20 +---
1 file changed, 13 insertions(+), 7 deletions(-)
diff --git a/drivers/mtd/nand/mpc5121_nfc.c b/drivers/mtd/nand/mpc5121_nfc.c
index 3c9cdcb..9c0b8fe 100644
--- a/drivers/mtd/nand/mpc5121_nfc.c
+++ b/drivers/mtd/nand/mpc5121_nfc.c
@@ -618,8 +618,8 @@ static void mpc5121_nfc_free(struct device *dev, struct
mtd_info *mtd)
struct mpc5121_nfc_prv *prv = chip-priv;
if (prv-clk) {
- clk_disable(prv-clk);
- clk_put(prv-clk);
+ clk_disable_unprepare(prv-clk);
+ devm_clk_put(dev, prv-clk);
}
if (prv-csreg)
@@ -629,6 +629,7 @@ static void mpc5121_nfc_free(struct device *dev, struct
mtd_info *mtd)
static int mpc5121_nfc_probe(struct platform_device *op)
{
struct device_node *rootnode, *dn = op-dev.of_node;
+ struct clk *clk;
struct device *dev = op-dev;
struct mpc5121_nfc_prv *prv;
struct resource res;
@@ -730,14 +731,19 @@ static int mpc5121_nfc_probe(struct platform_device *op)
of_node_put(rootnode);
/* Enable NFC clock */
- prv-clk = clk_get(dev, nfc_clk);
- if (IS_ERR(prv-clk)) {
+ clk = devm_clk_get(dev, nfc_clk);
+ if (IS_ERR(clk)) {
dev_err(dev, Unable to acquire NFC clock!\n);
- retval = PTR_ERR(prv-clk);
+ retval = PTR_ERR(clk);
goto error;
}
-
- clk_enable(prv-clk);
+ retval = clk_prepare_enable(clk);
+ if (retval) {
+ dev_err(dev, Unable to enable NFC clock!\n);
+ devm_clk_put(dev, clk);
+ goto error;
+ }
+ prv-clk = clk;
/* Reset NAND Flash controller */
nfc_set(mtd, NFC_CONFIG1, NFC_RESET);
--
1.7.10.4
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[PATCH v3 03/31] USB: fsl-mph-dr-of: cleanup clock API use
error check in the clock setup, must prepare clocks before they
can get enabled, unprepare after disable, use devm_{get,put}_clk()
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/usb/host/fsl-mph-dr-of.c | 15 ++-
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
index 11e0b79..5e51384 100644
--- a/drivers/usb/host/fsl-mph-dr-of.c
+++ b/drivers/usb/host/fsl-mph-dr-of.c
@@ -260,6 +260,7 @@ int fsl_usb2_mpc5121_init(struct platform_device *pdev)
{
struct fsl_usb2_platform_data *pdata = pdev-dev.platform_data;
struct clk *clk;
+ int err;
char clk_name[10];
int base, clk_num;
@@ -272,13 +273,17 @@ int fsl_usb2_mpc5121_init(struct platform_device *pdev)
return -ENODEV;
snprintf(clk_name, sizeof(clk_name), usb%d_clk, clk_num);
- clk = clk_get(pdev-dev, clk_name);
+ clk = devm_clk_get(pdev-dev, clk_name);
if (IS_ERR(clk)) {
dev_err(pdev-dev, failed to get clk\n);
return PTR_ERR(clk);
}
-
- clk_enable(clk);
+ err = clk_prepare_enable(clk);
+ if (err) {
+ dev_err(pdev-dev, failed to enable clk\n);
+ devm_clk_put(pdev-dev, clk);
+ return err;
+ }
pdata-clk = clk;
if (pdata-phy_mode == FSL_USB2_PHY_UTMI_WIDE) {
@@ -303,8 +308,8 @@ static void fsl_usb2_mpc5121_exit(struct platform_device
*pdev)
pdata-regs = NULL;
if (pdata-clk) {
- clk_disable(pdata-clk);
- clk_put(pdata-clk);
+ clk_disable_unprepare(pdata-clk);
+ devm_clk_put(pdev-dev, pdata-clk);
}
}
--
1.7.10.4
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[PATCH v3 02/31] serial: mpc512x: cleanup clock API use
cleanup the clock API use of the UART driver which is shared among the
MPC512x and the MPC5200 platforms
- get, prepare, and enable the MCLK during port allocation; disable,
unprepare and put the MCLK upon port release; hold a reference to the
clock over the period of use; check for and propagate enable errors
- fix a buffer overflow for clock names with two digit PSC index numbers
- stick with the PPC_CLOCK 'psc%d_mclk' name for clock lookup, only
switch to a fixed string later after device tree based clock lookup
will have become available
to achieve support for MPC512x which is neutral to MPC5200, the
modification was done as follows
- introduce clock alloc and clock release routines in addition to
the previous clock enable/disable routine in the psc_ops struct
- make the clock allocation a part of the port request (resource
allocation), and make clock release a part of the port release, such
that essential resources get allocated early
- just enable/disable the clock from within the .clock() callback
without any allocation or preparation as the former implementation
did, since this routine is called from within the startup and shutdown
callbacks
- all of the above remains a NOP for the MPC5200 platform (no callbacks
are provided on that platform)
- implementation note: the clock gets enabled upon allocation already
just in case the clock is not only required for bitrate generation but
for register access as well
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/tty/serial/mpc52xx_uart.c | 100 ++---
1 file changed, 83 insertions(+), 17 deletions(-)
diff --git a/drivers/tty/serial/mpc52xx_uart.c
b/drivers/tty/serial/mpc52xx_uart.c
index e1280a2..8f16ed9 100644
--- a/drivers/tty/serial/mpc52xx_uart.c
+++ b/drivers/tty/serial/mpc52xx_uart.c
@@ -107,6 +107,8 @@ struct psc_ops {
unsigned int(*set_baudrate)(struct uart_port *port,
struct ktermios *new,
struct ktermios *old);
+ int (*clock_alloc)(struct uart_port *port);
+ void(*clock_relse)(struct uart_port *port);
int (*clock)(struct uart_port *port, int enable);
int (*fifoc_init)(void);
void(*fifoc_uninit)(void);
@@ -616,31 +618,75 @@ static irqreturn_t mpc512x_psc_handle_irq(struct
uart_port *port)
return IRQ_NONE;
}
-static int mpc512x_psc_clock(struct uart_port *port, int enable)
+static struct clk *psc_mclk_clk[MPC52xx_PSC_MAXNUM];
+
+/* called from within the .request_port() callback (allocation) */
+static int mpc512x_psc_alloc_clock(struct uart_port *port)
{
- struct clk *psc_clk;
int psc_num;
- char clk_name[10];
+ char clk_name[16];
+ struct clk *clk;
+ int err;
+
+ psc_num = (port-mapbase 0xf00) 8;
+ snprintf(clk_name, sizeof(clk_name), psc%d_mclk, psc_num);
+ clk = devm_clk_get(port-dev, clk_name);
+ if (IS_ERR(clk)) {
+ dev_err(port-dev, Failed to get MCLK!\n);
+ return PTR_ERR(clk);
+ }
+ err = clk_prepare_enable(clk);
+ if (err) {
+ dev_err(port-dev, Failed to enable MCLK!\n);
+ devm_clk_put(port-dev, clk);
+ return err;
+ }
+ psc_mclk_clk[psc_num] = clk;
+ return 0;
+}
+
+/* called from within the .release_port() callback (release) */
+static void mpc512x_psc_relse_clock(struct uart_port *port)
+{
+ int psc_num;
+ struct clk *clk;
+
+ psc_num = (port-mapbase 0xf00) 8;
+ clk = psc_mclk_clk[psc_num];
+ if (clk) {
+ clk_disable_unprepare(clk);
+ devm_clk_put(port-dev, clk);
+ psc_mclk_clk[psc_num] = NULL;
+ }
+}
+
+/* implementation of the .clock() callback (enable/disable) */
+static int mpc512x_psc_endis_clock(struct uart_port *port, int enable)
+{
+ int psc_num;
+ struct clk *psc_clk;
+ int ret;
if (uart_console(port))
return 0;
psc_num = (port-mapbase 0xf00) 8;
- snprintf(clk_name, sizeof(clk_name), psc%d_mclk, psc_num);
- psc_clk = clk_get(port-dev, clk_name);
- if (IS_ERR(psc_clk)) {
+ psc_clk = psc_mclk_clk[psc_num];
+ if (!psc_clk) {
dev_err(port-dev, Failed to get PSC clock entry!\n);
return -ENODEV;
}
- dev_dbg(port-dev, %s %sable\n, clk_name, enable ? en : dis);
-
- if (enable)
- clk_enable(psc_clk);
- else
+ dev_dbg(port-dev, mclk %sable\n, enable ? en : dis);
+ if (enable) {
+ ret = clk_enable(psc_clk);
+ if (ret)
+ dev_err(port-dev, Failed to enable MCLK!\n);
+ return ret;
+ } else {
clk_disable(psc_clk);
-
- return 0;
+ return 0;
+ }
}
[PATCH v3 05/31] [media] fsl-viu: cleanup clock API use
prepare clocks before enabling them, check for and propagate enable
errors, balance get/put and prepare/unprepare and enable/disable,
use devm_{get,put}_clk()
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/media/platform/fsl-viu.c | 26 --
1 file changed, 16 insertions(+), 10 deletions(-)
diff --git a/drivers/media/platform/fsl-viu.c b/drivers/media/platform/fsl-viu.c
index 221ec42..48fced4 100644
--- a/drivers/media/platform/fsl-viu.c
+++ b/drivers/media/platform/fsl-viu.c
@@ -1485,6 +1485,7 @@ static int viu_of_probe(struct platform_device *op)
struct viu_reg __iomem *viu_regs;
struct i2c_adapter *ad;
int ret, viu_irq;
+ struct clk *clk;
ret = of_address_to_resource(op-dev.of_node, 0, r);
if (ret) {
@@ -1577,14 +1578,19 @@ static int viu_of_probe(struct platform_device *op)
}
/* enable VIU clock */
- viu_dev-clk = clk_get(op-dev, viu_clk);
- if (IS_ERR(viu_dev-clk)) {
- dev_err(op-dev, failed to find the clock module!\n);
- ret = -ENODEV;
+ clk = devm_clk_get(op-dev, viu_clk);
+ if (IS_ERR(clk)) {
+ dev_err(op-dev, failed to lookup the clock!\n);
+ ret = PTR_ERR(clk);
+ goto err_clk;
+ }
+ ret = clk_prepare_enable(clk);
+ if (ret) {
+ dev_err(op-dev, failed to enable the clock!\n);
+ devm_clk_put(op-dev, clk);
goto err_clk;
- } else {
- clk_enable(viu_dev-clk);
}
+ viu_dev-clk = clk;
/* reset VIU module */
viu_reset(viu_dev-vr);
@@ -1602,8 +1608,8 @@ static int viu_of_probe(struct platform_device *op)
return ret;
err_irq:
- clk_disable(viu_dev-clk);
- clk_put(viu_dev-clk);
+ clk_disable_unprepare(viu_dev-clk);
+ devm_clk_put(op-dev, viu_dev-clk);
err_clk:
video_unregister_device(viu_dev-vdev);
err_vdev:
@@ -1626,8 +1632,8 @@ static int viu_of_remove(struct platform_device *op)
free_irq(dev-irq, (void *)dev);
irq_dispose_mapping(dev-irq);
- clk_disable(dev-clk);
- clk_put(dev-clk);
+ clk_disable_unprepare(dev-clk);
+ devm_clk_put(op-dev, dev-clk);
video_unregister_device(dev-vdev);
i2c_put_adapter(client-adapter);
--
1.7.10.4
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[PATCH v3 06/31] i2c: mpc: cleanup clock API use
make the MPC I2C driver get, prepare and enable the peripheral clock
('per' for access to the peripheral's registers) during probe;
disable, unprepare and put the clock upon remove(); hold a reference
to the clock over the period of use
clock lookup is non-fatal in this implementation as not all platforms
may provide clock specs in their device tree, but enable errors for
specified clocks are considered fatal
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/i2c/busses/i2c-mpc.c | 28
1 file changed, 28 insertions(+)
diff --git a/drivers/i2c/busses/i2c-mpc.c b/drivers/i2c/busses/i2c-mpc.c
index 7607dc0..9e837be 100644
--- a/drivers/i2c/busses/i2c-mpc.c
+++ b/drivers/i2c/busses/i2c-mpc.c
@@ -21,6 +21,7 @@
#include linux/of_i2c.h
#include linux/slab.h
+#include linux/clk.h
#include linux/io.h
#include linux/fsl_devices.h
#include linux/i2c.h
@@ -67,6 +68,7 @@ struct mpc_i2c {
#ifdef CONFIG_PM
u8 fdr, dfsrr;
#endif
+ struct clk *clk_per;
};
struct mpc_i2c_divider {
@@ -623,6 +625,8 @@ static int fsl_i2c_probe(struct platform_device *op)
u32 clock = MPC_I2C_CLOCK_LEGACY;
int result = 0;
int plen;
+ struct clk *clk;
+ int err;
match = of_match_device(mpc_i2c_of_match, op-dev);
if (!match)
@@ -653,6 +657,21 @@ static int fsl_i2c_probe(struct platform_device *op)
}
}
+ /*
+* enable clock for the I2C peripheral (non fatal),
+* keep a reference upon successful allocation
+*/
+ clk = devm_clk_get(op-dev, per);
+ if (!IS_ERR(clk)) {
+ err = clk_prepare_enable(clk);
+ if (err) {
+ dev_err(op-dev, failed to enable clock\n);
+ devm_clk_put(op-dev, clk);
+ } else {
+ i2c-clk_per = clk;
+ }
+ }
+
if (of_get_property(op-dev.of_node, fsl,preserve-clocking, NULL)) {
clock = MPC_I2C_CLOCK_PRESERVE;
} else {
@@ -696,6 +715,10 @@ static int fsl_i2c_probe(struct platform_device *op)
return result;
fail_add:
+ if (i2c-clk_per) {
+ clk_disable_unprepare(i2c-clk_per);
+ devm_clk_put(op-dev, i2c-clk_per);
+ }
free_irq(i2c-irq, i2c);
fail_request:
irq_dispose_mapping(i2c-irq);
@@ -711,6 +734,11 @@ static int fsl_i2c_remove(struct platform_device *op)
i2c_del_adapter(i2c-adap);
+ if (i2c-clk_per) {
+ clk_disable_unprepare(i2c-clk_per);
+ devm_clk_put(op-dev, i2c-clk_per);
+ }
+
if (i2c-irq)
free_irq(i2c-irq, i2c);
--
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[PATCH v3 07/31] fs_enet: silence a build warning (unused variable)
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c |1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c
b/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c
index 8de53a1..c04eb3a 100644
--- a/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c
+++ b/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c
@@ -583,7 +583,6 @@ static struct sk_buff *tx_skb_align_workaround(struct
net_device *dev,
struct sk_buff *skb)
{
struct sk_buff *new_skb;
- struct fs_enet_private *fep = netdev_priv(dev);
/* Alloc new skb */
new_skb = netdev_alloc_skb(dev, skb-len + 4);
--
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[PATCH v3 08/31] fs_enet: cleanup clock API use
make the Freescale ethernet driver get, prepare and enable the FEC clock
during probe(); disable, unprepare and put the clock upon remove(); hold
a reference to the clock over the period of use; use devm_{get,put}_clk()
clock lookup is non-fatal as not all platforms provide clock specs in
their device tree; failure to enable specified clocks is fatal
Signed-off-by: Gerhard Sittig g...@denx.de
---
.../net/ethernet/freescale/fs_enet/fs_enet-main.c | 25
include/linux/fs_enet_pd.h |3 +++
2 files changed, 28 insertions(+)
diff --git a/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c
b/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c
index c04eb3a..1f58f57 100644
--- a/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c
+++ b/drivers/net/ethernet/freescale/fs_enet/fs_enet-main.c
@@ -999,6 +999,8 @@ static int fs_enet_probe(struct platform_device *ofdev)
struct fs_enet_private *fep;
struct fs_platform_info *fpi;
const u32 *data;
+ struct clk *clk;
+ int err;
const u8 *mac_addr;
const char *phy_connection_type;
int privsize, len, ret = -ENODEV;
@@ -1036,6 +1038,21 @@ static int fs_enet_probe(struct platform_device *ofdev)
fpi-use_rmii = 1;
}
+ /* make clock lookup non-fatal (the driver is shared among platforms),
+* but require enable to succeed when a clock was specified/found,
+* keep a reference to the clock upon successful acquisition
+*/
+ clk = devm_clk_get(ofdev-dev, per);
+ if (!IS_ERR(clk)) {
+ err = clk_prepare_enable(clk);
+ if (err) {
+ devm_clk_put(ofdev-dev, clk);
+ ret = err;
+ goto out_free_fpi;
+ }
+ fpi-clk_per = clk;
+ }
+
privsize = sizeof(*fep) +
sizeof(struct sk_buff **) *
(fpi-rx_ring + fpi-tx_ring);
@@ -1107,6 +1124,10 @@ out_free_dev:
free_netdev(ndev);
out_put:
of_node_put(fpi-phy_node);
+ if (fpi-clk_per) {
+ clk_disable_unprepare(fpi-clk_per);
+ devm_clk_put(ofdev-dev, fpi-clk_per);
+ }
out_free_fpi:
kfree(fpi);
return ret;
@@ -1123,6 +1144,10 @@ static int fs_enet_remove(struct platform_device *ofdev)
fep-ops-cleanup_data(ndev);
dev_set_drvdata(fep-dev, NULL);
of_node_put(fep-fpi-phy_node);
+ if (fep-fpi-clk_per) {
+ clk_disable_unprepare(fep-fpi-clk_per);
+ devm_clk_put(ofdev-dev, fep-fpi-clk_per);
+ }
free_netdev(ndev);
return 0;
}
diff --git a/include/linux/fs_enet_pd.h b/include/linux/fs_enet_pd.h
index 51b7934..a978d0d 100644
--- a/include/linux/fs_enet_pd.h
+++ b/include/linux/fs_enet_pd.h
@@ -16,6 +16,7 @@
#ifndef FS_ENET_PD_H
#define FS_ENET_PD_H
+#include linux/clk.h
#include linux/string.h
#include linux/of_mdio.h
#include asm/types.h
@@ -142,6 +143,8 @@ struct fs_platform_info {
int use_rmii; /* use RMII mode */
int has_phy;/* if the network is phy container as well...*/
+
+ struct clk *clk_per;/* 'per' clock for register access */
};
struct fs_mii_fec_platform_info {
u32 irq[32];
--
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[PATCH v3 09/31] powerpc/fsl-pci: improve clock API use
make the Freescale PCI driver get, prepare and enable the PCI clock
during probe()
clock lookup is non-fatal as not all platforms may provide clock specs
in their device tree, but failure to enable specified clocks are fatal
the driver appears to not have a remove() routine, so no reference to
the clock is kept during use, and the clock isn't released (the devm
approach will put the clock, but it won't get disabled or unprepared)
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/sysdev/fsl_pci.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 46ac1dd..5e2f411 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -17,6 +17,8 @@
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
+
+#include linux/clk.h
#include linux/kernel.h
#include linux/pci.h
#include linux/delay.h
@@ -926,12 +928,33 @@ void fsl_pci_assign_primary(void)
static int fsl_pci_probe(struct platform_device *pdev)
{
+ struct clk *clk;
int ret;
struct device_node *node;
#ifdef CONFIG_SWIOTLB
struct pci_controller *hose;
#endif
+ /*
+* clock lookup is non-fatal since the driver is shared among
+* platforms and not all of them provide clocks specs in their
+* device tree, but failure to enable a specified clock is
+* considered fatal
+*/
+ clk = devm_clk_get(pdev-dev, per);
+ if (!IS_ERR(clk)) {
+ ret = clk_prepare_enable(clk);
+ if (ret) {
+ dev_err(dev, Could not enable peripheral clock\n);
+ devm_clk_put(pdev-dev, clk);
+ return ret;
+ }
+ /*
+* TODO where to store the 'clk' reference? there appears
+* to be no remove() routine which undoes what probe() does
+*/
+ }
+
node = pdev-dev.of_node;
ret = fsl_add_bridge(pdev, fsl_pci_primary == node);
--
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[PATCH v3 10/31] net: can: mscan: add a comment on reg to idx mapping
add a comment about the magic of deriving an MSCAN component index from the peripheral's physical address / register offset Signed-off-by: Gerhard Sittig g...@denx.de --- drivers/net/can/mscan/mpc5xxx_can.c |5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/net/can/mscan/mpc5xxx_can.c b/drivers/net/can/mscan/mpc5xxx_can.c index 5b0ee8e..bc422ba 100644 --- a/drivers/net/can/mscan/mpc5xxx_can.c +++ b/drivers/net/can/mscan/mpc5xxx_can.c @@ -148,7 +148,10 @@ static u32 mpc512x_can_get_clock(struct platform_device *ofdev, goto exit_put; } - /* Determine the MSCAN device index from the physical address */ + /* Determine the MSCAN device index from the peripheral's +* physical address. Register address offsets against the +* IMMR base are: 0x1300, 0x1380, 0x2300, 0x2380 +*/ pval = of_get_property(ofdev-dev.of_node, reg, plen); BUG_ON(!pval || plen sizeof(*pval)); clockidx = (*pval 0x80) ? 1 : 0; -- 1.7.10.4 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v3 11/31] net: can: mscan: improve clock API use
the .get_clock() callback is run from probe() and might allocate
resources, introduce a .put_clock() callback that is run from remove()
to undo any allocation activities
use devm_get_clk() upon lookup (for SYS and REF) to have the clocks put
upon driver unload
assume that resources get prepared but not necessarily enabled in the
setup phase, make the open() and close() callbacks of the CAN network
device enable and disable a previously acquired and prepared clock
store pointers to data structures upon successful allocation already
instead of deferral until complete setup, such that subroutines in the
setup sequence may access those data structures as well to track their
resource acquisition
since clock allocation remains optional, the release callback as well as
the enable/disable calls in open/close are optional as well
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/net/can/mscan/mpc5xxx_can.c | 18 --
drivers/net/can/mscan/mscan.c |9 +
drivers/net/can/mscan/mscan.h |2 ++
3 files changed, 23 insertions(+), 6 deletions(-)
diff --git a/drivers/net/can/mscan/mpc5xxx_can.c
b/drivers/net/can/mscan/mpc5xxx_can.c
index bc422ba..e59b3a3 100644
--- a/drivers/net/can/mscan/mpc5xxx_can.c
+++ b/drivers/net/can/mscan/mpc5xxx_can.c
@@ -40,6 +40,7 @@ struct mpc5xxx_can_data {
unsigned int type;
u32 (*get_clock)(struct platform_device *ofdev, const char *clock_name,
int *mscan_clksrc);
+ void (*put_clock)(struct platform_device *ofdev);
};
#ifdef CONFIG_PPC_MPC52xx
@@ -180,7 +181,7 @@ static u32 mpc512x_can_get_clock(struct platform_device
*ofdev,
clockdiv = 1;
if (!clock_name || !strcmp(clock_name, sys)) {
- sys_clk = clk_get(ofdev-dev, sys_clk);
+ sys_clk = devm_clk_get(ofdev-dev, sys_clk);
if (IS_ERR(sys_clk)) {
dev_err(ofdev-dev, couldn't get sys_clk\n);
goto exit_unmap;
@@ -203,7 +204,7 @@ static u32 mpc512x_can_get_clock(struct platform_device
*ofdev,
}
if (clocksrc 0) {
- ref_clk = clk_get(ofdev-dev, ref_clk);
+ ref_clk = devm_clk_get(ofdev-dev, ref_clk);
if (IS_ERR(ref_clk)) {
dev_err(ofdev-dev, couldn't get ref_clk\n);
goto exit_unmap;
@@ -280,6 +281,8 @@ static int mpc5xxx_can_probe(struct platform_device *ofdev)
dev = alloc_mscandev();
if (!dev)
goto exit_dispose_irq;
+ platform_set_drvdata(ofdev, dev);
+ SET_NETDEV_DEV(dev, ofdev-dev);
priv = netdev_priv(dev);
priv-reg_base = base;
@@ -296,8 +299,6 @@ static int mpc5xxx_can_probe(struct platform_device *ofdev)
goto exit_free_mscan;
}
- SET_NETDEV_DEV(dev, ofdev-dev);
-
err = register_mscandev(dev, mscan_clksrc);
if (err) {
dev_err(ofdev-dev, registering %s failed (err=%d)\n,
@@ -305,8 +306,6 @@ static int mpc5xxx_can_probe(struct platform_device *ofdev)
goto exit_free_mscan;
}
- platform_set_drvdata(ofdev, dev);
-
dev_info(ofdev-dev, MSCAN at 0x%p, irq %d, clock %d Hz\n,
priv-reg_base, dev-irq, priv-can.clock.freq);
@@ -324,10 +323,17 @@ exit_unmap_mem:
static int mpc5xxx_can_remove(struct platform_device *ofdev)
{
+ const struct of_device_id *match;
+ const struct mpc5xxx_can_data *data;
struct net_device *dev = platform_get_drvdata(ofdev);
struct mscan_priv *priv = netdev_priv(dev);
+ match = of_match_device(mpc5xxx_can_table, ofdev-dev);
+ data = match ? match-data : NULL;
+
unregister_mscandev(dev);
+ if (data data-put_clock)
+ data-put_clock(ofdev);
iounmap(priv-reg_base);
irq_dispose_mapping(dev-irq);
free_candev(dev);
diff --git a/drivers/net/can/mscan/mscan.c b/drivers/net/can/mscan/mscan.c
index e6b4095..1c08ffe 100644
--- a/drivers/net/can/mscan/mscan.c
+++ b/drivers/net/can/mscan/mscan.c
@@ -573,6 +573,12 @@ static int mscan_open(struct net_device *dev)
struct mscan_priv *priv = netdev_priv(dev);
struct mscan_regs __iomem *regs = priv-reg_base;
+ if (priv-clk_can) {
+ ret = clk_enable(priv-clk_can);
+ if (ret)
+ return ret;
+ }
+
/* common open */
ret = open_candev(dev);
if (ret)
@@ -621,6 +627,9 @@ static int mscan_close(struct net_device *dev)
close_candev(dev);
free_irq(dev-irq, dev);
+ if (priv-clk_can)
+ clk_disable(priv-clk_can);
+
return 0;
}
diff --git a/drivers/net/can/mscan/mscan.h b/drivers/net/can/mscan/mscan.h
index af2ed8b..f32e190 100644
---
[PATCH v3 12/31] powerpc: mpc512x: array decl for MCLK registers in CCM
reword the clock control module's registers declaration such that the
MCLK related registers form an array and get indexed by PSC number
this change is in preparation to COMMON_CLK support for the MPC512x
platform, the changed declaration remains neutral to existing code since
the PSC and MSCAN CCR fields declared here aren't referenced anywhere
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/include/asm/mpc5121.h | 18 ++
1 file changed, 2 insertions(+), 16 deletions(-)
diff --git a/arch/powerpc/include/asm/mpc5121.h
b/arch/powerpc/include/asm/mpc5121.h
index 8ae133e..887d3d6 100644
--- a/arch/powerpc/include/asm/mpc5121.h
+++ b/arch/powerpc/include/asm/mpc5121.h
@@ -32,25 +32,11 @@ struct mpc512x_ccm {
u32 scfr2; /* System Clock Frequency Register 2 */
u32 scfr2s; /* System Clock Frequency Shadow Register 2 */
u32 bcr;/* Bread Crumb Register */
- u32 p0ccr; /* PSC0 Clock Control Register */
- u32 p1ccr; /* PSC1 CCR */
- u32 p2ccr; /* PSC2 CCR */
- u32 p3ccr; /* PSC3 CCR */
- u32 p4ccr; /* PSC4 CCR */
- u32 p5ccr; /* PSC5 CCR */
- u32 p6ccr; /* PSC6 CCR */
- u32 p7ccr; /* PSC7 CCR */
- u32 p8ccr; /* PSC8 CCR */
- u32 p9ccr; /* PSC9 CCR */
- u32 p10ccr; /* PSC10 CCR */
- u32 p11ccr; /* PSC11 CCR */
+ u32 psc_ccr[12];/* PSC Clock Control Registers */
u32 spccr; /* SPDIF Clock Control Register */
u32 cccr; /* CFM Clock Control Register */
u32 dccr; /* DIU Clock Control Register */
- u32 m1ccr; /* MSCAN1 CCR */
- u32 m2ccr; /* MSCAN2 CCR */
- u32 m3ccr; /* MSCAN3 CCR */
- u32 m4ccr; /* MSCAN4 CCR */
+ u32 mscan_ccr[4]; /* MSCAN Clock Control Registers */
u8 res[0x98]; /* Reserved */
};
--
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[PATCH v3 13/31] clk: wrap I/O access for improved portability
the common clock drivers were motivated/initiated by ARM development
and apparently assume little endian peripherals
wrap register/peripherals access in the common code (div, gate, mux)
in preparation of adding COMMON_CLK support for other platforms
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/clk/clk-divider.c|6 +++---
drivers/clk/clk-gate.c |6 +++---
drivers/clk/clk-mux.c|6 +++---
include/linux/clk-provider.h | 17 +
4 files changed, 26 insertions(+), 9 deletions(-)
diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
index 6d55eb2..2c07061 100644
--- a/drivers/clk/clk-divider.c
+++ b/drivers/clk/clk-divider.c
@@ -104,7 +104,7 @@ static unsigned long clk_divider_recalc_rate(struct clk_hw
*hw,
struct clk_divider *divider = to_clk_divider(hw);
unsigned int div, val;
- val = readl(divider-reg) divider-shift;
+ val = clk_readl(divider-reg) divider-shift;
val = div_mask(divider);
div = _get_div(divider, val);
@@ -230,11 +230,11 @@ static int clk_divider_set_rate(struct clk_hw *hw,
unsigned long rate,
if (divider-flags CLK_DIVIDER_HIWORD_MASK) {
val = div_mask(divider) (divider-shift + 16);
} else {
- val = readl(divider-reg);
+ val = clk_readl(divider-reg);
val = ~(div_mask(divider) divider-shift);
}
val |= value divider-shift;
- writel(val, divider-reg);
+ clk_writel(val, divider-reg);
if (divider-lock)
spin_unlock_irqrestore(divider-lock, flags);
diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c
index 790306e..b7fbd96 100644
--- a/drivers/clk/clk-gate.c
+++ b/drivers/clk/clk-gate.c
@@ -58,7 +58,7 @@ static void clk_gate_endisable(struct clk_hw *hw, int enable)
if (set)
reg |= BIT(gate-bit_idx);
} else {
- reg = readl(gate-reg);
+ reg = clk_readl(gate-reg);
if (set)
reg |= BIT(gate-bit_idx);
@@ -66,7 +66,7 @@ static void clk_gate_endisable(struct clk_hw *hw, int enable)
reg = ~BIT(gate-bit_idx);
}
- writel(reg, gate-reg);
+ clk_writel(reg, gate-reg);
if (gate-lock)
spin_unlock_irqrestore(gate-lock, flags);
@@ -89,7 +89,7 @@ static int clk_gate_is_enabled(struct clk_hw *hw)
u32 reg;
struct clk_gate *gate = to_clk_gate(hw);
- reg = readl(gate-reg);
+ reg = clk_readl(gate-reg);
/* if a set bit disables this clk, flip it before masking */
if (gate-flags CLK_GATE_SET_TO_DISABLE)
diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c
index 61c..02ef506 100644
--- a/drivers/clk/clk-mux.c
+++ b/drivers/clk/clk-mux.c
@@ -42,7 +42,7 @@ static u8 clk_mux_get_parent(struct clk_hw *hw)
* OTOH, pmd_trace_clk_mux_ck uses a separate bit for each clock, so
* val = 0x4 really means bit 2, index starts at bit 0
*/
- val = readl(mux-reg) mux-shift;
+ val = clk_readl(mux-reg) mux-shift;
val = mux-mask;
if (mux-table) {
@@ -89,11 +89,11 @@ static int clk_mux_set_parent(struct clk_hw *hw, u8 index)
if (mux-flags CLK_MUX_HIWORD_MASK) {
val = mux-mask (mux-shift + 16);
} else {
- val = readl(mux-reg);
+ val = clk_readl(mux-reg);
val = ~(mux-mask mux-shift);
}
val |= index mux-shift;
- writel(val, mux-reg);
+ clk_writel(val, mux-reg);
if (mux-lock)
spin_unlock_irqrestore(mux-lock, flags);
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index 1ec14a7..c4f7799 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -12,6 +12,7 @@
#define __LINUX_CLK_PROVIDER_H
#include linux/clk.h
+#include linux/io.h
#ifdef CONFIG_COMMON_CLK
@@ -490,5 +491,21 @@ static inline const char *of_clk_get_parent_name(struct
device_node *np,
#define of_clk_init(matches) \
{ while (0); }
#endif /* CONFIG_OF */
+
+/*
+ * wrap access to peripherals in accessor routines
+ * for improved portability across platforms
+ */
+
+static inline u32 clk_readl(u32 __iomem *reg)
+{
+ return readl(reg);
+}
+
+static inline void clk_writel(u32 val, u32 __iomem *reg)
+{
+ writel(val, reg);
+}
+
#endif /* CONFIG_COMMON_CLK */
#endif /* CLK_PROVIDER_H */
--
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[PATCH v3 14/31] dts: mpc512x: prepare for preprocessor support
prepare C preprocessor support when processing MPC512x DTS files
- switch from DTS syntax to CPP syntax for include specs
- create a symlink such that DTS processing can reference includes
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/boot/dts/ac14xx.dts |2 +-
arch/powerpc/boot/dts/include/dt-bindings |1 +
arch/powerpc/boot/dts/mpc5121ads.dts |2 +-
arch/powerpc/boot/dts/pdm360ng.dts|2 +-
4 files changed, 4 insertions(+), 3 deletions(-)
create mode 12 arch/powerpc/boot/dts/include/dt-bindings
diff --git a/arch/powerpc/boot/dts/ac14xx.dts b/arch/powerpc/boot/dts/ac14xx.dts
index a27a460..a543c40 100644
--- a/arch/powerpc/boot/dts/ac14xx.dts
+++ b/arch/powerpc/boot/dts/ac14xx.dts
@@ -10,7 +10,7 @@
*/
-/include/ mpc5121.dtsi
+#include mpc5121.dtsi
/ {
model = ac14xx;
diff --git a/arch/powerpc/boot/dts/include/dt-bindings
b/arch/powerpc/boot/dts/include/dt-bindings
new file mode 12
index 000..08c00e4
--- /dev/null
+++ b/arch/powerpc/boot/dts/include/dt-bindings
@@ -0,0 +1 @@
+../../../../../include/dt-bindings
\ No newline at end of file
diff --git a/arch/powerpc/boot/dts/mpc5121ads.dts
b/arch/powerpc/boot/dts/mpc5121ads.dts
index 7d3cb79..c228a0a 100644
--- a/arch/powerpc/boot/dts/mpc5121ads.dts
+++ b/arch/powerpc/boot/dts/mpc5121ads.dts
@@ -9,7 +9,7 @@
* option) any later version.
*/
-/include/ mpc5121.dtsi
+#include mpc5121.dtsi
/ {
model = mpc5121ads;
diff --git a/arch/powerpc/boot/dts/pdm360ng.dts
b/arch/powerpc/boot/dts/pdm360ng.dts
index 7433740..871c16d 100644
--- a/arch/powerpc/boot/dts/pdm360ng.dts
+++ b/arch/powerpc/boot/dts/pdm360ng.dts
@@ -13,7 +13,7 @@
* option) any later version.
*/
-/include/ mpc5121.dtsi
+#include mpc5121.dtsi
/ {
model = pdm360ng;
--
1.7.10.4
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[PATCH v3 15/31] dts: mpc512x: introduce dt-bindings/clock/ header
introduce a dt-bindings/ header file for MPC512x clocks, providing symbolic identifiers for those SoC clocks which clients will reference from their device tree nodes Signed-off-by: Gerhard Sittig g...@denx.de --- include/dt-bindings/clock/mpc512x-clock.h | 59 + 1 file changed, 59 insertions(+) create mode 100644 include/dt-bindings/clock/mpc512x-clock.h diff --git a/include/dt-bindings/clock/mpc512x-clock.h b/include/dt-bindings/clock/mpc512x-clock.h new file mode 100644 index 000..46c560e --- /dev/null +++ b/include/dt-bindings/clock/mpc512x-clock.h @@ -0,0 +1,59 @@ +/* + * This header provides constants for MPC512x clock specs in DT bindings. + * + * Unfortunately the clock number declaration cannot be an enum but + * needs to be a list of #define directives since when referenced from + * within DTS files they need to get resolved at compile time. + */ + +#ifndef _DT_BINDINGS_CLOCK_MPC512x_CLOCK_H +#define _DT_BINDINGS_CLOCK_MPC512x_CLOCK_H + +#define MPC512x_CLK_DUMMY 0 +#define MPC512x_CLK_REF1 +#define MPC512x_CLK_SYS2 +#define MPC512x_CLK_DIU3 +#define MPC512x_CLK_VIU4 +#define MPC512x_CLK_CSB5 +#define MPC512x_CLK_E300 6 +#define MPC512x_CLK_IPS7 +#define MPC512x_CLK_FEC8 +#define MPC512x_CLK_SATA 9 +#define MPC512x_CLK_PATA 10 +#define MPC512x_CLK_NFC11 +#define MPC512x_CLK_LPC12 +#define MPC512x_CLK_MBX_BUS13 +#define MPC512x_CLK_MBX14 +#define MPC512x_CLK_MBX_3D 15 +#define MPC512x_CLK_AXE16 +#define MPC512x_CLK_USB1 17 +#define MPC512x_CLK_USB2 18 +#define MPC512x_CLK_I2C19 +#define MPC512x_CLK_MSCAN0_MCLK20 +#define MPC512x_CLK_MSCAN1_MCLK21 +#define MPC512x_CLK_MSCAN2_MCLK22 +#define MPC512x_CLK_MSCAN3_MCLK23 +#define MPC512x_CLK_SDHC 24 +#define MPC512x_CLK_PCI25 +#define MPC512x_CLK_PSC_MCLK_IN26 +#define MPC512x_CLK_SPDIF_TX 27 +#define MPC512x_CLK_SPDIF_RX 28 +#define MPC512x_CLK_SPDIF_MCLK 29 +#define MPC512x_CLK_AC97 30 +#define MPC512x_CLK_PSC0_MCLK 31 +#define MPC512x_CLK_PSC1_MCLK 32 +#define MPC512x_CLK_PSC2_MCLK 33 +#define MPC512x_CLK_PSC3_MCLK 34 +#define MPC512x_CLK_PSC4_MCLK 35 +#define MPC512x_CLK_PSC5_MCLK 36 +#define MPC512x_CLK_PSC6_MCLK 37 +#define MPC512x_CLK_PSC7_MCLK 38 +#define MPC512x_CLK_PSC8_MCLK 39 +#define MPC512x_CLK_PSC9_MCLK 40 +#define MPC512x_CLK_PSC10_MCLK 41 +#define MPC512x_CLK_PSC11_MCLK 42 +#define MPC512x_CLK_PSC_FIFO 43 + +#define MPC512x_CLK_LAST_PUBLIC43 + +#endif -- 1.7.10.4 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v3 16/31] dts: mpc512x: add clock related device tree specs
this addresses the clock driver aka provider's side of clocks
- prepare for future 'clks ID' phandle references for device tree
based clock lookup in client drivers
- introduce a 'clocks' subtree with an 'osc' node for the crystal
or oscillator SoC input (fixed frequency)
- provide default values with 33MHz oscillator frequency in the
common include (the 66MHz IPS bus already was there), add
override values for the ifm AC14xx board which deviates from
the reference design (25MHz xtal, 80MHz IPS bus)
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/boot/dts/ac14xx.dts |7 +++
arch/powerpc/boot/dts/mpc5121.dtsi | 15 ++-
2 files changed, 21 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/boot/dts/ac14xx.dts b/arch/powerpc/boot/dts/ac14xx.dts
index a543c40..a1b8837 100644
--- a/arch/powerpc/boot/dts/ac14xx.dts
+++ b/arch/powerpc/boot/dts/ac14xx.dts
@@ -139,7 +139,14 @@
};
};
+ clocks {
+ osc {
+ clock-frequency = 2500;
+ };
+ };
+
soc@8000 {
+ bus-frequency = 8000; /* 80 MHz ips bus */
clock@f00 {
compatible = fsl,mpc5121rev2-clock,
fsl,mpc5121-clock;
diff --git a/arch/powerpc/boot/dts/mpc5121.dtsi
b/arch/powerpc/boot/dts/mpc5121.dtsi
index bd14c00..8f4cba0 100644
--- a/arch/powerpc/boot/dts/mpc5121.dtsi
+++ b/arch/powerpc/boot/dts/mpc5121.dtsi
@@ -9,6 +9,8 @@
* option) any later version.
*/
+#include dt-bindings/clock/mpc512x-clock.h
+
/dts-v1/;
/ {
@@ -73,6 +75,16 @@
ranges = 0x0 0x0 0xfc00 0x0400;
};
+ clocks {
+ #address-cells = 1;
+ #size-cells = 0;
+
+ osc {
+ compatible = fsl,mpc512x-osc, fixed-clock;
+ clock-frequency = 3300;
+ };
+ };
+
soc@8000 {
compatible = fsl,mpc5121-immr;
#address-cells = 1;
@@ -118,9 +130,10 @@
};
/* Clock control */
- clock@f00 {
+ clks: clock@f00 {
compatible = fsl,mpc5121-clock;
reg = 0xf00 0x100;
+ #clock-cells = 1;
};
/* Power Management Controller */
--
1.7.10.4
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[PATCH v3 17/31] clk: mpc512x: introduce COMMON_CLK for MPC512x
this change implements a clock driver for the MPC512x PowerPC platform which follows the COMMON_CLK approach and uses common clock drivers shared with other platforms this driver implements the publicly announced set of clocks (which can get referenced by means of symbolic identifiers from the dt-bindings header file), as well as generates additional 'struct clk' items where the SoC hardware cannot easily get mapped to the common primitives of the clock API, or requires intermediate clock nodes to represent clocks that have both gates and dividers the previous PPC_CLOCK implementation is kept in place and remains in parallel to the common clock implementation for test and comparison during migration, a compile time option picks one of the two alternatives (Kconfig switch, common clock used by default) some of the clock items get pre-enabled in the clock driver to not have them automatically disabled by the underlying clock subsystem because of their being unused -- this approach is desirable because - some of the clocks are useful to have for diagnostics and information despite their not getting claimed by any drivers (CPU, internal and external RAM, internal busses, boot media) - some of the clocks aren't claimed by their peripheral drivers yet, either because of missing driver support or because device tree specs aren't available yet (but the workarounds will get removed as the drivers get adjusted and the device tree provides the clock specs) - some help introduce support for and migrate to the common infrastructure, while more appropriate support for specific hardware constraints isn't available yet (remaining changes are strictly internal to the clock driver and won't affect peripheral drivers) clkdev registration provides alias names for few clock items - to not break those peripheral drivers which encode their component index into the name that is used for clock lookup (UART, SPI, USB) - to not break those drivers which use names for the clock lookup which were encoded in the previous PPC_CLOCK implementation (NFC, VIU, CAN) this workaround will get removed as these drivers get adjusted after device tree based clock lookup has become available Signed-off-by: Gerhard Sittig g...@denx.de --- arch/powerpc/platforms/512x/Kconfig | 14 +- arch/powerpc/platforms/512x/Makefile |4 +- arch/powerpc/platforms/512x/clock-commonclk.c | 786 + include/linux/clk-provider.h | 16 + 4 files changed, 818 insertions(+), 2 deletions(-) create mode 100644 arch/powerpc/platforms/512x/clock-commonclk.c diff --git a/arch/powerpc/platforms/512x/Kconfig b/arch/powerpc/platforms/512x/Kconfig index fc9c1cb..c5fcdd0 100644 --- a/arch/powerpc/platforms/512x/Kconfig +++ b/arch/powerpc/platforms/512x/Kconfig @@ -1,9 +1,21 @@ +config MPC512x_COMMON_CLK + bool MPC512x platform uses COMMON_CLK + default y + depends on PPC_MPC512x + help + This option is only here to support tests and comparison + during development and migration. This option will get + removed after the COMMON_CLK support for MPC512x has become + fully operational and all drivers were adjusted to explicitly + acquire their required clocks. + config PPC_MPC512x bool 512x-based boards depends on 6xx select FSL_SOC select IPIC - select PPC_CLOCK + select PPC_CLOCK if !MPC512x_COMMON_CLK + select COMMON_CLK if MPC512x_COMMON_CLK select PPC_PCI_CHOICE select FSL_PCI if PCI select ARCH_WANT_OPTIONAL_GPIOLIB diff --git a/arch/powerpc/platforms/512x/Makefile b/arch/powerpc/platforms/512x/Makefile index 72fb934..1e05f9d 100644 --- a/arch/powerpc/platforms/512x/Makefile +++ b/arch/powerpc/platforms/512x/Makefile @@ -1,7 +1,9 @@ # # Makefile for the Freescale PowerPC 512x linux kernel. # -obj-y += clock.o mpc512x_shared.o +obj-$(CONFIG_PPC_CLOCK)+= clock.o +obj-$(CONFIG_COMMON_CLK) += clock-commonclk.o +obj-y += mpc512x_shared.o obj-$(CONFIG_MPC5121_ADS) += mpc5121_ads.o mpc5121_ads_cpld.o obj-$(CONFIG_MPC512x_GENERIC) += mpc512x_generic.o obj-$(CONFIG_PDM360NG) += pdm360ng.o diff --git a/arch/powerpc/platforms/512x/clock-commonclk.c b/arch/powerpc/platforms/512x/clock-commonclk.c new file mode 100644 index 000..762ee85 --- /dev/null +++ b/arch/powerpc/platforms/512x/clock-commonclk.c @@ -0,0 +1,786 @@ +/* + * Copyright (C) 2013 DENX Software Engineering + * + * Gerhard Sittig, g...@denx.de + * + * common clock driver support for the MPC512x platform + * + * This is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + */ + +#include linux/clk-provider.h +#include
[PATCH v3 18/31] dts: mpc512x: add clock specs for client lookups
this addresses the client side of device tree based clock lookups
add clock specifiers to the mbx, nfc, mscan, sdhc, i2c, axe, diu, viu,
mdio, fec, usb, pata, psc, psc fifo, and pci nodes in the shared
mpc5121.dtsi include
these specs map 'clock-names' encoded in drivers to their respective
'struct clk' items in the platform's clock driver
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/boot/dts/mpc5121.dtsi | 79
1 file changed, 79 insertions(+)
diff --git a/arch/powerpc/boot/dts/mpc5121.dtsi
b/arch/powerpc/boot/dts/mpc5121.dtsi
index 8f4cba0..3657ae6 100644
--- a/arch/powerpc/boot/dts/mpc5121.dtsi
+++ b/arch/powerpc/boot/dts/mpc5121.dtsi
@@ -51,6 +51,10 @@
compatible = fsl,mpc5121-mbx;
reg = 0x2000 0x4000;
interrupts = 66 0x8;
+ clocks = clks MPC512x_CLK_MBX_BUS,
+clks MPC512x_CLK_MBX_3D,
+clks MPC512x_CLK_MBX;
+ clock-names = mbx-bus, mbx-3d, mbx;
};
sram@3000 {
@@ -64,6 +68,8 @@
interrupts = 6 8;
#address-cells = 1;
#size-cells = 1;
+ clocks = clks MPC512x_CLK_NFC;
+ clock-names = per;
};
localbus@8020 {
@@ -153,12 +159,22 @@
compatible = fsl,mpc5121-mscan;
reg = 0x1300 0x80;
interrupts = 12 0x8;
+ clocks = clks MPC512x_CLK_IPS,
+clks MPC512x_CLK_SYS,
+clks MPC512x_CLK_REF,
+clks MPC512x_CLK_MSCAN0_MCLK;
+ clock-names = ips, sys, ref, mclk;
};
can@1380 {
compatible = fsl,mpc5121-mscan;
reg = 0x1380 0x80;
interrupts = 13 0x8;
+ clocks = clks MPC512x_CLK_IPS,
+clks MPC512x_CLK_SYS,
+clks MPC512x_CLK_REF,
+clks MPC512x_CLK_MSCAN1_MCLK;
+ clock-names = ips, sys, ref, mclk;
};
sdhc@1500 {
@@ -167,6 +183,9 @@
interrupts = 8 0x8;
dmas = dma0 30;
dma-names = rx-tx;
+ clocks = clks MPC512x_CLK_IPS,
+clks MPC512x_CLK_SDHC;
+ clock-names = ipg, per;
};
i2c@1700 {
@@ -175,6 +194,8 @@
compatible = fsl,mpc5121-i2c, fsl-i2c;
reg = 0x1700 0x20;
interrupts = 9 0x8;
+ clocks = clks MPC512x_CLK_I2C;
+ clock-names = per;
};
i2c@1720 {
@@ -183,6 +204,8 @@
compatible = fsl,mpc5121-i2c, fsl-i2c;
reg = 0x1720 0x20;
interrupts = 10 0x8;
+ clocks = clks MPC512x_CLK_I2C;
+ clock-names = per;
};
i2c@1740 {
@@ -191,6 +214,8 @@
compatible = fsl,mpc5121-i2c, fsl-i2c;
reg = 0x1740 0x20;
interrupts = 11 0x8;
+ clocks = clks MPC512x_CLK_I2C;
+ clock-names = per;
};
i2ccontrol@1760 {
@@ -202,30 +227,46 @@
compatible = fsl,mpc5121-axe;
reg = 0x2000 0x100;
interrupts = 42 0x8;
+ clocks = clks MPC512x_CLK_AXE;
+ clock-names = per;
};
display@2100 {
compatible = fsl,mpc5121-diu;
reg = 0x2100 0x100;
interrupts = 64 0x8;
+ clocks = clks MPC512x_CLK_DIU;
+ clock-names = per;
};
can@2300 {
compatible = fsl,mpc5121-mscan;
reg = 0x2300 0x80;
interrupts = 90 0x8;
+ clocks = clks MPC512x_CLK_IPS,
+clks MPC512x_CLK_SYS,
+clks MPC512x_CLK_REF,
+clks MPC512x_CLK_MSCAN2_MCLK;
+ clock-names = ips, sys, ref, mclk;
};
can@2380 {
compatible = fsl,mpc5121-mscan;
reg = 0x2380 0x80;
interrupts = 91 0x8;
+ clocks = clks MPC512x_CLK_IPS,
+clks MPC512x_CLK_SYS,
+clks
[PATCH v3 19/31] clk: mpc512x: don't pre-enable FEC and I2C clocks
after the device tree nodes provide clock specs for client side lookups, peripheral drivers can attach to their clocks and the clock driver need no longer pre-enable those clock items Signed-off-by: Gerhard Sittig g...@denx.de --- arch/powerpc/platforms/512x/clock-commonclk.c |2 -- 1 file changed, 2 deletions(-) diff --git a/arch/powerpc/platforms/512x/clock-commonclk.c b/arch/powerpc/platforms/512x/clock-commonclk.c index 762ee85..8b71ceb 100644 --- a/arch/powerpc/platforms/512x/clock-commonclk.c +++ b/arch/powerpc/platforms/512x/clock-commonclk.c @@ -713,9 +713,7 @@ static void mpc512x_clk_setup_clock_tree(int busfreq) clk_prepare_enable(clks[MPC512x_CLK_PSC_FIFO]); /* some are not yet acquired by their respective drivers */ clk_prepare_enable(clks[MPC512x_CLK_PSC3_MCLK]);/* serial console */ - clk_prepare_enable(clks[MPC512x_CLK_FEC]); /* network, NFS */ clk_prepare_enable(clks[MPC512x_CLK_DIU]); /* display */ - clk_prepare_enable(clks[MPC512x_CLK_I2C]); /* * some have their individual clock subtree with separate clock * items and their individual enable counters, yet share a -- 1.7.10.4 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v3 20/31] spi: mpc512x: remove now obsolete clock lookup name
after device tree based clock lookup became available, the peripheral driver need no longer construct clock names which include the PSC index, remove the psc%d_mclk template and unconditionally use mclk Signed-off-by: Gerhard Sittig g...@denx.de --- drivers/spi/spi-mpc512x-psc.c |6 +- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/drivers/spi/spi-mpc512x-psc.c b/drivers/spi/spi-mpc512x-psc.c index 823e5e0..1a4a983 100644 --- a/drivers/spi/spi-mpc512x-psc.c +++ b/drivers/spi/spi-mpc512x-psc.c @@ -474,8 +474,6 @@ static int mpc512x_psc_spi_do_probe(struct device *dev, u32 regaddr, struct spi_master *master; int ret; void *tempp; - int psc_num; - char clk_name[16]; struct clk *clk; master = spi_alloc_master(dev, sizeof *mps); @@ -519,9 +517,7 @@ static int mpc512x_psc_spi_do_probe(struct device *dev, u32 regaddr, goto free_master; init_completion(mps-txisrdone); - psc_num = master-bus_num; - snprintf(clk_name, sizeof(clk_name), psc%d_mclk, psc_num); - clk = devm_clk_get(dev, clk_name); + clk = devm_clk_get(dev, mclk); if (IS_ERR(clk)) goto free_irq; ret = clk_prepare_enable(clk); -- 1.7.10.4 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v3 21/31] serial: mpc512x: remove now obsolete clock lookup name
after device tree based clock lookup became available, the peripheral
driver need no longer construct clock names which include the PSC index,
remove the psc%d_mclk template and unconditionally use mclk
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/tty/serial/mpc52xx_uart.c |8 +++-
1 file changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/tty/serial/mpc52xx_uart.c
b/drivers/tty/serial/mpc52xx_uart.c
index 8f16ed9..04dc564 100644
--- a/drivers/tty/serial/mpc52xx_uart.c
+++ b/drivers/tty/serial/mpc52xx_uart.c
@@ -623,14 +623,11 @@ static struct clk *psc_mclk_clk[MPC52xx_PSC_MAXNUM];
/* called from within the .request_port() callback (allocation) */
static int mpc512x_psc_alloc_clock(struct uart_port *port)
{
- int psc_num;
- char clk_name[16];
struct clk *clk;
int err;
+ int psc_num;
- psc_num = (port-mapbase 0xf00) 8;
- snprintf(clk_name, sizeof(clk_name), psc%d_mclk, psc_num);
- clk = devm_clk_get(port-dev, clk_name);
+ clk = devm_clk_get(port-dev, mclk);
if (IS_ERR(clk)) {
dev_err(port-dev, Failed to get MCLK!\n);
return PTR_ERR(clk);
@@ -641,6 +638,7 @@ static int mpc512x_psc_alloc_clock(struct uart_port *port)
devm_clk_put(port-dev, clk);
return err;
}
+ psc_num = (port-mapbase 0xf00) 8;
psc_mclk_clk[psc_num] = clk;
return 0;
}
--
1.7.10.4
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[PATCH v3 22/31] clk: mpc512x: remove clkdev registration (uart, spi)
after the UART and SPI peripheral drivers have switched to device tree based clock lookup and no longer construct clock names from their PSC component index, the psc%d_mclk alias names have become obsolete -- remove the corresponding clk_register_clkdev() calls Signed-off-by: Gerhard Sittig g...@denx.de --- arch/powerpc/platforms/512x/clock-commonclk.c | 11 --- 1 file changed, 11 deletions(-) diff --git a/arch/powerpc/platforms/512x/clock-commonclk.c b/arch/powerpc/platforms/512x/clock-commonclk.c index 8b71ceb..a860ded 100644 --- a/arch/powerpc/platforms/512x/clock-commonclk.c +++ b/arch/powerpc/platforms/512x/clock-commonclk.c @@ -529,17 +529,6 @@ static void mpc512x_clk_setup_mclk(struct mclk_setup_data *entry) entry-name_mclk, entry-name_mux1, 1, 1); } - - /* -* without this clock device registration, simple lookups in -* the SPI master initialization and serial port setup will fail -* -* those drivers need to get adjusted to lookup their required -* clocks from device tree specs, and device tree nodes need to -* provide the clock specs, before this clkdev registration -* becomes obsolete -*/ - clk_register_clkdev(clks[clks_idx_pub], entry-name_mclk, NULL); } static void mpc512x_clk_setup_mclks(struct mclk_setup_data *table, size_t count) -- 1.7.10.4 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v3 23/31] serial: mpc512x: setup the PSC FIFO clock as well
prepare and enable the FIFO clock upon PSC FIFO initialization,
check for and propagage errors when enabling the PSC FIFO clock,
disable and unprepare the FIFO clock upon PSC FIFO uninitialization,
remove the pre-enable workaround from the platform's clock driver
devm_{get,put}_clk() doesn't apply here, as the SoC provides a
single FIFO component which is shared among several PSC components,
thus the FIFO isn't associated with a device (while the PSCs are)
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/platforms/512x/clock-commonclk.c |2 --
drivers/tty/serial/mpc52xx_uart.c | 46 +
2 files changed, 40 insertions(+), 8 deletions(-)
diff --git a/arch/powerpc/platforms/512x/clock-commonclk.c
b/arch/powerpc/platforms/512x/clock-commonclk.c
index a860ded..53f772b 100644
--- a/arch/powerpc/platforms/512x/clock-commonclk.c
+++ b/arch/powerpc/platforms/512x/clock-commonclk.c
@@ -698,8 +698,6 @@ static void mpc512x_clk_setup_clock_tree(int busfreq)
clk_prepare_enable(clks[MPC512x_CLK_MEM]); /* SRAM */
clk_prepare_enable(clks[MPC512x_CLK_IPS]); /* SoC periph */
clk_prepare_enable(clks[MPC512x_CLK_LPC]); /* boot media */
- /* some are required yet no dependencies were declared */
- clk_prepare_enable(clks[MPC512x_CLK_PSC_FIFO]);
/* some are not yet acquired by their respective drivers */
clk_prepare_enable(clks[MPC512x_CLK_PSC3_MCLK]);/* serial console */
clk_prepare_enable(clks[MPC512x_CLK_DIU]); /* display */
diff --git a/drivers/tty/serial/mpc52xx_uart.c
b/drivers/tty/serial/mpc52xx_uart.c
index 04dc564..23eef91 100644
--- a/drivers/tty/serial/mpc52xx_uart.c
+++ b/drivers/tty/serial/mpc52xx_uart.c
@@ -421,6 +421,7 @@ struct psc_fifoc {
static struct psc_fifoc __iomem *psc_fifoc;
static unsigned int psc_fifoc_irq;
+static struct clk *psc_fifoc_clk;
static void mpc512x_psc_fifo_init(struct uart_port *port)
{
@@ -568,36 +569,69 @@ static unsigned int mpc512x_psc_set_baudrate(struct
uart_port *port,
/* Init PSC FIFO Controller */
static int __init mpc512x_psc_fifoc_init(void)
{
+ int err;
struct device_node *np;
+ struct clk *clk;
+
+ /* default error code, potentially overwritten by clock calls */
+ err = -ENODEV;
np = of_find_compatible_node(NULL, NULL,
fsl,mpc5121-psc-fifo);
if (!np) {
pr_err(%s: Can't find FIFOC node\n, __func__);
- return -ENODEV;
+ goto out_err;
}
+ clk = of_clk_get_by_name(np, per);
+ if (IS_ERR(clk)) {
+ pr_err(%s: Can't lookup FIFO clock\n, __func__);
+ err = PTR_ERR(clk);
+ goto out_ofnode_put;
+ }
+ if (clk_prepare_enable(clk)) {
+ pr_err(%s: Can't enable FIFO clock\n, __func__);
+ clk_put(clk);
+ goto out_ofnode_put;
+ }
+ psc_fifoc_clk = clk;
+
psc_fifoc = of_iomap(np, 0);
if (!psc_fifoc) {
pr_err(%s: Can't map FIFOC\n, __func__);
- of_node_put(np);
- return -ENODEV;
+ goto out_clk_disable;
}
psc_fifoc_irq = irq_of_parse_and_map(np, 0);
- of_node_put(np);
if (psc_fifoc_irq == 0) {
pr_err(%s: Can't get FIFOC irq\n, __func__);
- iounmap(psc_fifoc);
- return -ENODEV;
+ goto out_unmap;
}
+ of_node_put(np);
return 0;
+
+out_unmap:
+ iounmap(psc_fifoc);
+out_clk_disable:
+ clk_disable_unprepare(psc_fifoc_clk);
+ clk_put(psc_fifoc_clk);
+out_ofnode_put:
+ of_node_put(np);
+out_err:
+ return err;
}
static void __exit mpc512x_psc_fifoc_uninit(void)
{
iounmap(psc_fifoc);
+
+ /* disable the clock, errors are not fatal */
+ if (psc_fifoc_clk) {
+ clk_disable_unprepare(psc_fifoc_clk);
+ clk_put(psc_fifoc_clk);
+ psc_fifoc_clk = NULL;
+ }
}
/* 512x specific interrupt handler. The caller holds the port lock */
--
1.7.10.4
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[PATCH v3 24/31] USB: fsl-mph-dr-of: remove now obsolete clock lookup name
after device tree based clock lookup became available, the peripheral
driver need no longer construct clock names which include the component
index -- remove the usb%d_clk template and unconditionally use per,
remove the clock driver's clkdev registration
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/platforms/512x/clock-commonclk.c |2 --
drivers/usb/host/fsl-mph-dr-of.c | 13 +
2 files changed, 1 insertion(+), 14 deletions(-)
diff --git a/arch/powerpc/platforms/512x/clock-commonclk.c
b/arch/powerpc/platforms/512x/clock-commonclk.c
index 53f772b..d0286a5 100644
--- a/arch/powerpc/platforms/512x/clock-commonclk.c
+++ b/arch/powerpc/platforms/512x/clock-commonclk.c
@@ -678,8 +678,6 @@ static void mpc512x_clk_setup_clock_tree(int busfreq)
clk_register_clkdev(clks[MPC512x_CLK_SYS], sys_clk, NULL);
clk_register_clkdev(clks[MPC512x_CLK_VIU], viu_clk, NULL);
clk_register_clkdev(clks[MPC512x_CLK_NFC], nfc_clk, NULL);
- clk_register_clkdev(clks[MPC512x_CLK_USB1], usb1_clk, NULL);
- clk_register_clkdev(clks[MPC512x_CLK_USB2], usb2_clk, NULL);
pr_debug(clock tree setup complete\n);
freq = clk_get_rate(clks[MPC512x_CLK_E300]);
diff --git a/drivers/usb/host/fsl-mph-dr-of.c b/drivers/usb/host/fsl-mph-dr-of.c
index 5e51384..49c1da8 100644
--- a/drivers/usb/host/fsl-mph-dr-of.c
+++ b/drivers/usb/host/fsl-mph-dr-of.c
@@ -261,19 +261,8 @@ int fsl_usb2_mpc5121_init(struct platform_device *pdev)
struct fsl_usb2_platform_data *pdata = pdev-dev.platform_data;
struct clk *clk;
int err;
- char clk_name[10];
- int base, clk_num;
-
- base = pdev-resource-start 0xf000;
- if (base == 0x3000)
- clk_num = 1;
- else if (base == 0x4000)
- clk_num = 2;
- else
- return -ENODEV;
- snprintf(clk_name, sizeof(clk_name), usb%d_clk, clk_num);
- clk = devm_clk_get(pdev-dev, clk_name);
+ clk = devm_clk_get(pdev-dev, per);
if (IS_ERR(clk)) {
dev_err(pdev-dev, failed to get clk\n);
return PTR_ERR(clk);
--
1.7.10.4
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[PATCH v3 26/31] [media] fsl-viu: remove now obsolete clock lookup name
after device tree based clock lookup became available, the VIU driver
need no longer use the previous viu_clk name but can switch to the
fixed per clock name -- adjust the peripheral driver and remove the
clock driver's clkdev registration
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/platforms/512x/clock-commonclk.c |1 -
drivers/media/platform/fsl-viu.c |2 +-
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/powerpc/platforms/512x/clock-commonclk.c
b/arch/powerpc/platforms/512x/clock-commonclk.c
index 24e1706..f047d4c 100644
--- a/arch/powerpc/platforms/512x/clock-commonclk.c
+++ b/arch/powerpc/platforms/512x/clock-commonclk.c
@@ -676,7 +676,6 @@ static void mpc512x_clk_setup_clock_tree(int busfreq)
/* clkdev registration for compatibility reasons */
clk_register_clkdev(clks[MPC512x_CLK_REF], ref_clk, NULL);
clk_register_clkdev(clks[MPC512x_CLK_SYS], sys_clk, NULL);
- clk_register_clkdev(clks[MPC512x_CLK_VIU], viu_clk, NULL);
pr_debug(clock tree setup complete\n);
freq = clk_get_rate(clks[MPC512x_CLK_E300]);
diff --git a/drivers/media/platform/fsl-viu.c b/drivers/media/platform/fsl-viu.c
index 48fced4..8a17433 100644
--- a/drivers/media/platform/fsl-viu.c
+++ b/drivers/media/platform/fsl-viu.c
@@ -1578,7 +1578,7 @@ static int viu_of_probe(struct platform_device *op)
}
/* enable VIU clock */
- clk = devm_clk_get(op-dev, viu_clk);
+ clk = devm_clk_get(op-dev, per);
if (IS_ERR(clk)) {
dev_err(op-dev, failed to lookup the clock!\n);
ret = PTR_ERR(clk);
--
1.7.10.4
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[PATCH v3 27/31] net: can: mscan: add common clock support for mpc512x
implement a .get_clock() callback for the MPC512x platform which uses
the common clock infrastructure (eliminating direct access to the clock
control registers from within the CAN network driver), and provide the
corresponding .put_clock() callback to release resources after use
keep the previous implementation of MPC512x support in place during
migration, since common clock support is optional
this change is neutral to the MPC5200 platform
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/net/can/mscan/mpc5xxx_can.c | 169 +++
1 file changed, 169 insertions(+)
diff --git a/drivers/net/can/mscan/mpc5xxx_can.c
b/drivers/net/can/mscan/mpc5xxx_can.c
index e59b3a3..4897929 100644
--- a/drivers/net/can/mscan/mpc5xxx_can.c
+++ b/drivers/net/can/mscan/mpc5xxx_can.c
@@ -109,6 +109,167 @@ static u32 mpc52xx_can_get_clock(struct platform_device
*ofdev,
#endif /* CONFIG_PPC_MPC52xx */
#ifdef CONFIG_PPC_MPC512x
+
+#if IS_ENABLED(CONFIG_COMMON_CLK)
+
+static u32 mpc512x_can_get_clock(struct platform_device *ofdev,
+const char *clock_source, int *mscan_clksrc)
+{
+ struct device_node *np;
+ u32 clockdiv;
+ enum {
+ CLK_FROM_AUTO,
+ CLK_FROM_IPS,
+ CLK_FROM_SYS,
+ CLK_FROM_REF,
+ } clk_from;
+ struct clk *clk_in, *clk_can;
+ unsigned long freq_calc;
+ struct mscan_priv *priv;
+
+ /* the caller passed in the clock source spec that was read from
+* the device tree, get the optional clock divider as well
+*/
+ np = ofdev-dev.of_node;
+ clockdiv = 1;
+ of_property_read_u32(np, fsl,mscan-clock-divider, clockdiv);
+ dev_dbg(ofdev-dev, device tree specs: clk src[%s] div[%d]\n,
+ clock_source ? clock_source : NULL, clockdiv);
+
+ /* when clock-source is 'ip', the CANCTL1[CLKSRC] bit needs to
+* get set, and the 'ips' clock is the input to the MSCAN
+* component
+*
+* for clock-source values of 'ref' or 'sys' the CANCTL1[CLKSRC]
+* bit needs to get cleared, an optional clock-divider may have
+* been specified (the default value is 1), the appropriate
+* MSCAN related MCLK is the input to the MSCAN component
+*
+* in the absence of a clock-source spec, first an optimal clock
+* gets determined based on the 'sys' clock, if that fails the
+* 'ref' clock is used
+*/
+ clk_from = CLK_FROM_AUTO;
+ if (clock_source) {
+ /* interpret the device tree's spec for the clock source */
+ if (!strcmp(clock_source, ip))
+ clk_from = CLK_FROM_IPS;
+ else if (!strcmp(clock_source, sys))
+ clk_from = CLK_FROM_SYS;
+ else if (!strcmp(clock_source, ref))
+ clk_from = CLK_FROM_REF;
+ else
+ goto err_invalid;
+ dev_dbg(ofdev-dev, got a clk source spec[%d]\n, clk_from);
+ }
+ if (clk_from == CLK_FROM_AUTO) {
+ /* no spec so far, try the 'sys' clock; round to the
+* next MHz and see if we can get a multiple of 16MHz
+*/
+ dev_dbg(ofdev-dev, no clk source spec, trying SYS\n);
+ clk_in = devm_clk_get(ofdev-dev, sys);
+ if (IS_ERR(clk_in))
+ goto err_notavail;
+ freq_calc = clk_get_rate(clk_in);
+ freq_calc += 49;
+ freq_calc /= 100;
+ freq_calc *= 100;
+ if ((freq_calc % 1600) == 0) {
+ clk_from = CLK_FROM_SYS;
+ clockdiv = freq_calc / 1600;
+ dev_dbg(ofdev-dev,
+ clk fit, sys[%lu] div[%d] freq[%lu]\n,
+ freq_calc, clockdiv, freq_calc / clockdiv);
+ }
+ }
+ if (clk_from == CLK_FROM_AUTO) {
+ /* no spec so far, use the 'ref' clock */
+ dev_dbg(ofdev-dev, no clk source spec, trying REF\n);
+ clk_in = devm_clk_get(ofdev-dev, ref);
+ if (IS_ERR(clk_in))
+ goto err_notavail;
+ clk_from = CLK_FROM_REF;
+ freq_calc = clk_get_rate(clk_in);
+ dev_dbg(ofdev-dev,
+ clk fit, ref[%lu] (no div) freq[%lu]\n,
+ freq_calc, freq_calc);
+ }
+
+ /* select IPS or MCLK as the MSCAN input (returned to the caller),
+* setup the MCLK mux source and rate if applicable, apply the
+* optionally specified or derived above divider, and determine
+* the actual resulting clock rate to return to the caller
+*/
+ switch (clk_from) {
+ case CLK_FROM_IPS:
+ clk_can =
[PATCH v3 28/31] powerpc/mpc512x: improve DIU related clock setup
adapt the DIU clock initialization to the COMMON_CLK approach: device
tree based clock lookup, prepare and unprepare for clocks, work with
frequencies not dividers, call the appropriate clk_*() routines and
don't access CCM registers, remove the pre-enable workaround in the
platform's clock driver
the best clock determination now completely relies on the platform's
clock driver to pick a frequency close to what the caller requests, and
merely checks whether the desired frequency was met (is acceptable since
it meets the tolerance of the monitor) -- this approach shall succeed
upon first try in the usual case, will test a few less desirable yet
acceptable frequencies in edge cases, and will fallback to best effort
if none of the previously tried frequencies pass the test
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/platforms/512x/clock-commonclk.c |1 -
arch/powerpc/platforms/512x/mpc512x_shared.c | 165 +
2 files changed, 88 insertions(+), 78 deletions(-)
diff --git a/arch/powerpc/platforms/512x/clock-commonclk.c
b/arch/powerpc/platforms/512x/clock-commonclk.c
index f047d4c..893fbe5 100644
--- a/arch/powerpc/platforms/512x/clock-commonclk.c
+++ b/arch/powerpc/platforms/512x/clock-commonclk.c
@@ -696,7 +696,6 @@ static void mpc512x_clk_setup_clock_tree(int busfreq)
clk_prepare_enable(clks[MPC512x_CLK_LPC]); /* boot media */
/* some are not yet acquired by their respective drivers */
clk_prepare_enable(clks[MPC512x_CLK_PSC3_MCLK]);/* serial console */
- clk_prepare_enable(clks[MPC512x_CLK_DIU]); /* display */
/*
* some have their individual clock subtree with separate clock
* items and their individual enable counters, yet share a
diff --git a/arch/powerpc/platforms/512x/mpc512x_shared.c
b/arch/powerpc/platforms/512x/mpc512x_shared.c
index a82a41b..3381eea 100644
--- a/arch/powerpc/platforms/512x/mpc512x_shared.c
+++ b/arch/powerpc/platforms/512x/mpc512x_shared.c
@@ -12,6 +12,7 @@
* (at your option) any later version.
*/
+#include linux/clk.h
#include linux/kernel.h
#include linux/io.h
#include linux/irq.h
@@ -70,98 +71,108 @@ struct fsl_diu_shared_fb {
boolin_use;
};
-#define DIU_DIV_MASK 0x00ff
+/* receives a pixel clock spec in pico seconds, adjusts the DIU clock rate */
void mpc512x_set_pixel_clock(unsigned int pixclock)
{
- unsigned long bestval, bestfreq, speed, busfreq;
- unsigned long minpixclock, maxpixclock, pixval;
- struct mpc512x_ccm __iomem *ccm;
struct device_node *np;
- u32 temp;
- long err;
- int i;
+ struct clk *clk_diu;
+ unsigned long epsilon, minpixclock, maxpixclock;
+ unsigned long offset, want, got, delta;
- np = of_find_compatible_node(NULL, NULL, fsl,mpc5121-clock);
+ /* lookup and enable the DIU clock */
+ np = of_find_compatible_node(NULL, NULL, fsl,mpc5121-diu);
if (!np) {
- pr_err(Can't find clock control module.\n);
+ pr_err(Could not find DIU device tree node.\n);
return;
}
-
- ccm = of_iomap(np, 0);
+ clk_diu = of_clk_get_by_name(np, per);
of_node_put(np);
- if (!ccm) {
- pr_err(Can't map clock control module reg.\n);
+ if (IS_ERR(clk_diu)) {
+ pr_err(Could not lookup DIU clock.\n);
return;
}
-
- np = of_find_node_by_type(NULL, cpu);
- if (np) {
- const unsigned int *prop =
- of_get_property(np, bus-frequency, NULL);
-
- of_node_put(np);
- if (prop) {
- busfreq = *prop;
- } else {
- pr_err(Can't get bus-frequency property\n);
- return;
- }
- } else {
- pr_err(Can't find 'cpu' node.\n);
+ if (clk_prepare_enable(clk_diu)) {
+ pr_err(Could not enable DIU clock.\n);
return;
}
- /* Pixel Clock configuration */
- pr_debug(DIU: Bus Frequency = %lu\n, busfreq);
- speed = busfreq * 4; /* DIU_DIV ratio is 4 * CSB_CLK / DIU_CLK */
-
- /* Calculate the pixel clock with the smallest error */
- /* calculate the following in steps to avoid overflow */
- pr_debug(DIU pixclock in ps - %d\n, pixclock);
- temp = (10 / pixclock) * 1000;
- pixclock = temp;
- pr_debug(DIU pixclock freq - %u\n, pixclock);
-
- temp = temp / 20; /* pixclock * 0.05 */
- pr_debug(deviation = %d\n, temp);
- minpixclock = pixclock - temp;
- maxpixclock = pixclock + temp;
- pr_debug(DIU minpixclock - %lu\n, minpixclock);
- pr_debug(DIU maxpixclock - %lu\n, maxpixclock);
- pixval = speed/pixclock;
- pr_debug(DIU pixval = %lu\n, pixval);
-
- err = LONG_MAX;
- bestval = pixval;
-
[PATCH v3 29/31] clk: mpc512x: switch to COMMON_CLK, remove PPC_CLOCK
completely switch to, i.e. unconditionally use COMMON_CLK for the
MPC512x platform, and retire the PPC_CLOCK implementation for that
platform after the transition has completed
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/platforms/512x/Kconfig | 14 +-
arch/powerpc/platforms/512x/Makefile |3 +-
arch/powerpc/platforms/512x/clock.c | 753 --
3 files changed, 2 insertions(+), 768 deletions(-)
delete mode 100644 arch/powerpc/platforms/512x/clock.c
diff --git a/arch/powerpc/platforms/512x/Kconfig
b/arch/powerpc/platforms/512x/Kconfig
index c5fcdd0..5aa3f4b 100644
--- a/arch/powerpc/platforms/512x/Kconfig
+++ b/arch/powerpc/platforms/512x/Kconfig
@@ -1,21 +1,9 @@
-config MPC512x_COMMON_CLK
- bool MPC512x platform uses COMMON_CLK
- default y
- depends on PPC_MPC512x
- help
- This option is only here to support tests and comparison
- during development and migration. This option will get
- removed after the COMMON_CLK support for MPC512x has become
- fully operational and all drivers were adjusted to explicitly
- acquire their required clocks.
-
config PPC_MPC512x
bool 512x-based boards
depends on 6xx
+ select COMMON_CLK
select FSL_SOC
select IPIC
- select PPC_CLOCK if !MPC512x_COMMON_CLK
- select COMMON_CLK if MPC512x_COMMON_CLK
select PPC_PCI_CHOICE
select FSL_PCI if PCI
select ARCH_WANT_OPTIONAL_GPIOLIB
diff --git a/arch/powerpc/platforms/512x/Makefile
b/arch/powerpc/platforms/512x/Makefile
index 1e05f9d..bb20116 100644
--- a/arch/powerpc/platforms/512x/Makefile
+++ b/arch/powerpc/platforms/512x/Makefile
@@ -1,8 +1,7 @@
#
# Makefile for the Freescale PowerPC 512x linux kernel.
#
-obj-$(CONFIG_PPC_CLOCK)+= clock.o
-obj-$(CONFIG_COMMON_CLK) += clock-commonclk.o
+obj-y += clock-commonclk.o
obj-y += mpc512x_shared.o
obj-$(CONFIG_MPC5121_ADS) += mpc5121_ads.o mpc5121_ads_cpld.o
obj-$(CONFIG_MPC512x_GENERIC) += mpc512x_generic.o
diff --git a/arch/powerpc/platforms/512x/clock.c
b/arch/powerpc/platforms/512x/clock.c
deleted file mode 100644
index e504166..000
--- a/arch/powerpc/platforms/512x/clock.c
+++ /dev/null
@@ -1,753 +0,0 @@
-/*
- * Copyright (C) 2007,2008 Freescale Semiconductor, Inc. All rights reserved.
- *
- * Author: John Rigby jri...@freescale.com
- *
- * Implements the clk api defined in include/linux/clk.h
- *
- *Original based on linux/arch/arm/mach-integrator/clock.c
- *
- *Copyright (C) 2004 ARM Limited.
- *Written by Deep Blue Solutions Limited.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
- */
-#include linux/kernel.h
-#include linux/list.h
-#include linux/errno.h
-#include linux/err.h
-#include linux/module.h
-#include linux/string.h
-#include linux/clk.h
-#include linux/mutex.h
-#include linux/io.h
-
-#include linux/of_platform.h
-#include asm/mpc5xxx.h
-#include asm/mpc5121.h
-#include asm/clk_interface.h
-
-#include mpc512x.h
-
-#undef CLK_DEBUG
-
-static int clocks_initialized;
-
-#define CLK_HAS_RATE 0x1 /* has rate in MHz */
-#define CLK_HAS_CTRL 0x2 /* has control reg and bit */
-
-struct clk {
- struct list_head node;
- char name[32];
- int flags;
- struct device *dev;
- unsigned long rate;
- struct module *owner;
- void (*calc) (struct clk *);
- struct clk *parent;
- int reg, bit; /* CLK_HAS_CTRL */
- int div_shift; /* only used by generic_div_clk_calc */
-};
-
-static LIST_HEAD(clocks);
-static DEFINE_MUTEX(clocks_mutex);
-
-static struct clk *mpc5121_clk_get(struct device *dev, const char *id)
-{
- struct clk *p, *clk = ERR_PTR(-ENOENT);
- int dev_match;
- int id_match;
-
- if (dev == NULL || id == NULL)
- return clk;
-
- mutex_lock(clocks_mutex);
- list_for_each_entry(p, clocks, node) {
- dev_match = id_match = 0;
-
- if (dev == p-dev)
- dev_match++;
- if (strcmp(id, p-name) == 0)
- id_match++;
- if ((dev_match || id_match) try_module_get(p-owner)) {
- clk = p;
- break;
- }
- }
- mutex_unlock(clocks_mutex);
-
- return clk;
-}
-
-#ifdef CLK_DEBUG
-static void dump_clocks(void)
-{
- struct clk *p;
-
- mutex_lock(clocks_mutex);
- printk(KERN_INFO CLOCKS:\n);
- list_for_each_entry(p, clocks, node) {
- pr_info( %s=%ld, p-name, p-rate);
- if (p-parent)
- pr_cont( %s=%ld, p-parent-name,
- p-parent-rate);
- if (p-flags
[PATCH v3 25/31] mtd: mpc5121_nfc: remove now obsolete clock lookup name
after device tree based clock lookup became available, the NAND flash
driver need no longer use the previous nfc_clk name but can switch to
the fixed per clock name -- adjust the peripheral driver and remove
the clock driver's clkdev registration
Signed-off-by: Gerhard Sittig g...@denx.de
---
arch/powerpc/platforms/512x/clock-commonclk.c |1 -
drivers/mtd/nand/mpc5121_nfc.c|2 +-
2 files changed, 1 insertion(+), 2 deletions(-)
diff --git a/arch/powerpc/platforms/512x/clock-commonclk.c
b/arch/powerpc/platforms/512x/clock-commonclk.c
index d0286a5..24e1706 100644
--- a/arch/powerpc/platforms/512x/clock-commonclk.c
+++ b/arch/powerpc/platforms/512x/clock-commonclk.c
@@ -677,7 +677,6 @@ static void mpc512x_clk_setup_clock_tree(int busfreq)
clk_register_clkdev(clks[MPC512x_CLK_REF], ref_clk, NULL);
clk_register_clkdev(clks[MPC512x_CLK_SYS], sys_clk, NULL);
clk_register_clkdev(clks[MPC512x_CLK_VIU], viu_clk, NULL);
- clk_register_clkdev(clks[MPC512x_CLK_NFC], nfc_clk, NULL);
pr_debug(clock tree setup complete\n);
freq = clk_get_rate(clks[MPC512x_CLK_E300]);
diff --git a/drivers/mtd/nand/mpc5121_nfc.c b/drivers/mtd/nand/mpc5121_nfc.c
index 9c0b8fe..6a5f851 100644
--- a/drivers/mtd/nand/mpc5121_nfc.c
+++ b/drivers/mtd/nand/mpc5121_nfc.c
@@ -731,7 +731,7 @@ static int mpc5121_nfc_probe(struct platform_device *op)
of_node_put(rootnode);
/* Enable NFC clock */
- clk = devm_clk_get(dev, nfc_clk);
+ clk = devm_clk_get(dev, per);
if (IS_ERR(clk)) {
dev_err(dev, Unable to acquire NFC clock!\n);
retval = PTR_ERR(clk);
--
1.7.10.4
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[PATCH v3 30/31] net: can: mscan: remove non-common_clock code for MPC512x
transition to the common clock framework has completed and the PPC_CLOCK
is no longer available for the MPC512x platform, remove the now obsolete
code path of the mpc5xxx mscan driver which accessed clock control
module registers directly
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/net/can/mscan/mpc5xxx_can.c | 141 ---
1 file changed, 141 deletions(-)
diff --git a/drivers/net/can/mscan/mpc5xxx_can.c
b/drivers/net/can/mscan/mpc5xxx_can.c
index 4897929..dd6bdaa 100644
--- a/drivers/net/can/mscan/mpc5xxx_can.c
+++ b/drivers/net/can/mscan/mpc5xxx_can.c
@@ -109,9 +109,6 @@ static u32 mpc52xx_can_get_clock(struct platform_device
*ofdev,
#endif /* CONFIG_PPC_MPC52xx */
#ifdef CONFIG_PPC_MPC512x
-
-#if IS_ENABLED(CONFIG_COMMON_CLK)
-
static u32 mpc512x_can_get_clock(struct platform_device *ofdev,
const char *clock_source, int *mscan_clksrc)
{
@@ -267,144 +264,6 @@ static void mpc512x_can_put_clock(struct platform_device
*ofdev)
devm_clk_put(ofdev-dev, priv-clk_can);
}
}
-
-#else /* COMMON_CLK */
-
-struct mpc512x_clockctl {
- u32 spmr; /* System PLL Mode Reg */
- u32 sccr[2];/* System Clk Ctrl Reg 1 2 */
- u32 scfr1; /* System Clk Freq Reg 1 */
- u32 scfr2; /* System Clk Freq Reg 2 */
- u32 reserved;
- u32 bcr;/* Bread Crumb Reg */
- u32 pccr[12]; /* PSC Clk Ctrl Reg 0-11 */
- u32 spccr; /* SPDIF Clk Ctrl Reg */
- u32 cccr; /* CFM Clk Ctrl Reg */
- u32 dccr; /* DIU Clk Cnfg Reg */
- u32 mccr[4];/* MSCAN Clk Ctrl Reg 1-3 */
-};
-
-static struct of_device_id mpc512x_clock_ids[] = {
- { .compatible = fsl,mpc5121-clock, },
- {}
-};
-
-static u32 mpc512x_can_get_clock(struct platform_device *ofdev,
-const char *clock_name, int *mscan_clksrc)
-{
- struct mpc512x_clockctl __iomem *clockctl;
- struct device_node *np_clock;
- struct clk *sys_clk, *ref_clk;
- int plen, clockidx, clocksrc = -1;
- u32 sys_freq, val, clockdiv = 1, freq = 0;
- const u32 *pval;
-
- np_clock = of_find_matching_node(NULL, mpc512x_clock_ids);
- if (!np_clock) {
- dev_err(ofdev-dev, couldn't find clock node\n);
- return 0;
- }
- clockctl = of_iomap(np_clock, 0);
- if (!clockctl) {
- dev_err(ofdev-dev, couldn't map clock registers\n);
- goto exit_put;
- }
-
- /* Determine the MSCAN device index from the peripheral's
-* physical address. Register address offsets against the
-* IMMR base are: 0x1300, 0x1380, 0x2300, 0x2380
-*/
- pval = of_get_property(ofdev-dev.of_node, reg, plen);
- BUG_ON(!pval || plen sizeof(*pval));
- clockidx = (*pval 0x80) ? 1 : 0;
- if (*pval 0x2000)
- clockidx += 2;
-
- /*
-* Clock source and divider selection: 3 different clock sources
-* can be selected: ip, ref or sys. For the latter two, a
-* clock divider can be defined as well. If the clock source is
-* not specified by the device tree, we first try to find an
-* optimal CAN source clock based on the system clock. If that
-* is not posslible, the reference clock will be used.
-*/
- if (clock_name !strcmp(clock_name, ip)) {
- *mscan_clksrc = MSCAN_CLKSRC_IPS;
- freq = mpc5xxx_get_bus_frequency(ofdev-dev.of_node);
- } else {
- *mscan_clksrc = MSCAN_CLKSRC_BUS;
-
- pval = of_get_property(ofdev-dev.of_node,
- fsl,mscan-clock-divider, plen);
- if (pval plen == sizeof(*pval))
- clockdiv = *pval;
- if (!clockdiv)
- clockdiv = 1;
-
- if (!clock_name || !strcmp(clock_name, sys)) {
- sys_clk = devm_clk_get(ofdev-dev, sys_clk);
- if (IS_ERR(sys_clk)) {
- dev_err(ofdev-dev, couldn't get sys_clk\n);
- goto exit_unmap;
- }
- /* Get and round up/down sys clock rate */
- sys_freq = 100 *
- ((clk_get_rate(sys_clk) + 49) / 100);
-
- if (!clock_name) {
- /* A multiple of 16 MHz would be optimal */
- if ((sys_freq % 1600) == 0) {
- clocksrc = 0;
- clockdiv = sys_freq / 1600;
- freq = sys_freq / clockdiv;
- }
- } else {
-
[PATCH v3 31/31] clk: mpc512x: remove clkdev registration (sys/ref, header)
remove the last clkdev registration call (sys_clk and ref_clk for mscan), as well as the clkdev header inclusion and the compat registration comment all client lookups for clock items are device tree based now, no compatibility alias names need to get provided any longer Signed-off-by: Gerhard Sittig g...@denx.de --- arch/powerpc/platforms/512x/clock-commonclk.c |5 - 1 file changed, 5 deletions(-) diff --git a/arch/powerpc/platforms/512x/clock-commonclk.c b/arch/powerpc/platforms/512x/clock-commonclk.c index 893fbe5..e9451a7 100644 --- a/arch/powerpc/platforms/512x/clock-commonclk.c +++ b/arch/powerpc/platforms/512x/clock-commonclk.c @@ -12,7 +12,6 @@ */ #include linux/clk-provider.h -#include linux/clkdev.h #include linux/device.h #include linux/errno.h #include linux/io.h @@ -673,10 +672,6 @@ static void mpc512x_clk_setup_clock_tree(int busfreq) /* fixed frequency for AC97, always 24.567MHz */ clks[MPC512x_CLK_AC97] = mpc512x_clk_fixed(ac97, 24567000); - /* clkdev registration for compatibility reasons */ - clk_register_clkdev(clks[MPC512x_CLK_REF], ref_clk, NULL); - clk_register_clkdev(clks[MPC512x_CLK_SYS], sys_clk, NULL); - pr_debug(clock tree setup complete\n); freq = clk_get_rate(clks[MPC512x_CLK_E300]); pr_debug(derived PPC freq [%d]\n, freq); -- 1.7.10.4 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v3 08/31] fs_enet: cleanup clock API use
On 07/22/2013 02:14 PM, Gerhard Sittig wrote:
make the Freescale ethernet driver get, prepare and enable the FEC clock
during probe(); disable, unprepare and put the clock upon remove(); hold
a reference to the clock over the period of use; use devm_{get,put}_clk()
There's no need for devm_clk_put(), devm will take care of this.
Marc
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Re: [PATCH v3 00/31] add COMMON_CLK support for PowerPC MPC512x
[ manually added devicetree at vger now ] On Mon, Jul 22, 2013 at 14:14 +0200, Gerhard Sittig wrote: this series - fixes several drivers that are used in the MPC512x platform (UART, SPI, ethernet, PCI, USB, CAN, NAND flash, video capture) in how they handle clocks (appropriately acquire and setup them, hold references during use, release clocks after use) - introduces support for the common clock framework (CCF, COMMON_CLK Kconfig option) in the PowerPC based MPC512x platform, which brings device tree based clock lookup as well Haven't noticed before that the ozlabs device tree list started actively rejecting reception. And the scope of the series has widened to include clock related fixes in many more drivers while the initial submission only introduced CCF for MPC512x. Shall I resend (with vger devicetree included and more subsystems lists added)? Which other lists to include without spamming too many channels? Poor moderators have to ACK messages for lists that I'm not subscribed to. virtually yours Gerhard Sittig -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr. 5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v3 11/31] net: can: mscan: improve clock API use
On 07/22/2013 02:14 PM, Gerhard Sittig wrote: the .get_clock() callback is run from probe() and might allocate resources, introduce a .put_clock() callback that is run from remove() to undo any allocation activities looks good use devm_get_clk() upon lookup (for SYS and REF) to have the clocks put upon driver unload fine assume that resources get prepared but not necessarily enabled in the setup phase, make the open() and close() callbacks of the CAN network device enable and disable a previously acquired and prepared clock I think you should call prepare_enable and disable_unprepare in the open/close functions. Marc -- Pengutronix e.K. | Marc Kleine-Budde | Industrial Linux Solutions| Phone: +49-231-2826-924 | Vertretung West/Dortmund | Fax: +49-5121-206917- | Amtsgericht Hildesheim, HRA 2686 | http://www.pengutronix.de | signature.asc Description: OpenPGP digital signature ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v3 27/31] net: can: mscan: add common clock support for mpc512x
On 07/22/2013 02:14 PM, Gerhard Sittig wrote:
implement a .get_clock() callback for the MPC512x platform which uses
the common clock infrastructure (eliminating direct access to the clock
control registers from within the CAN network driver), and provide the
corresponding .put_clock() callback to release resources after use
keep the previous implementation of MPC512x support in place during
migration, since common clock support is optional
this change is neutral to the MPC5200 platform
Signed-off-by: Gerhard Sittig g...@denx.de
---
drivers/net/can/mscan/mpc5xxx_can.c | 169
+++
1 file changed, 169 insertions(+)
diff --git a/drivers/net/can/mscan/mpc5xxx_can.c
b/drivers/net/can/mscan/mpc5xxx_can.c
index e59b3a3..4897929 100644
--- a/drivers/net/can/mscan/mpc5xxx_can.c
+++ b/drivers/net/can/mscan/mpc5xxx_can.c
@@ -109,6 +109,167 @@ static u32 mpc52xx_can_get_clock(struct platform_device
*ofdev,
#endif /* CONFIG_PPC_MPC52xx */
#ifdef CONFIG_PPC_MPC512x
+
+#if IS_ENABLED(CONFIG_COMMON_CLK)
+
+static u32 mpc512x_can_get_clock(struct platform_device *ofdev,
+ const char *clock_source, int *mscan_clksrc)
+{
+ struct device_node *np;
+ u32 clockdiv;
+ enum {
+ CLK_FROM_AUTO,
+ CLK_FROM_IPS,
+ CLK_FROM_SYS,
+ CLK_FROM_REF,
+ } clk_from;
+ struct clk *clk_in, *clk_can;
+ unsigned long freq_calc;
+ struct mscan_priv *priv;
+
+ /* the caller passed in the clock source spec that was read from
+ * the device tree, get the optional clock divider as well
+ */
+ np = ofdev-dev.of_node;
+ clockdiv = 1;
+ of_property_read_u32(np, fsl,mscan-clock-divider, clockdiv);
+ dev_dbg(ofdev-dev, device tree specs: clk src[%s] div[%d]\n,
+ clock_source ? clock_source : NULL, clockdiv);
+
+ /* when clock-source is 'ip', the CANCTL1[CLKSRC] bit needs to
+ * get set, and the 'ips' clock is the input to the MSCAN
+ * component
+ *
+ * for clock-source values of 'ref' or 'sys' the CANCTL1[CLKSRC]
+ * bit needs to get cleared, an optional clock-divider may have
+ * been specified (the default value is 1), the appropriate
+ * MSCAN related MCLK is the input to the MSCAN component
+ *
+ * in the absence of a clock-source spec, first an optimal clock
+ * gets determined based on the 'sys' clock, if that fails the
+ * 'ref' clock is used
+ */
+ clk_from = CLK_FROM_AUTO;
+ if (clock_source) {
+ /* interpret the device tree's spec for the clock source */
+ if (!strcmp(clock_source, ip))
+ clk_from = CLK_FROM_IPS;
+ else if (!strcmp(clock_source, sys))
+ clk_from = CLK_FROM_SYS;
+ else if (!strcmp(clock_source, ref))
+ clk_from = CLK_FROM_REF;
+ else
+ goto err_invalid;
+ dev_dbg(ofdev-dev, got a clk source spec[%d]\n, clk_from);
+ }
+ if (clk_from == CLK_FROM_AUTO) {
+ /* no spec so far, try the 'sys' clock; round to the
+ * next MHz and see if we can get a multiple of 16MHz
+ */
+ dev_dbg(ofdev-dev, no clk source spec, trying SYS\n);
+ clk_in = devm_clk_get(ofdev-dev, sys);
+ if (IS_ERR(clk_in))
+ goto err_notavail;
+ freq_calc = clk_get_rate(clk_in);
+ freq_calc += 49;
+ freq_calc /= 100;
+ freq_calc *= 100;
+ if ((freq_calc % 1600) == 0) {
+ clk_from = CLK_FROM_SYS;
+ clockdiv = freq_calc / 1600;
+ dev_dbg(ofdev-dev,
+ clk fit, sys[%lu] div[%d] freq[%lu]\n,
+ freq_calc, clockdiv, freq_calc / clockdiv);
+ }
+ }
+ if (clk_from == CLK_FROM_AUTO) {
+ /* no spec so far, use the 'ref' clock */
+ dev_dbg(ofdev-dev, no clk source spec, trying REF\n);
+ clk_in = devm_clk_get(ofdev-dev, ref);
+ if (IS_ERR(clk_in))
+ goto err_notavail;
+ clk_from = CLK_FROM_REF;
+ freq_calc = clk_get_rate(clk_in);
+ dev_dbg(ofdev-dev,
+ clk fit, ref[%lu] (no div) freq[%lu]\n,
+ freq_calc, freq_calc);
+ }
+
+ /* select IPS or MCLK as the MSCAN input (returned to the caller),
+ * setup the MCLK mux source and rate if applicable, apply the
+ * optionally specified or derived above divider, and determine
+ * the actual resulting clock rate to return to the caller
+ */
+ switch (clk_from) {
+ case CLK_FROM_IPS:
+ clk_can = devm_clk_get(ofdev-dev,
Re: [PATCH v3 01/31] spi: mpc512x: cleanup clock API use
On Mon, Jul 22, 2013 at 02:14:28PM +0200, Gerhard Sittig wrote:
+ ret = clk_prepare_enable(clk);
+ if (ret) {
+ devm_clk_put(dev, clk);
+ goto free_irq;
The main point of the devm_ APIs is to avoid the need for explicit
freeing so you should just remove these puts.
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Re: [PATCH v2] of: Specify initrd location using 64-bit
On Saturday 20 July 2013 01:39 AM, Grant Likely wrote: On Mon, 01 Jul 2013 16:34:26 -0500, Rob Herring robherri...@gmail.com wrote: On 07/01/2013 01:20 PM, Santosh Shilimkar wrote: On some PAE architectures, the entire range of physical memory could reside outside the 32-bit limit. These systems need the ability to specify the initrd location using 64-bit numbers. This patch globally modifies the early_init_dt_setup_initrd_arch() function to use 64-bit numbers instead of the current unsigned long. There has been quite a bit of debate about whether to use u64 or phys_addr_t. It was concluded to stick to u64 to be consistent with rest of the device tree code. As summarized by Geert, The address to load the initrd is decided by the bootloader/user and set at that point later in time. The dtb should not be tied to the kernel you are booting That was quoting me. Otherwise: Acked-by: Rob Herring rob.herr...@calxeda.com Unless Grant feels compelled to pick this up for 3.11, I think it has to wait for 3.12. Nope, 3.12 is fine. Applied. Thanks Grant. Regards, Santosh ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 3/4 V2] mmc: esdhc: Correct host version of T4240-R1.0
On Jul 17, 2013, at 5:11 AM, Haijun Zhang wrote:
Vender version and sdhc spec version of T4240-R1.0 is incorrect.
The right value should be VVN=0x13, SVN = 0x1. The wrong version
number will break down the ADMA data transfer.
This defect only exist in T4240-R1.0. Will be fixed in T4240-R2.0.
Also share vvn and svr for public use.
Signed-off-by: Haijun Zhang haijun.zh...@freescale.com
---
changes for V2:
- Remove broken ADMA quirk.
- Rebuild patch of Add quirks to support T4240 board
drivers/mmc/host/sdhci-of-esdhc.c | 29 +
1 file changed, 13 insertions(+), 16 deletions(-)
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c
b/drivers/mmc/host/sdhci-of-esdhc.c
index adfaadd..570bca8 100644
--- a/drivers/mmc/host/sdhci-of-esdhc.c
+++ b/drivers/mmc/host/sdhci-of-esdhc.c
@@ -26,7 +26,7 @@
#define VENDOR_V_22 0x12
#define VENDOR_V_23 0x13
-static u32 svr;
+static u32 svr, vvn;
static u32 esdhc_readl(struct sdhci_host *host, int reg)
{
@@ -43,11 +43,9 @@ static u32 esdhc_readl(struct sdhci_host *host, int reg)
* For FSL eSDHC, must aligned 4-byte, so use 0xFC to read the
* the verdor version number, oxFE is SDHCI_HOST_VERSION.
*/
- if ((reg == SDHCI_CAPABILITIES) (ret SDHCI_CAN_DO_ADMA1)) {
- u32 tmp = in_be32(host-ioaddr + SDHCI_SLOT_INT_STATUS);
- tmp = (tmp SDHCI_VENDOR_VER_MASK) SDHCI_VENDOR_VER_SHIFT;
- if (tmp VENDOR_V_22)
- ret |= SDHCI_CAN_DO_ADMA2;
+ if ((reg == SDHCI_CAPABILITIES) (ret SDHCI_CAN_DO_ADMA1)
+ (vvn VENDOR_V_22)) {
+ ret |= SDHCI_CAN_DO_ADMA2;
}
return ret;
@@ -63,6 +61,12 @@ static u16 esdhc_readw(struct sdhci_host *host, int reg)
ret = in_be32(host-ioaddr + base) 0x;
else
ret = (in_be32(host-ioaddr + base) shift) 0x;
+
+ /* T4240-R1.0 had a incorrect vendor version and spec version */
+ if ((reg == SDHCI_HOST_VERSION)
+ ((SVR_SOC_VER(svr) == SVR_T4240) (SVR_REV(svr) == 0x10)))
+ ret = (VENDOR_V_23 SDHCI_VENDOR_VER_SHIFT) | SDHCI_SPEC_200;
+
is this check correct if this is on v2.0 Si as well?
- k
return ret;
}
@@ -175,17 +179,12 @@ static void esdhc_reset(struct sdhci_host *host, u8
mask)
*/
static void esdhci_of_adma_workaround(struct sdhci_host *host, u32 intmask)
{
- u32 tmp;
bool applicable;
dma_addr_t dmastart;
dma_addr_t dmanow;
- tmp = esdhc_readl(host, SDHCI_SLOT_INT_STATUS);
- tmp = (tmp SDHCI_VENDOR_VER_MASK) SDHCI_VENDOR_VER_SHIFT;
-
applicable = (intmask SDHCI_INT_DATA_END)
- (intmask SDHCI_INT_BLK_GAP)
- (tmp == VENDOR_V_23);
+ (intmask SDHCI_INT_BLK_GAP) (vvn == VENDOR_V_23);
if (applicable) {
esdhc_reset(host, SDHCI_RESET_DATA);
@@ -318,10 +317,9 @@ static void esdhc_of_resume(struct sdhci_host *host)
static void esdhc_of_platform_init(struct sdhci_host *host)
{
- u32 vvn;
+ svr = mfspr(SPRN_SVR);
+ vvn = esdhc_readw(host, SDHCI_HOST_VERSION);
- vvn = in_be32(host-ioaddr + SDHCI_SLOT_INT_STATUS);
- vvn = (vvn SDHCI_VENDOR_VER_MASK) SDHCI_VENDOR_VER_SHIFT;
if (vvn == VENDOR_V_22)
host-quirks2 |= SDHCI_QUIRK2_HOST_NO_CMD23;
@@ -390,7 +388,6 @@ static int sdhci_esdhc_probe(struct platform_device *pdev)
struct device_node *np;
int ret;
- svr = mfspr(SPRN_SVR);
host = sdhci_pltfm_init(pdev, sdhci_esdhc_pdata, 0);
if (IS_ERR(host))
return PTR_ERR(host);
--
1.8.0
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Re: [PATCH 1/2] powerpc: split the math emulation into two parts
On Jul 16, 2013, at 6:57 AM, Kevin Hao wrote: For some SoC (such as the FSL BookE) even though there does have a hardware FPU, but not all floating point instructions are implemented. Unfortunately some versions of gcc do use these unimplemented instructions. Then we have to enable the math emulation to workaround this issue. It seems a little redundant to have the support to emulate all the floating point instructions in this case. So split the math emulation into two parts. One is for the SoC which doesn't have FPU at all and the other for the SoC which does have the hardware FPU and only need some special floating point instructions to be emulated. Signed-off-by: Kevin Hao haoke...@gmail.com --- arch/powerpc/Kconfig | 20 arch/powerpc/math-emu/Makefile | 24 arch/powerpc/math-emu/math.c | 20 ++-- 3 files changed, 46 insertions(+), 18 deletions(-) why make the split, what harm is there in just turning on the full emulation code to handle the unimplemented cases? who says what some other implementation doesn't need something that you have in CONFIG_MATH_EMULATION_FULL? Is the kernel code size really an issue? - k ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] Fix a typo in pSeries_lpar_hpte_insert()
Denis Kirjanov k...@linux-powerpc.org writes: Fix a typo in pSeries_lpar_hpte_insert() Signed-off-by: Denis Kirjanov k...@linux-powerpc.org looks good Reviewed-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com We may want to add the commit that introduced the change ? 801eb73f45371accc78ca9d6d22d647eeb722c11 --- arch/powerpc/platforms/pseries/lpar.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/powerpc/platforms/pseries/lpar.c b/arch/powerpc/platforms/pseries/lpar.c index 0da39fe..c4112ed 100644 --- a/arch/powerpc/platforms/pseries/lpar.c +++ b/arch/powerpc/platforms/pseries/lpar.c @@ -136,7 +136,7 @@ static long pSeries_lpar_hpte_insert(unsigned long hpte_group, flags = 0; /* Make pHyp happy */ - if ((rflags _PAGE_NO_CACHE) !(rflags _PAGE_WRITETHRU)) + if ((rflags _PAGE_NO_CACHE) !(rflags _PAGE_WRITETHRU)) hpte_r = ~_PAGE_COHERENT; if (firmware_has_feature(FW_FEATURE_XCMO) !(hpte_r HPTE_R_N)) flags |= H_COALESCE_CAND; -- 1.8.0.2 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 1/2] Powerpc: Add voltage ranges support for T4
On Jul 22, 2013, at 4:47 AM, Wrobel Heinz-R39252 wrote:
Subject: [PATCH 1/2] Powerpc: Add voltage ranges support for T4
Special voltages that can be support by eSDHC of T4 in esdhc node.
Signed-off-by: Haijun Zhang haijun.zh...@freescale.com
Signed-off-by: Anton Vorontsov cbouatmai...@gmail.com
--- a/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt
+++ b/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt
@@ -19,6 +19,8 @@ Optional properties:
bus-width = 1 property.
- sdhci,auto-cmd12: specifies that a controller can only handle auto
CMD12.
+ - 3300 3300: specifies that eSDHC controller can support voltages
ranges
+from 3300 to 3300. This is an optional.
This is an optional. is an unclear statement.
+++ b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
@@ -399,6 +399,7 @@
sdhc@114000 {
compatible = fsl,t4240-esdhc, fsl,esdhc;
sdhci,auto-cmd12;
+voltage-ranges = 1800 1800 3300 3300;
This is IMHO incorrect and potentially dangerous.
The T4 silicon will only support 1.8V on SDHC pins per hardware specification.
The Freescale T4240QDS reference board has extra voltage shifters added to
allow 3.3V operation, but that is _not_ a silicon feature. It is a specific
board feature that may or may not translate to other boards, depending on how
SD spec conformant a board builder wants to be.
If the intent is to state that a physical SDHC interface on a board has to be
built to support 3.3V operation to be SD spec conformant for off-the-shelf
cards because a reset would change the signal voltage to 3.3V, then I am not
sure that putting this down as silicon feature without further explanation
about the background anywhere is the right way to go.
IMHO silicon features are really just silicon features and not technically
optional external circuitry additions implied by common use.
Best regards,
Heinz
I'd say that the t4240si-post.dtsi should be:
voltage-ranges = 1800 1800;
Than have the t4240qds.dts do:
voltage-ranges = 1800 1800 3300 3300;
As the 3.3V sounds like a board specific feature.
[ send this as 2 patches, on for the t4240si-post.dtsi and another for the
t4240qds.dts ]
- k
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Re: [PATCH] powerpc/msi: Fix compile error on mpc83xx
On 07/21/2013 09:00:51 PM, Jia Hongtao-B38951 wrote: Hi Scott, The fsl_msi.c build error on MPC83xx platform is fixed by this patch. Could you please have a review? Thanks. -Hongtao I will apply it when I apply the patch that depends on it. I hope to resume applying patches soon. -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 1/2] powerpc: split the math emulation into two parts
On 07/22/2013 09:36:05 AM, Kumar Gala wrote: On Jul 16, 2013, at 6:57 AM, Kevin Hao wrote: For some SoC (such as the FSL BookE) even though there does have a hardware FPU, but not all floating point instructions are implemented. Unfortunately some versions of gcc do use these unimplemented instructions. Then we have to enable the math emulation to workaround this issue. It seems a little redundant to have the support to emulate all the floating point instructions in this case. So split the math emulation into two parts. One is for the SoC which doesn't have FPU at all and the other for the SoC which does have the hardware FPU and only need some special floating point instructions to be emulated. Signed-off-by: Kevin Hao haoke...@gmail.com --- arch/powerpc/Kconfig | 20 arch/powerpc/math-emu/Makefile | 24 arch/powerpc/math-emu/math.c | 20 ++-- 3 files changed, 46 insertions(+), 18 deletions(-) why make the split, what harm is there in just turning on the full emulation code to handle the unimplemented cases? My main motivation in requesting it was to contain the increase in build time -- math-emu always stuck out to me as something that took a noticeable amount of time to build. It also reduces the increase in kernel image size. who says what some other implementation doesn't need something that you have in CONFIG_MATH_EMULATION_FULL? The point is to include any instructions that are known to be missing in any chip's FPU (excluding chips that don't have an FPU at all). If it is discovered that some chip is missing an instruction that we didn't account for, then we'd move that instruction from one list to the other. Is the kernel code size really an issue? It can be when you're storing it on flash -- especially when the growth is out of control because of the need to justify pruning low-hanging fruit such as this. -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v2] of: Specify initrd location using 64-bit
On 14:20 Mon 01 Jul , Santosh Shilimkar wrote:
On some PAE architectures, the entire range of physical memory could reside
outside the 32-bit limit. These systems need the ability to specify the
initrd location using 64-bit numbers.
This patch globally modifies the early_init_dt_setup_initrd_arch() function to
use 64-bit numbers instead of the current unsigned long.
There has been quite a bit of debate about whether to use u64 or phys_addr_t.
It was concluded to stick to u64 to be consistent with rest of the device
tree code. As summarized by Geert, The address to load the initrd is decided
by the bootloader/user and set at that point later in time. The dtb should not
be tied to the kernel you are booting
More details on the discussion can be found here:
https://lkml.org/lkml/2013/6/20/690
https://lkml.org/lkml/2012/9/13/544
Cc: Grant Likely grant.lik...@linaro.org
Cc: Rob Herring rob.herr...@calxeda.com
Cc: Geert Uytterhoeven ge...@linux-m68k.org
Cc: Sebastian Andrzej Siewior bige...@linutronix.de
Cc: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
Cc: Vineet Gupta vgu...@synopsys.com
Cc: Russell King li...@arm.linux.org.uk
Cc: Catalin Marinas catalin.mari...@arm.com
Cc: Will Deacon will.dea...@arm.com
Cc: Mark Salter msal...@redhat.com
Cc: Aurelien Jacquiot a-jacqu...@ti.com
Cc: James Hogan james.ho...@imgtec.com
Cc: Michal Simek mon...@monstr.eu
Cc: Ralf Baechle r...@linux-mips.org
Cc: Jonas Bonn jo...@southpole.se
Cc: Benjamin Herrenschmidt b...@kernel.crashing.org
Cc: Paul Mackerras pau...@samba.org
Cc: x...@kernel.org
Cc: a...@kernel.org
Cc: Chris Zankel ch...@zankel.net
Cc: Max Filippov jcmvb...@gmail.com
Cc: bige...@linutronix.de
Cc: robherri...@gmail.com
Cc: Nicolas Pitre nicolas.pi...@linaro.org
Acked-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
Cc: linux-arm-ker...@lists.infradead.org
Cc: linux-c6x-...@linux-c6x.org
Cc: linux-m...@linux-mips.org
Cc: linuxppc-dev@lists.ozlabs.org
Cc: linux-xte...@linux-xtensa.org
Cc: devicetree-disc...@lists.ozlabs.org
Signed-off-by: Santosh Shilimkar santosh.shilim...@ti.com
---
arch/arc/mm/init.c|5 ++---
arch/arm/mm/init.c|2 +-
arch/arm64/mm/init.c |3 +--
arch/c6x/kernel/devicetree.c |3 +--
arch/metag/mm/init.c |5 ++---
arch/microblaze/kernel/prom.c |3 +--
arch/mips/kernel/prom.c |3 +--
arch/openrisc/kernel/prom.c |3 +--
arch/powerpc/kernel/prom.c|3 +--
arch/x86/kernel/devicetree.c |3 +--
arch/xtensa/kernel/setup.c|3 +--
drivers/of/fdt.c | 10 ++
include/linux/of_fdt.h|3 +--
13 files changed, 20 insertions(+), 29 deletions(-)
diff --git a/arch/arc/mm/init.c b/arch/arc/mm/init.c
index 4a17736..7991e08 100644
--- a/arch/arc/mm/init.c
+++ b/arch/arc/mm/init.c
@@ -157,9 +157,8 @@ void __init free_initrd_mem(unsigned long start, unsigned
long end)
#endif
#ifdef CONFIG_OF_FLATTREE
-void __init early_init_dt_setup_initrd_arch(unsigned long start,
- unsigned long end)
+void __init early_init_dt_setup_initrd_arch(u64 start, u64 end)
{
- pr_err(%s(%lx, %lx)\n, __func__, start, end);
+ pr_err(%s(%llx, %llx)\n, __func__, start, end);
}
#endif /* CONFIG_OF_FLATTREE */
diff --git a/arch/arm/mm/init.c b/arch/arm/mm/init.c
index 9a5cdc0..afeaef7 100644
--- a/arch/arm/mm/init.c
+++ b/arch/arm/mm/init.c
@@ -76,7 +76,7 @@ static int __init parse_tag_initrd2(const struct tag *tag)
__tagtable(ATAG_INITRD2, parse_tag_initrd2);
#ifdef CONFIG_OF_FLATTREE
-void __init early_init_dt_setup_initrd_arch(unsigned long start, unsigned
long end)
+void __init early_init_dt_setup_initrd_arch(u64 start, u64 end)
{
phys_initrd_start = start;
phys_initrd_size = end - start;
diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
index f497ca7..7047708 100644
--- a/arch/arm64/mm/init.c
+++ b/arch/arm64/mm/init.c
@@ -44,8 +44,7 @@ static unsigned long phys_initrd_size __initdata = 0;
phys_addr_t memstart_addr __read_mostly = 0;
-void __init early_init_dt_setup_initrd_arch(unsigned long start,
- unsigned long end)
+void __init early_init_dt_setup_initrd_arch(u64 start, u64 end)
{
phys_initrd_start = start;
phys_initrd_size = end - start;
diff --git a/arch/c6x/kernel/devicetree.c b/arch/c6x/kernel/devicetree.c
index bdb56f0..287d0e6 100644
--- a/arch/c6x/kernel/devicetree.c
+++ b/arch/c6x/kernel/devicetree.c
@@ -33,8 +33,7 @@ void __init early_init_devtree(void *params)
#ifdef CONFIG_BLK_DEV_INITRD
-void __init early_init_dt_setup_initrd_arch(unsigned long start,
- unsigned long end)
+void __init early_init_dt_setup_initrd_arch(u64 start, u64 end)
{
initrd_start = (unsigned long)__va(start);
initrd_end = (unsigned long)__va(end);
Re: [PATCH 2/2] mmc: esdhc: get voltage from dts file
On 07/22/2013 02:53:56 AM, Haijun Zhang wrote:
Add voltage-range support in esdhc of T4, So we can choose
to read voltages from dts file as one optional.
If we can get a valid voltage-range from device node, we use
this voltage as the final voltage support. Else we still read
from capacity or from other provider.
Signed-off-by: Haijun Zhang haijun.zh...@freescale.com
Signed-off-by: Anton Vorontsov cbouatmai...@gmail.com
---
drivers/mmc/host/sdhci-of-esdhc.c | 31
+++
drivers/mmc/host/sdhci.c | 3 +++
include/linux/mmc/sdhci.h | 1 +
3 files changed, 35 insertions(+)
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c
b/drivers/mmc/host/sdhci-of-esdhc.c
index 15039e2..8b4b27a 100644
--- a/drivers/mmc/host/sdhci-of-esdhc.c
+++ b/drivers/mmc/host/sdhci-of-esdhc.c
@@ -262,6 +262,35 @@ static int esdhc_pltfm_bus_width(struct
sdhci_host *host, int width)
return 0;
}
+static void esdhc_get_voltage(struct sdhci_host *host,
+ struct platform_device *pdev)
+{
+ const u32 *voltage_ranges;
+ int num_ranges, i;
+ struct device_node *np;
+ np = pdev-dev.of_node;
+
+ voltage_ranges = of_get_property(np, voltage-ranges,
num_ranges);
+ num_ranges = num_ranges / sizeof(*voltage_ranges) / 2;
+ if (!voltage_ranges || !num_ranges) {
+ dev_info(pdev-dev, OF: voltage-ranges
unspecified\n);
+ return;
+ }
+
+ for (i = 0; i num_ranges; i++) {
+ const int j = i * 2;
+ u32 mask;
+ mask =
mmc_vddrange_to_ocrmask(be32_to_cpu(voltage_ranges[j]),
+ be32_to_cpu(voltage_ranges[j + 1]));
+ if (!mask) {
+ dev_info(pdev-dev,
+ OF: false voltage-ranges specified\n);
+ return;
+ }
+ host-ocr_mask |= mask;
+ }
+}
Don't duplicate this code. Move it somewhere common and share it.
Why did you remove the range index from the error string, and why did
you change it from dev_err to dev_info?
-Scott
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Re: [PATCH v4 1/3] DMA: Freescale: revise device tree binding document
On 07/22/2013 12:55:38 AM, hongbo.zh...@freescale.com wrote: From: Hongbo Zhang hongbo.zh...@freescale.com This updates the discription of each type of DMA controller and its channels, it is preparation for adding another new DMA controller binding, also fixes some defects of indent for text alignment at the same time. Signed-off-by: Hongbo Zhang hongbo.zh...@freescale.com --- .../devicetree/bindings/powerpc/fsl/dma.txt| 56 +++- 1 file changed, 30 insertions(+), 26 deletions(-) diff --git a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt index 2a4b4bc..0650171 100644 --- a/Documentation/devicetree/bindings/powerpc/fsl/dma.txt +++ b/Documentation/devicetree/bindings/powerpc/fsl/dma.txt @@ -1,33 +1,33 @@ -* Freescale 83xx DMA Controller +* Freescale DMA Controllers -Freescale PowerPC 83xx have on chip general purpose DMA controllers. +** Freescale ELO DMA Controller + This is a little-endian DMA controller. + Used in Freescale PowerPC 83xx series, such as: + mpc8313, mpc8315, mpc8323, mpc8347, mpc8349, mpc8360, mpc8377, mpc8378, mpc8379. You don't need to list every single chip... What happens when new chips come out (not so likely with mpc83xx, but more likely for eloplus/elo3)? Do we keep updating this, or have a list that looks complete but isn't? My point in suggesting that some examples be given is just so that the reader knows where to find a manual that documents a particular version of elo, and to give a rough idea of what product families use it. -Freescale PowerPC 85xx/86xx have on chip general purpose DMA controllers. +** Freescale ELOPLUS DMA Controller + This is DMA controller with extended addresses and chaining. + Used in Freescale PowerPC 85xx/86xx and pxxx series chips, such as: + [1] mpc8540, mpc8541, mpc8555, mpc8560, mpc8610, mpc8641, + [2] mpc8536, mpc8544, mpc8548, mpc8568, mpc8569, mpc8572, p1010, p1020, p1021, + p1022, p1023, p2020, p2041, p3041, p4080, p5020, p5040, and also bsc9131. What do [1] and [2] signify here? Oh, I see. It's weird for footnotes to come before the place they're referenced... Required properties: -- compatible: compatible list, contains 2 entries, first is -fsl,CHIP-dma, where CHIP is the processor -(mpc8540, mpc8540, etc.) and the second is -fsl,eloplus-dma +- compatible: compatible list, contains 2 entries for chips in above + list[1], the first is fsl,CHIP-dma, where CHIP is the + processor and the second is fsl,eloplus-dma. contains + only one fsl,eloplus-dma for chips in above list[2] Don't encode this difference in the binding document. It wasn't on purpose, but rather an artifact of factoring things out into dtsi files. Just make it optional. Why can't we just talk about what compatible must include, as I suggested earlier, rather than what it must *be*? - reg : registers mapping for DMA general status reg - cell-index: controller index. 0 for controller @ 0x21000, 1 for controller @ 0xc000 -- ranges : Should be defined as specified in 1) to describe the - DMA controller channels. +- ranges: physical address range of DMA controller channels ranges will not have physical addresses at this level. They'll only become physical addresses when translated by the ccsr node's ranges. -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: Enable CONFIG_DEVTMPFS_MOUNT to ensure /dev can be mounted correctly
On Thu, Apr 11, 2013 at 09:56:30PM +0800, Zhenhua Luo wrote: When using recent udev, the /dev node mount requires CONFIG_DEVTMPFS_MOUNT is enabled in Kernel. The patch enables the option in defconfig of Freescale QorIQ targets. Changed defconfig list: arch/powerpc/configs/85xx/p1023rds_defconfig arch/powerpc/configs/corenet32_smp_defconfig arch/powerpc/configs/corenet64_smp_defconfig arch/powerpc/configs/mpc85xx_smp_defconfig What about mpc83xx and mpc85xx (non-smp)? It'd be nice if non-hardware-specific things that are required for a typical Linux system were default y. Even nicer if we could have config fragments for various usage profiles that are separate from hardware config. -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: PPC: Don't sync timebase when inside VM
On Fri, Mar 02, 2012 at 03:12:33PM +0100, Alexander Graf wrote:
When running inside a virtual machine, we can not modify timebase, so
let's just not call the functions for it then.
This resolves hangs when booting e500 SMP guests on overcommitted hosts.
Reported-by: Stuart Yoder b08...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/platforms/85xx/smp.c |7 +++
1 files changed, 7 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/platforms/85xx/smp.c
b/arch/powerpc/platforms/85xx/smp.c
index ff42490..d4b6c1f 100644
--- a/arch/powerpc/platforms/85xx/smp.c
+++ b/arch/powerpc/platforms/85xx/smp.c
@@ -249,6 +249,13 @@ void __init mpc85xx_smp_init(void)
smp_85xx_ops.cause_ipi = doorbell_cause_ipi;
}
+ /* When running under a hypervisor, we can not modify tb */
+ np = of_find_node_by_path(/hypervisor);
+ if (np) {
+ smp_85xx_ops.give_timebase = NULL;
+ smp_85xx_ops.take_timebase = NULL;
+ }
I'm marking this superseded as we now only set give/take_timebase if a
guts node is present that corresponds to an SMP SoC. QEMU currently
advertises an mpc8544 guts (which is not SMP) and will eventually move to
a paravirt device with no guts at all.
-Scott
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Re: [1/4] powerpc/85xx: Add SEC6.0 device tree
On Thu, Apr 25, 2013 at 09:54:14AM +0800, Po Liu wrote:
From: Mingkai Hu mingkai...@freescale.com
Add device tree for SEC 6.0 used on C29x silicon.
Signed-off-by: Mingkai Hu mingkai...@freescale.com
Singed-off-by: Po Liu po@freescale.com
I've heard of patches being flamed, but here we want signing, not
singeing. :-)
Don't forget that you can use the -s option to have git add the signoff
for you.
---
Base on git://git.am.freescale.net/gitolite/mirrors/linux-2.6.git
This URL is not accessible outside Freescale, so don't reference it when
posting patches publicly.
If your patch is against the latest upstream code, you don't need to say
anything special about that. You only need to make a note when it's
against some other yet-to-be-merged tree or patch.
+ compatible = fsl,sec-v6.0, fsl,sec-v5.2,
+ fsl,sec-v5.0, fsl,sec-v4.4,
+ fsl,sec-v4.0;
+ fsl,sec-era = 6;
+ #address-cells = 1;
+ #size-cells = 1;
+
+ jr@1000 {
+ compatible = fsl,sec-v6.0-job-ring,
+ fsl,sec-v5.2-job-ring,
+ fsl,sec-v5.0-job-ring,
+ fsl,sec-v4.4-job-ring,
+ fsl,sec-v4.0-job-ring;
+ reg= 0x1000 0x1000;
+ };
+
+ jr@2000 {
+ compatible = fsl,sec-v6.0-job-ring,
+ fsl,sec-v5.2-job-ring,
+ fsl,sec-v5.0-job-ring,
+ fsl,sec-v4.4-job-ring,
+ fsl,sec-v4.0-job-ring;
+ reg= 0x2000 0x1000;
+ };
You claim compatibility with a bunch of prior SECs, but sec-v5.2 has four
job rings and an rtic node. Likewise for the previous compatibles
listed. This has two job rings and no rtic.
Can you point to where in the SEC v4.0 binding (I don't see a binding for
the subsequent versions), it says that these are optional?
-Scott
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Re: [3/4] powerpc/85xx: Add C293PCIE board support
On Thu, Apr 25, 2013 at 09:54:16AM +0800, Po Liu wrote:
From: Mingkai Hu mingkai...@freescale.com
C293PCIE board is a series of Freescale PCIe add-in cards to perform
as public key crypto accelerator or secure key management module.
- 512KB platform SRAM in addition to 512K L2 Cache/SRAM
- 512MB soldered DDR3 32bit memory
- CPLD System Logic
- 64MB x16 NOR flash and 4GB x8 NAND flash
- 16MB SPI flash
Signed-off-by: Mingkai Hu mingkai...@freescale.com
Singed-off-by: Po Liu po@freescale.com
Signed
+ partition@90 {
+ /* 33MB for rootfs */
+ reg = 0x0090 0x0210;
+ label = NOR Rootfs Image;
+ };
+
+ partition@2a0 {
+ /* 20MB for JFFS2 based Root file System */
+ reg = 0x02a0 0x0140;
+ label = NOR JFFS2 Root File System;
+ };
Don't specify JFFS2. Combine these two partitions into one.
+ partition@60 {
+ /* 4MB for Compressed Root file System Image */
+ reg = 0x0060 0x0040;
+ label = NAND Compressed RFS Image;
+ };
+
+ partition@a0 {
+ /* 15MB for JFFS2 based Root file System */
+ reg = 0x00a0 0x00f0;
+ label = NAND JFFS2 Root File System;
+ };
Likewise.
+ partition@190 {
+ /* 7MB for User Area */
+ reg = 0x0190 0x0070;
+ label = NAND User area;
+ };
Above you say there's 4 GiB of NAND, but here you define partitions that
only cover 32 MiB.
+ };
+
+ cpld@2,0 {
+ #address-cells = 1;
+ #size-cells = 1;
+ compatible = fsl,c293pcie-cpld;
+ reg = 0x2 0x0 0x020;
+ bank-width = 1;
+ device-width = 1;
+ };
What do bank-width and device-width mean here?
Why all the leading zeroes in 0x020?
+ partition@58 {
+ /* 4MB for Compressed RFS Image */
+ reg = 0x0058 0x0040;
+ label = SPI Flash Compressed RFSImage;
+ };
+
+ partition@98 {
+ /* 6.5MB for JFFS2 based RFS */
+ reg = 0x0098 0x0068;
+ label = SPI Flash JFFS2 RFS;
+ };
Again, merge these two and don't specify JFFS2.
diff --git a/arch/powerpc/platforms/85xx/Kconfig
b/arch/powerpc/platforms/85xx/Kconfig
index a0dcd57..df26b21 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -32,6 +32,13 @@ config BSC9131_RDB
StarCore SC3850 DSP
Manufacturer : Freescale Semiconductor, Inc
+config C293_PCIE
+ bool Freescale C293PCIE
+ select DEFAULT_UIMAGE
+ select SWIOTLB
+ help
+ This option enables support for the C293PCIE board
Why do you need SWIOTLB if the board has 512 MiB soldered RAM?
diff --git a/arch/powerpc/platforms/85xx/c293pcie.c
b/arch/powerpc/platforms/85xx/c293pcie.c
new file mode 100644
index 000..75dda12
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/c293pcie.c
@@ -0,0 +1,82 @@
+/*
+ * C293PCIE Board Setup
+ *
+ * Copyright 2013 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include linux/stddef.h
+#include linux/kernel.h
+#include linux/pci.h
+#include linux/delay.h
+#include linux/interrupt.h
+#include linux/of_platform.h
+
+#include asm/time.h
+#include asm/machdep.h
+#include asm/pci-bridge.h
+#include mm/mmu_decl.h
+#include asm/prom.h
+#include asm/udbg.h
+#include asm/mpic.h
+
+#include sysdev/fsl_soc.h
+#include sysdev/fsl_pci.h
+
+#include mpc85xx.h
Are you sure you need all of these? I don't see any delays, for example.
-Scott
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Re: [4/4] powerpc/85xx: Update mpc85xx_defconfig for C293PCIE
On Thu, Apr 25, 2013 at 09:54:17AM +0800, Po Liu wrote: From: Mingkai Hu mingkai...@freescale.com Signed-off-by: Mingkai Hu mingkai...@freescale.com --- Base on git://git.am.freescale.net/gitolite/mirrors/linux-2.6.git arch/powerpc/configs/mpc85xx_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/powerpc/configs/mpc85xx_defconfig b/arch/powerpc/configs/mpc85xx_defconfig index cf815e8..ddc33a2 100644 --- a/arch/powerpc/configs/mpc85xx_defconfig +++ b/arch/powerpc/configs/mpc85xx_defconfig @@ -28,6 +28,7 @@ CONFIG_MPC85xx_MDS=y CONFIG_MPC8536_DS=y CONFIG_MPC85xx_DS=y CONFIG_MPC85xx_RDB=y +CONFIG_C293_PCIE=y CONFIG_P1010_RDB=y CONFIG_P1022_DS=y CONFIG_P1022_RDK=y Please just merge this in with the patch that adds CONFIG_C293_PCIE support, when you respin that patch. -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [4/4] powerpc/85xx: Update mpc85xx_defconfig for C293PCIE
On Thu, Apr 25, 2013 at 09:54:17AM +0800, Po Liu wrote: From: Mingkai Hu mingkai...@freescale.com Signed-off-by: Mingkai Hu mingkai...@freescale.com --- Base on git://git.am.freescale.net/gitolite/mirrors/linux-2.6.git arch/powerpc/configs/mpc85xx_defconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/powerpc/configs/mpc85xx_defconfig b/arch/powerpc/configs/mpc85xx_defconfig index cf815e8..ddc33a2 100644 --- a/arch/powerpc/configs/mpc85xx_defconfig +++ b/arch/powerpc/configs/mpc85xx_defconfig @@ -28,6 +28,7 @@ CONFIG_MPC85xx_MDS=y CONFIG_MPC8536_DS=y CONFIG_MPC85xx_DS=y CONFIG_MPC85xx_RDB=y +CONFIG_C293_PCIE=y CONFIG_P1010_RDB=y CONFIG_P1022_DS=y CONFIG_P1022_RDK=y Also, why only mpc85xx_defconfig and mpc85xx_smp_defconfig? Just because this board isn't SMP doesn't mean it can't be supported by an SMP kernel. -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: powerpc/85xx: Add TWR-P1025 board support
On Thu, Apr 25, 2013 at 03:13:48PM +0800, Xie Xiaobo wrote:
+ partition@40 {
+ /* 58.75MB for JFFS2 based Root file System */
+ reg = 0x0040 0x03ac;
+ label = NOR JFFS2 Root File System;
+ };
Don't specify JFFS2.
diff --git a/arch/powerpc/platforms/85xx/twr_p102x.c
b/arch/powerpc/platforms/85xx/twr_p102x.c
new file mode 100644
index 000..a5de4e0
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/twr_p102x.c
@@ -0,0 +1,176 @@
+/*
+ * Copyright 2010-2011, 2013 Freescale Semiconductor, Inc.
+ *
+ * Author: Michael Johnston michael.johns...@freescale.com
+ *
+ * Description:
+ * TWR-P102x Board Setup
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ */
+
+#include linux/kernel.h
+#include linux/init.h
+#include linux/errno.h
+#include linux/pci.h
+#include linux/delay.h
+#include linux/module.h
+#include linux/fsl_devices.h
+#include linux/of_platform.h
+#include linux/of_device.h
+#include linux/memblock.h
+
+#include asm/time.h
+#include asm/machdep.h
+#include asm/pci-bridge.h
+#include mm/mmu_decl.h
+#include asm/prom.h
+#include asm/udbg.h
+#include asm/mpic.h
+#include asm/qe.h
+#include asm/qe_ic.h
+#include asm/fsl_guts.h
+
+#include sysdev/fsl_soc.h
+#include sysdev/fsl_pci.h
+#include smp.h
+
+#include mpc85xx.h
Are you sure you need all of these? I don't see any delays, for example.
+static void __init twr_p1025_pic_init(void)
+{
+ struct mpic *mpic;
+
+#ifdef CONFIG_QUICC_ENGINE
+ struct device_node *np;
+#endif
+
+ mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
+ MPIC_SINGLE_DEST_CPU,
+ 0, 256, OpenPIC );
+
+ BUG_ON(mpic == NULL);
+ mpic_init(mpic);
+
+#ifdef CONFIG_QUICC_ENGINE
+ np = of_find_compatible_node(NULL, NULL, fsl,qe-ic);
+ if (np) {
+ qe_ic_init(np, 0, qe_ic_cascade_low_mpic,
+ qe_ic_cascade_high_mpic);
+ of_node_put(np);
+ } else
+ printk(KERN_ERR Could not find qe-ic node\n);
WARNING: Prefer netdev_err(netdev, ... then dev_err(dev, ... then
pr_err(... to printk(KERN_ERR ...
#529: FILE: arch/powerpc/platforms/85xx/twr_p102x.c:65:
+ printk(KERN_ERR Could not find qe-ic node\n);
Likewise elsewhere.
Also, it'd be nice if this code (as well as the QE code later in this
file) were factored out to a QE file rather than being duplicated in
board files.
+static int __init twr_p1025_probe(void)
+{
+ unsigned long root = of_get_flat_dt_root();
+
+ return of_flat_dt_is_compatible(root, fsl,TWR-P1025);
+
+}
Remove the newline at the end of the function.
-Scott
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Re: [PATCH] powerpc: platforms: powernv: add '__init' for pnv_pci_init_ioda2_phb()
On Mon, Jul 22, 2013 at 12:52 AM, Chen Gang gang.c...@asianux.com wrote:
pnv_pci_init_ioda2_phb() is only used during boot up, so need add
'__init' to save the related memory, and avoid related warning:
The function .pnv_pci_init_ioda2_phb() references
the function __init .pnv_pci_init_ioda_phb().
This is often because .pnv_pci_init_ioda2_phb lacks a __init
annotation or the annotation of .pnv_pci_init_ioda_phb is wrong.
Signed-off-by: Chen Gang gang.c...@asianux.com
Looks right to me.
---
arch/powerpc/platforms/powernv/pci-ioda.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c
b/arch/powerpc/platforms/powernv/pci-ioda.c
index 49b57b9..d8140b1 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -1266,7 +1266,7 @@ void __init pnv_pci_init_ioda_phb(struct device_node
*np,
opal_pci_set_pe(phb_id, 0, 0, 7, 1, 1 , OPAL_MAP_PE);
}
-void pnv_pci_init_ioda2_phb(struct device_node *np)
+void __init pnv_pci_init_ioda2_phb(struct device_node *np)
{
pnv_pci_init_ioda_phb(np, 0, PNV_PHB_IODA2);
}
--
1.7.7.6
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Re: [RFC] power/mpc85xx: Add delay after enabling I2C master
On Mon, May 13, 2013 at 02:27:08PM -0700, York Sun wrote: Erratum A-006037 indicates I2C controller executes the write to I2CCR only after it sees SCL idle for 64K cycle of internal I2C controller clocks. If during this waiting period, I2C controller is disabled (I2CCR[MEN] set to 0), then the controller could end in bad state, and hang the future access to I2C register. The mpc_i2c_fixup() function tries to recover the bus from a stalled state where the 9th clock pulse wasn't generated. However, this workaround disables and enables I2C controller without meeting waiting requirement of this erratum. This erratum applies to some 85xx SoCs. It is safe to apply to all of them for mpc_i2c_fixup(). Signed-off-by: York Sun york...@freescale.com --- I'd like to get rid of the #ifdef if mpc5121 is OK with the longer delay. Are mpc5121 and mpc85xx the only things that use this? Are you sure the delay always works out to be longer? What is the relationship between fsl_get_sys_freq() and i2c-real_clk? In any case, you should send this patch to the i2c maintainer and list. -Scott ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] powerpc: platforms: powernv: add '__init' for pnv_pci_init_ioda2_phb()
On 07/23/2013 08:28 AM, Bjorn Helgaas wrote:
On Mon, Jul 22, 2013 at 12:52 AM, Chen Gang gang.c...@asianux.com wrote:
pnv_pci_init_ioda2_phb() is only used during boot up, so need add
'__init' to save the related memory, and avoid related warning:
The function .pnv_pci_init_ioda2_phb() references
the function __init .pnv_pci_init_ioda_phb().
This is often because .pnv_pci_init_ioda2_phb lacks a __init
annotation or the annotation of .pnv_pci_init_ioda_phb is wrong.
Signed-off-by: Chen Gang gang.c...@asianux.com
Looks right to me.
Thanks.
---
arch/powerpc/platforms/powernv/pci-ioda.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c
b/arch/powerpc/platforms/powernv/pci-ioda.c
index 49b57b9..d8140b1 100644
--- a/arch/powerpc/platforms/powernv/pci-ioda.c
+++ b/arch/powerpc/platforms/powernv/pci-ioda.c
@@ -1266,7 +1266,7 @@ void __init pnv_pci_init_ioda_phb(struct device_node
*np,
opal_pci_set_pe(phb_id, 0, 0, 7, 1, 1 , OPAL_MAP_PE);
}
-void pnv_pci_init_ioda2_phb(struct device_node *np)
+void __init pnv_pci_init_ioda2_phb(struct device_node *np)
{
pnv_pci_init_ioda_phb(np, 0, PNV_PHB_IODA2);
}
--
1.7.7.6
--
Chen Gang
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Re: [PATCH -V2] powerpc/mm: Use the correct SLB(LLP) encoding in tlbie instruction
Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com writes:
From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
The sllp value is stored in mmu_psize_defs in such a way that we can easily OR
the value to get the operand for slbmte instruction. ie, the L and LP bits are
not contiguous. Decode the bits and use them correctly in tlbie.
regression is introduced by 1f6aaaccb1b3af8613fe45781c1aefee2ae8c6b3
powerpc: Update tlbie/tlbiel as per ISA doc
Reported-by: Paul Mackerras pau...@samba.org
Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com
---
Changes from V1:
* use #define constants instead of opencoded values
arch/powerpc/mm/hash_native_64.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/mm/hash_native_64.c
b/arch/powerpc/mm/hash_native_64.c
index 0530ff7..c33d939 100644
--- a/arch/powerpc/mm/hash_native_64.c
+++ b/arch/powerpc/mm/hash_native_64.c
@@ -43,6 +43,7 @@ static inline void __tlbie(unsigned long vpn, int psize,
int apsize, int ssize)
{
unsigned long va;
unsigned int penc;
+ unsigned long sllp;
/*
* We need 14 to 65 bits of va for a tlibe of 4K page
@@ -64,7 +65,9 @@ static inline void __tlbie(unsigned long vpn, int psize,
int apsize, int ssize)
/* clear out bits after (52) [052.63] */
va = ~((1ul (64 - 52)) - 1);
va |= ssize 8;
- va |= mmu_psize_defs[apsize].sllp 6;
+ sllp = ((mmu_psize_defs[apsize].sllp SLB_VSID_L) 6) |
+ ((mmu_psize_defs[apsize].sllp SLB_VSID_LP) 4);
+ va |= sllp 5;
asm volatile(ASM_FTR_IFCLR(tlbie %0,0, PPC_TLBIE(%1,%0), %2)
: : r (va), r(0), i (CPU_FTR_ARCH_206)
: memory);
@@ -98,6 +101,7 @@ static inline void __tlbiel(unsigned long vpn, int psize,
int apsize, int ssize)
{
unsigned long va;
unsigned int penc;
+ unsigned long sllp;
/* VPN_SHIFT can be atmost 12 */
va = vpn VPN_SHIFT;
@@ -113,7 +117,9 @@ static inline void __tlbiel(unsigned long vpn, int psize,
int apsize, int ssize)
/* clear out bits after(52) [052.63] */
va = ~((1ul (64 - 52)) - 1);
va |= ssize 8;
- va |= mmu_psize_defs[apsize].sllp 6;
+ sllp = ((mmu_psize_defs[apsize].sllp SLB_VSID_L) 6) |
+ ((mmu_psize_defs[apsize].sllp SLB_VSID_LP) 4);
+ va |= sllp 5;
asm volatile(.long 0x7c000224 | (%0 11) | (0 21)
: : r(va) : memory);
break;
Any update on this ?
-aneesh
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Re: [PATCH 2/2] powerpc/mm: Fix fallthrough bug in hpte_decode
Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com writes: From: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com We should not fallthrough different case statements in hpte_decode. Add break statement to break out of the switch. The regression is introduced by dcda287a9b26309ae43a091d0ecde16f8f61b4c0 powerpc/mm: Simplify hpte_decode Reported-by: Paul Mackerras pau...@samba.org Signed-off-by: Aneesh Kumar K.V aneesh.ku...@linux.vnet.ibm.com --- arch/powerpc/mm/hash_native_64.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c index 0de15fc..e1f9b82 100644 --- a/arch/powerpc/mm/hash_native_64.c +++ b/arch/powerpc/mm/hash_native_64.c @@ -560,6 +560,7 @@ static void hpte_decode(struct hash_pte *hpte, unsigned long slot, seg_off |= vpi shift; } *vpn = vsid (SID_SHIFT - VPN_SHIFT) | seg_off VPN_SHIFT; + break; case MMU_SEGSIZE_1T: /* We only have 40 - 23 bits of seg_off in avpn */ seg_off = (avpn 0x1) 23; @@ -569,6 +570,7 @@ static void hpte_decode(struct hash_pte *hpte, unsigned long slot, seg_off |= vpi shift; } *vpn = vsid (SID_SHIFT_1T - VPN_SHIFT) | seg_off VPN_SHIFT; + break; default: *vpn = size = 0; } Any update on this ? -aneesh ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
RE: [PATCH] powerpc/msi: Fix compile error on mpc83xx
-Original Message- From: Wood Scott-B07421 Sent: Tuesday, July 23, 2013 1:19 AM To: Jia Hongtao-B38951 Cc: Wood Scott-B07421; linuxppc-dev@lists.ozlabs.org; ga...@kernel.crashing.org; Li Yang-R58472; Jia Hongtao-B38951 Subject: Re: [PATCH] powerpc/msi: Fix compile error on mpc83xx On 07/21/2013 09:00:51 PM, Jia Hongtao-B38951 wrote: Hi Scott, The fsl_msi.c build error on MPC83xx platform is fixed by this patch. Could you please have a review? Thanks. -Hongtao I will apply it when I apply the patch that depends on it. I hope to resume applying patches soon. -Scott Thanks. - Hongtao ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
RE: [PATCH 3/4 V2] mmc: esdhc: Correct host version of T4240-R1.0
Thanks.
Regards
Haijun.
-Original Message-
From: Kumar Gala [mailto:ga...@kernel.crashing.org]
Sent: Monday, July 22, 2013 10:30 PM
To: Zhang Haijun-B42677
Cc: linux-...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org; Wood Scott-
B07421; c...@laptop.org; Fleming Andy-AFLEMING; cbouatmai...@gmail.com
Subject: Re: [PATCH 3/4 V2] mmc: esdhc: Correct host version of T4240-
R1.0
On Jul 17, 2013, at 5:11 AM, Haijun Zhang wrote:
Vender version and sdhc spec version of T4240-R1.0 is incorrect.
The right value should be VVN=0x13, SVN = 0x1. The wrong version
number will break down the ADMA data transfer.
This defect only exist in T4240-R1.0. Will be fixed in T4240-R2.0.
Also share vvn and svr for public use.
Signed-off-by: Haijun Zhang haijun.zh...@freescale.com
---
changes for V2:
- Remove broken ADMA quirk.
- Rebuild patch of Add quirks to support T4240 board
drivers/mmc/host/sdhci-of-esdhc.c | 29 +
1 file changed, 13 insertions(+), 16 deletions(-)
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c
b/drivers/mmc/host/sdhci-of-esdhc.c
index adfaadd..570bca8 100644
--- a/drivers/mmc/host/sdhci-of-esdhc.c
+++ b/drivers/mmc/host/sdhci-of-esdhc.c
@@ -26,7 +26,7 @@
#define VENDOR_V_22 0x12
#define VENDOR_V_23 0x13
-static u32 svr;
+static u32 svr, vvn;
static u32 esdhc_readl(struct sdhci_host *host, int reg) { @@ -43,11
+43,9 @@ static u32 esdhc_readl(struct sdhci_host *host, int reg)
* For FSL eSDHC, must aligned 4-byte, so use 0xFC to read the
* the verdor version number, oxFE is SDHCI_HOST_VERSION.
*/
- if ((reg == SDHCI_CAPABILITIES) (ret SDHCI_CAN_DO_ADMA1)) {
- u32 tmp = in_be32(host-ioaddr + SDHCI_SLOT_INT_STATUS);
- tmp = (tmp SDHCI_VENDOR_VER_MASK) SDHCI_VENDOR_VER_SHIFT;
- if (tmp VENDOR_V_22)
- ret |= SDHCI_CAN_DO_ADMA2;
+ if ((reg == SDHCI_CAPABILITIES) (ret SDHCI_CAN_DO_ADMA1)
+ (vvn VENDOR_V_22)) {
+ ret |= SDHCI_CAN_DO_ADMA2;
}
return ret;
@@ -63,6 +61,12 @@ static u16 esdhc_readw(struct sdhci_host *host, int
reg)
ret = in_be32(host-ioaddr + base) 0x;
else
ret = (in_be32(host-ioaddr + base) shift) 0x;
+
+ /* T4240-R1.0 had a incorrect vendor version and spec version */
+ if ((reg == SDHCI_HOST_VERSION)
+ ((SVR_SOC_VER(svr) == SVR_T4240) (SVR_REV(svr) == 0x10)))
+ ret = (VENDOR_V_23 SDHCI_VENDOR_VER_SHIFT) |
SDHCI_SPEC_200;
+
is this check correct if this is on v2.0 Si as well?
[Haijun Wrote:] Oh, I forgot to rewrite the description above. This defect
exist both
on T4-R1.0 and T4-R2.0. I'll send patch v3 to correct this. thanks
- k
return ret;
}
@@ -175,17 +179,12 @@ static void esdhc_reset(struct sdhci_host *host,
u8 mask) */ static void esdhci_of_adma_workaround(struct sdhci_host
*host, u32 intmask) {
- u32 tmp;
bool applicable;
dma_addr_t dmastart;
dma_addr_t dmanow;
- tmp = esdhc_readl(host, SDHCI_SLOT_INT_STATUS);
- tmp = (tmp SDHCI_VENDOR_VER_MASK) SDHCI_VENDOR_VER_SHIFT;
-
applicable = (intmask SDHCI_INT_DATA_END)
- (intmask SDHCI_INT_BLK_GAP)
- (tmp == VENDOR_V_23);
+ (intmask SDHCI_INT_BLK_GAP) (vvn == VENDOR_V_23);
if (applicable) {
esdhc_reset(host, SDHCI_RESET_DATA); @@ -318,10 +317,9 @@
static
void esdhc_of_resume(struct sdhci_host *host)
static void esdhc_of_platform_init(struct sdhci_host *host) {
- u32 vvn;
+ svr = mfspr(SPRN_SVR);
+ vvn = esdhc_readw(host, SDHCI_HOST_VERSION);
- vvn = in_be32(host-ioaddr + SDHCI_SLOT_INT_STATUS);
- vvn = (vvn SDHCI_VENDOR_VER_MASK) SDHCI_VENDOR_VER_SHIFT;
if (vvn == VENDOR_V_22)
host-quirks2 |= SDHCI_QUIRK2_HOST_NO_CMD23;
@@ -390,7 +388,6 @@ static int sdhci_esdhc_probe(struct platform_device
*pdev)
struct device_node *np;
int ret;
- svr = mfspr(SPRN_SVR);
host = sdhci_pltfm_init(pdev, sdhci_esdhc_pdata, 0);
if (IS_ERR(host))
return PTR_ERR(host);
--
1.8.0
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RE: [PATCH 1/2] Powerpc: Add voltage ranges support for T4
Thanks.
Regards
Haijun.
-Original Message-
From: Kumar Gala [mailto:ga...@kernel.crashing.org]
Sent: Monday, July 22, 2013 10:40 PM
To: Wrobel Heinz-R39252
Cc: Zhang Haijun-B42677; linux-...@vger.kernel.org; linuxppc-
d...@lists.ozlabs.org; Wood Scott-B07421; c...@laptop.org; Fleming Andy-
AFLEMING; cbouatmai...@gmail.com
Subject: Re: [PATCH 1/2] Powerpc: Add voltage ranges support for T4
On Jul 22, 2013, at 4:47 AM, Wrobel Heinz-R39252 wrote:
Subject: [PATCH 1/2] Powerpc: Add voltage ranges support for T4
Special voltages that can be support by eSDHC of T4 in esdhc node.
Signed-off-by: Haijun Zhang haijun.zh...@freescale.com
Signed-off-by: Anton Vorontsov cbouatmai...@gmail.com
--- a/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt
+++ b/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt
@@ -19,6 +19,8 @@ Optional properties:
bus-width = 1 property.
- sdhci,auto-cmd12: specifies that a controller can only handle auto
CMD12.
+ - 3300 3300: specifies that eSDHC controller can support voltages
ranges
+from 3300 to 3300. This is an optional.
This is an optional. is an unclear statement.
+++ b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
@@ -399,6 +399,7 @@
sdhc@114000 {
compatible = fsl,t4240-esdhc, fsl,esdhc;
sdhci,auto-cmd12;
+ voltage-ranges = 1800 1800 3300 3300;
This is IMHO incorrect and potentially dangerous.
The T4 silicon will only support 1.8V on SDHC pins per hardware
specification.
The Freescale T4240QDS reference board has extra voltage shifters added
to allow 3.3V operation, but that is _not_ a silicon feature. It is a
specific board feature that may or may not translate to other boards,
depending on how SD spec conformant a board builder wants to be.
If the intent is to state that a physical SDHC interface on a board has
to be built to support 3.3V operation to be SD spec conformant for off-
the-shelf cards because a reset would change the signal voltage to 3.3V,
then I am not sure that putting this down as silicon feature without
further explanation about the background anywhere is the right way to go.
IMHO silicon features are really just silicon features and not
technically optional external circuitry additions implied by common use.
Best regards,
Heinz
I'd say that the t4240si-post.dtsi should be:
voltage-ranges = 1800 1800;
Than have the t4240qds.dts do:
voltage-ranges = 1800 1800 3300 3300;
As the 3.3V sounds like a board specific feature.
[ send this as 2 patches, on for the t4240si-post.dtsi and another for
the t4240qds.dts ]
[Haijun Wrote:] ok, thanks Heinz and Kumar.
- k
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Re: [PATCH 04/10] powerpc: Prepare to support kernel handling of IOMMU map/unmap
Ping, anyone, please?
Ben needs ack from any of MM people before proceeding with this patch. Thanks!
On 07/16/2013 10:53 AM, Alexey Kardashevskiy wrote:
The current VFIO-on-POWER implementation supports only user mode
driven mapping, i.e. QEMU is sending requests to map/unmap pages.
However this approach is really slow, so we want to move that to KVM.
Since H_PUT_TCE can be extremely performance sensitive (especially with
network adapters where each packet needs to be mapped/unmapped) we chose
to implement that as a fast hypercall directly in real
mode (processor still in the guest context but MMU off).
To be able to do that, we need to provide some facilities to
access the struct page count within that real mode environment as things
like the sparsemem vmemmap mappings aren't accessible.
This adds an API to increment/decrement page counter as
get_user_pages API used for user mode mapping does not work
in the real mode.
CONFIG_SPARSEMEM_VMEMMAP and CONFIG_FLATMEM are supported.
Cc: linux...@kvack.org
Reviewed-by: Paul Mackerras pau...@samba.org
Signed-off-by: Paul Mackerras pau...@samba.org
Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru
---
Changes:
2013/07/10:
* adjusted comment (removed sentence about virtual mode)
* get_page_unless_zero replaced with atomic_inc_not_zero to minimize
effect of a possible get_page_unless_zero() rework (if it ever happens).
2013/06/27:
* realmode_get_page() fixed to use get_page_unless_zero(). If failed,
the call will be passed from real to virtual mode and safely handled.
* added comment to PageCompound() in include/linux/page-flags.h.
2013/05/20:
* PageTail() is replaced by PageCompound() in order to have the same checks
for whether the page is huge in realmode_get_page() and realmode_put_page()
Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru
---
arch/powerpc/include/asm/pgtable-ppc64.h | 4 ++
arch/powerpc/mm/init_64.c| 76
+++-
include/linux/page-flags.h | 4 +-
3 files changed, 82 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/include/asm/pgtable-ppc64.h
b/arch/powerpc/include/asm/pgtable-ppc64.h
index 46db094..aa7b169 100644
--- a/arch/powerpc/include/asm/pgtable-ppc64.h
+++ b/arch/powerpc/include/asm/pgtable-ppc64.h
@@ -394,6 +394,10 @@ static inline void mark_hpte_slot_valid(unsigned char
*hpte_slot_array,
hpte_slot_array[index] = hidx 4 | 0x1 3;
}
+struct page *realmode_pfn_to_page(unsigned long pfn);
+int realmode_get_page(struct page *page);
+int realmode_put_page(struct page *page);
+
static inline char *get_hpte_slot_array(pmd_t *pmdp)
{
/*
diff --git a/arch/powerpc/mm/init_64.c b/arch/powerpc/mm/init_64.c
index d0cd9e4..dcbb806 100644
--- a/arch/powerpc/mm/init_64.c
+++ b/arch/powerpc/mm/init_64.c
@@ -300,5 +300,79 @@ void vmemmap_free(unsigned long start, unsigned long end)
{
}
-#endif /* CONFIG_SPARSEMEM_VMEMMAP */
+/*
+ * We do not have access to the sparsemem vmemmap, so we fallback to
+ * walking the list of sparsemem blocks which we already maintain for
+ * the sake of crashdump. In the long run, we might want to maintain
+ * a tree if performance of that linear walk becomes a problem.
+ *
+ * Any of realmode_ functions can fail due to:
+ * 1) As real sparsemem blocks do not lay in RAM continously (they
+ * are in virtual address space which is not available in the real mode),
+ * the requested page struct can be split between blocks so get_page/put_page
+ * may fail.
+ * 2) When huge pages are used, the get_page/put_page API will fail
+ * in real mode as the linked addresses in the page struct are virtual
+ * too.
+ */
+struct page *realmode_pfn_to_page(unsigned long pfn)
+{
+ struct vmemmap_backing *vmem_back;
+ struct page *page;
+ unsigned long page_size = 1 mmu_psize_defs[mmu_vmemmap_psize].shift;
+ unsigned long pg_va = (unsigned long) pfn_to_page(pfn);
+ for (vmem_back = vmemmap_list; vmem_back; vmem_back = vmem_back-list) {
+ if (pg_va vmem_back-virt_addr)
+ continue;
+
+ /* Check that page struct is not split between real pages */
+ if ((pg_va + sizeof(struct page))
+ (vmem_back-virt_addr + page_size))
+ return NULL;
+
+ page = (struct page *) (vmem_back-phys + pg_va -
+ vmem_back-virt_addr);
+ return page;
+ }
+
+ return NULL;
+}
+EXPORT_SYMBOL_GPL(realmode_pfn_to_page);
+
+#elif defined(CONFIG_FLATMEM)
+
+struct page *realmode_pfn_to_page(unsigned long pfn)
+{
+ struct page *page = pfn_to_page(pfn);
+ return page;
+}
+EXPORT_SYMBOL_GPL(realmode_pfn_to_page);
+
+#endif /* CONFIG_SPARSEMEM_VMEMMAP/CONFIG_FLATMEM */
+
+#if defined(CONFIG_SPARSEMEM_VMEMMAP) || defined(CONFIG_FLATMEM)
+int
Re: [PATCH 03/10] vfio: add external user support
On Tue, 2013-07-16 at 10:53 +1000, Alexey Kardashevskiy wrote:
VFIO is designed to be used via ioctls on file descriptors
returned by VFIO.
However in some situations support for an external user is required.
The first user is KVM on PPC64 (SPAPR TCE protocol) which is going to
use the existing VFIO groups for exclusive access in real/virtual mode
on a host to avoid passing map/unmap requests to the user space which
would made things pretty slow.
The protocol includes:
1. do normal VFIO init operation:
- opening a new container;
- attaching group(s) to it;
- setting an IOMMU driver for a container.
When IOMMU is set for a container, all groups in it are
considered ready to use by an external user.
2. User space passes a group fd to an external user.
The external user calls vfio_group_get_external_user()
to verify that:
- the group is initialized;
- IOMMU is set for it.
If both checks passed, vfio_group_get_external_user()
increments the container user counter to prevent
the VFIO group from disposal before KVM exits.
3. The external user calls vfio_external_user_iommu_id()
to know an IOMMU ID. PPC64 KVM uses it to link logical bus
number (LIOBN) with IOMMU ID.
4. When the external KVM finishes, it calls
vfio_group_put_external_user() to release the VFIO group.
This call decrements the container user counter.
Everything gets released.
The vfio: Limit group opens patch is also required for the consistency.
Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru
This looks fine to me. Is the plan to add this through the ppc tree
again? Thanks,
Alex
---
Changes:
2013/07/11:
* added vfio_group_get()/vfio_group_put()
* protocol description changed
Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru
---
drivers/vfio/vfio.c | 62
include/linux/vfio.h | 7 ++
2 files changed, 69 insertions(+)
diff --git a/drivers/vfio/vfio.c b/drivers/vfio/vfio.c
index c488da5..58b034b 100644
--- a/drivers/vfio/vfio.c
+++ b/drivers/vfio/vfio.c
@@ -1370,6 +1370,68 @@ static const struct file_operations vfio_device_fops =
{
};
/**
+ * External user API, exported by symbols to be linked dynamically.
+ *
+ * The protocol includes:
+ * 1. do normal VFIO init operation:
+ * - opening a new container;
+ * - attaching group(s) to it;
+ * - setting an IOMMU driver for a container.
+ * When IOMMU is set for a container, all groups in it are
+ * considered ready to use by an external user.
+ *
+ * 2. User space passes a group fd to an external user.
+ * The external user calls vfio_group_get_external_user()
+ * to verify that:
+ * - the group is initialized;
+ * - IOMMU is set for it.
+ * If both checks passed, vfio_group_get_external_user()
+ * increments the container user counter to prevent
+ * the VFIO group from disposal before KVM exits.
+ *
+ * 3. The external user calls vfio_external_user_iommu_id()
+ * to know an IOMMU ID.
+ *
+ * 4. When the external KVM finishes, it calls
+ * vfio_group_put_external_user() to release the VFIO group.
+ * This call decrements the container user counter.
+ */
+struct vfio_group *vfio_group_get_external_user(struct file *filep)
+{
+ struct vfio_group *group = filep-private_data;
+
+ if (filep-f_op != vfio_group_fops)
+ return ERR_PTR(-EINVAL);
+
+ if (!atomic_inc_not_zero(group-container_users))
+ return ERR_PTR(-EINVAL);
+
+ if (!group-container-iommu_driver ||
+ !vfio_group_viable(group)) {
+ atomic_dec(group-container_users);
+ return ERR_PTR(-EINVAL);
+ }
+
+ vfio_group_get(group);
+
+ return group;
+}
+EXPORT_SYMBOL_GPL(vfio_group_get_external_user);
+
+void vfio_group_put_external_user(struct vfio_group *group)
+{
+ vfio_group_put(group);
+ vfio_group_try_dissolve_container(group);
+}
+EXPORT_SYMBOL_GPL(vfio_group_put_external_user);
+
+int vfio_external_user_iommu_id(struct vfio_group *group)
+{
+ return iommu_group_id(group-iommu_group);
+}
+EXPORT_SYMBOL_GPL(vfio_external_user_iommu_id);
+
+/**
* Module/class support
*/
static char *vfio_devnode(struct device *dev, umode_t *mode)
diff --git a/include/linux/vfio.h b/include/linux/vfio.h
index ac8d488..24579a0 100644
--- a/include/linux/vfio.h
+++ b/include/linux/vfio.h
@@ -90,4 +90,11 @@ extern void vfio_unregister_iommu_driver(
TYPE tmp; \
offsetof(TYPE, MEMBER) + sizeof(tmp.MEMBER); }) \
+/*
+ * External user API
+ */
+extern struct vfio_group *vfio_group_get_external_user(struct file *filep);
+extern void vfio_group_put_external_user(struct vfio_group *group);
+extern int vfio_external_user_iommu_id(struct vfio_group *group);
+
#endif /* VFIO_H */
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Re: [PATCH] hashtable: add hash_for_each_possible_rcu_notrace()
Anyone, ping. Is it good, bad, ugly (ack/nack)? Thanks! Is there any trivial patches list? Could not find it on vger. On 07/15/2013 08:04 PM, Alexey Kardashevskiy wrote: Anyone, ping? On 07/06/2013 02:16 PM, Alexey Kardashevskiy wrote: This adds hash_for_each_possible_rcu_notrace() which is basically a notrace clone of hash_for_each_possible_rcu() which cannot be used in real mode due to its tracing/debugging capability. Signed-off-by: Alexey Kardashevskiy a...@ozlabs.ru --- include/linux/hashtable.h | 15 +++ 1 file changed, 15 insertions(+) diff --git a/include/linux/hashtable.h b/include/linux/hashtable.h index a9df51f..af8b169 100644 --- a/include/linux/hashtable.h +++ b/include/linux/hashtable.h @@ -174,6 +174,21 @@ static inline void hash_del_rcu(struct hlist_node *node) member) /** + * hash_for_each_possible_rcu_notrace - iterate over all possible objects hashing + * to the same bucket in an rcu enabled hashtable in a rcu enabled hashtable + * @name: hashtable to iterate + * @obj: the type * to use as a loop cursor for each entry + * @member: the name of the hlist_node within the struct + * @key: the key of the objects to iterate over + * + * This is the same as hash_for_each_possible_rcu() except that it does + * not do any RCU debugging or tracing. + */ +#define hash_for_each_possible_rcu_notrace(name, obj, member, key) \ +hlist_for_each_entry_rcu_notrace(obj, name[hash_min(key, HASH_BITS(name))],\ +member) + +/** * hash_for_each_possible_safe - iterate over all possible objects hashing to the * same bucket safe against removals * @name: hashtable to iterate -- Alexey ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
RE: [PATCH 2/2] mmc: esdhc: get voltage from dts file
Thanks.
Regards
Haijun.
-Original Message-
From: Wood Scott-B07421
Sent: Tuesday, July 23, 2013 1:41 AM
To: Zhang Haijun-B42677
Cc: linux-...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org;
cbouatmai...@gmail.com; c...@laptop.org; Fleming Andy-AFLEMING; Zhang
Haijun-B42677; Zhang Haijun-B42677
Subject: Re: [PATCH 2/2] mmc: esdhc: get voltage from dts file
On 07/22/2013 02:53:56 AM, Haijun Zhang wrote:
Add voltage-range support in esdhc of T4, So we can choose to read
voltages from dts file as one optional.
If we can get a valid voltage-range from device node, we use this
voltage as the final voltage support. Else we still read from capacity
or from other provider.
Signed-off-by: Haijun Zhang haijun.zh...@freescale.com
Signed-off-by: Anton Vorontsov cbouatmai...@gmail.com
---
drivers/mmc/host/sdhci-of-esdhc.c | 31
+++
drivers/mmc/host/sdhci.c | 3 +++
include/linux/mmc/sdhci.h | 1 +
3 files changed, 35 insertions(+)
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c
b/drivers/mmc/host/sdhci-of-esdhc.c
index 15039e2..8b4b27a 100644
--- a/drivers/mmc/host/sdhci-of-esdhc.c
+++ b/drivers/mmc/host/sdhci-of-esdhc.c
@@ -262,6 +262,35 @@ static int esdhc_pltfm_bus_width(struct
sdhci_host *host, int width)
return 0;
}
+static void esdhc_get_voltage(struct sdhci_host *host,
+ struct platform_device *pdev)
+{
+ const u32 *voltage_ranges;
+ int num_ranges, i;
+ struct device_node *np;
+ np = pdev-dev.of_node;
+
+ voltage_ranges = of_get_property(np, voltage-ranges,
num_ranges);
+ num_ranges = num_ranges / sizeof(*voltage_ranges) / 2;
+ if (!voltage_ranges || !num_ranges) {
+ dev_info(pdev-dev, OF: voltage-ranges
unspecified\n);
+ return;
+ }
+
+ for (i = 0; i num_ranges; i++) {
+ const int j = i * 2;
+ u32 mask;
+ mask =
mmc_vddrange_to_ocrmask(be32_to_cpu(voltage_ranges[j]),
+ be32_to_cpu(voltage_ranges[j + 1]));
+ if (!mask) {
+ dev_info(pdev-dev,
+ OF: false voltage-ranges specified\n);
+ return;
+ }
+ host-ocr_mask |= mask;
+ }
+}
Don't duplicate this code. Move it somewhere common and share it.
[Haijun Wrote:] So, move it drivers/mmc/host/sdhci-pltfm.c and share it as
Sdhc_get_voltage()?
Why did you remove the range index from the error string, and why did you
change it from dev_err to dev_info?
[Haijun Wrote:] I'll correct this. In case voltage-range specified if there is
still err.
It should be err.
-Scott
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Re: [PATCH] hashtable: add hash_for_each_possible_rcu_notrace()
On Tue, 2013-07-23 at 12:28 +1000, Alexey Kardashevskiy wrote: Anyone, ping. Is it good, bad, ugly (ack/nack)? Thanks! Is there any trivial patches list? Could not find it on vger. Jiri Kosina has triv...@kernel.org Also, there's kernel-janitors http://vger.kernel.org/vger-lists.html#kernel-janitors http://kernelnewbies.org/KernelJanitors MAINTAINERS has an entry: TRIVIAL PATCHES M: Jiri Kosina triv...@kernel.org T: git git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial.git S: Maintained K: ^Subject:.*(?i)trivial ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 2/2] mmc: esdhc: get voltage from dts file
On 07/22/2013 09:38:33 PM, Zhang Haijun-B42677 wrote:
-Original Message-
From: Wood Scott-B07421
Sent: Tuesday, July 23, 2013 1:41 AM
To: Zhang Haijun-B42677
Cc: linux-...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org;
cbouatmai...@gmail.com; c...@laptop.org; Fleming Andy-AFLEMING; Zhang
Haijun-B42677; Zhang Haijun-B42677
Subject: Re: [PATCH 2/2] mmc: esdhc: get voltage from dts file
On 07/22/2013 02:53:56 AM, Haijun Zhang wrote:
Add voltage-range support in esdhc of T4, So we can choose to read
voltages from dts file as one optional.
If we can get a valid voltage-range from device node, we use this
voltage as the final voltage support. Else we still read from
capacity
or from other provider.
Signed-off-by: Haijun Zhang haijun.zh...@freescale.com
Signed-off-by: Anton Vorontsov cbouatmai...@gmail.com
---
drivers/mmc/host/sdhci-of-esdhc.c | 31
+++
drivers/mmc/host/sdhci.c | 3 +++
include/linux/mmc/sdhci.h | 1 +
3 files changed, 35 insertions(+)
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c
b/drivers/mmc/host/sdhci-of-esdhc.c
index 15039e2..8b4b27a 100644
--- a/drivers/mmc/host/sdhci-of-esdhc.c
+++ b/drivers/mmc/host/sdhci-of-esdhc.c
@@ -262,6 +262,35 @@ static int esdhc_pltfm_bus_width(struct
sdhci_host *host, int width)
return 0;
}
+static void esdhc_get_voltage(struct sdhci_host *host,
+ struct platform_device *pdev)
+{
+ const u32 *voltage_ranges;
+ int num_ranges, i;
+ struct device_node *np;
+ np = pdev-dev.of_node;
+
+ voltage_ranges = of_get_property(np, voltage-ranges,
num_ranges);
+ num_ranges = num_ranges / sizeof(*voltage_ranges) / 2;
+ if (!voltage_ranges || !num_ranges) {
+ dev_info(pdev-dev, OF: voltage-ranges
unspecified\n);
+ return;
+ }
+
+ for (i = 0; i num_ranges; i++) {
+ const int j = i * 2;
+ u32 mask;
+ mask =
mmc_vddrange_to_ocrmask(be32_to_cpu(voltage_ranges[j]),
+ be32_to_cpu(voltage_ranges[j + 1]));
+ if (!mask) {
+ dev_info(pdev-dev,
+ OF: false voltage-ranges specified\n);
+ return;
+ }
+ host-ocr_mask |= mask;
+ }
+}
Don't duplicate this code. Move it somewhere common and share it.
[Haijun Wrote:] So, move it drivers/mmc/host/sdhci-pltfm.c and share
it as
Sdhc_get_voltage()?
I'll let the MMC maintainer say what the appropriate place would be...
Don't capitalize the function name, though. :-)
-Scott
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Re: [PATCH] hashtable: add hash_for_each_possible_rcu_notrace()
On 07/23/2013 12:41 PM, Joe Perches wrote: On Tue, 2013-07-23 at 12:28 +1000, Alexey Kardashevskiy wrote: Anyone, ping. Is it good, bad, ugly (ack/nack)? Thanks! Is there any trivial patches list? Could not find it on vger. Jiri Kosina has triv...@kernel.org Also, there's kernel-janitors http://vger.kernel.org/vger-lists.html#kernel-janitors http://kernelnewbies.org/KernelJanitors MAINTAINERS has an entry: TRIVIAL PATCHES M:Jiri Kosina triv...@kernel.org T:git git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial.git S:Maintained K:^Subject:.*(?i)trivial Cool, thanks! But is that patch really trivial? :) -- Alexey ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH] hashtable: add hash_for_each_possible_rcu_notrace()
On Tue, 2013-07-23 at 12:43 +1000, Alexey Kardashevskiy wrote: On 07/23/2013 12:41 PM, Joe Perches wrote: On Tue, 2013-07-23 at 12:28 +1000, Alexey Kardashevskiy wrote: Anyone, ping. Is it good, bad, ugly (ack/nack)? Thanks! Is there any trivial patches list? Could not find it on vger. [] MAINTAINERS has an entry: TRIVIAL PATCHES M: Jiri Kosina triv...@kernel.org T: git git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial.git [] Cool, thanks! But is that patch really trivial? :) :) Was that the question? Anyway, you cc'd all the right people already. If no one responds after a couple weeks, either send it to Jiri or directly to Linus. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
RE: [PATCH 2/2] mmc: esdhc: get voltage from dts file
Thanks.
Regards
Haijun.
-Original Message-
From: Wood Scott-B07421
Sent: Tuesday, July 23, 2013 10:42 AM
To: Zhang Haijun-B42677
Cc: Wood Scott-B07421; linux-...@vger.kernel.org; linuxppc-
d...@lists.ozlabs.org; cbouatmai...@gmail.com; c...@laptop.org; Fleming
Andy-AFLEMING
Subject: Re: [PATCH 2/2] mmc: esdhc: get voltage from dts file
On 07/22/2013 09:38:33 PM, Zhang Haijun-B42677 wrote:
-Original Message-
From: Wood Scott-B07421
Sent: Tuesday, July 23, 2013 1:41 AM
To: Zhang Haijun-B42677
Cc: linux-...@vger.kernel.org; linuxppc-dev@lists.ozlabs.org;
cbouatmai...@gmail.com; c...@laptop.org; Fleming Andy-AFLEMING; Zhang
Haijun-B42677; Zhang Haijun-B42677
Subject: Re: [PATCH 2/2] mmc: esdhc: get voltage from dts file
On 07/22/2013 02:53:56 AM, Haijun Zhang wrote:
Add voltage-range support in esdhc of T4, So we can choose to read
voltages from dts file as one optional.
If we can get a valid voltage-range from device node, we use this
voltage as the final voltage support. Else we still read from
capacity
or from other provider.
Signed-off-by: Haijun Zhang haijun.zh...@freescale.com
Signed-off-by: Anton Vorontsov cbouatmai...@gmail.com
---
drivers/mmc/host/sdhci-of-esdhc.c | 31
+++
drivers/mmc/host/sdhci.c | 3 +++
include/linux/mmc/sdhci.h | 1 +
3 files changed, 35 insertions(+)
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c
b/drivers/mmc/host/sdhci-of-esdhc.c
index 15039e2..8b4b27a 100644
--- a/drivers/mmc/host/sdhci-of-esdhc.c
+++ b/drivers/mmc/host/sdhci-of-esdhc.c
@@ -262,6 +262,35 @@ static int esdhc_pltfm_bus_width(struct
sdhci_host *host, int width)
return 0;
}
+static void esdhc_get_voltage(struct sdhci_host *host,
+ struct platform_device *pdev)
+{
+ const u32 *voltage_ranges;
+ int num_ranges, i;
+ struct device_node *np;
+ np = pdev-dev.of_node;
+
+ voltage_ranges = of_get_property(np, voltage-ranges,
num_ranges);
+ num_ranges = num_ranges / sizeof(*voltage_ranges) / 2;
+ if (!voltage_ranges || !num_ranges) {
+ dev_info(pdev-dev, OF: voltage-ranges
unspecified\n);
+ return;
+ }
+
+ for (i = 0; i num_ranges; i++) {
+ const int j = i * 2;
+ u32 mask;
+ mask =
mmc_vddrange_to_ocrmask(be32_to_cpu(voltage_ranges[j]),
+ be32_to_cpu(voltage_ranges[j + 1]));
+ if (!mask) {
+ dev_info(pdev-dev,
+ OF: false voltage-ranges specified\n);
+ return;
+ }
+ host-ocr_mask |= mask;
+ }
+}
Don't duplicate this code. Move it somewhere common and share it.
[Haijun Wrote:] So, move it drivers/mmc/host/sdhci-pltfm.c and share
it as Sdhc_get_voltage()?
I'll let the MMC maintainer say what the appropriate place would be...
Don't capitalize the function name, though. :-)
[Haijun Wrote:] Thanks scott. I'm always expecting chris's advice.
-Scott
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[PATCH 1/2] Powerpc: Add voltage support in dts file
eSDHC of T4240 had 1.8v voltage support. Add this node to specify
eSDHC voltage capacity. If this node not specified eSDHC driver
still can read from eSDHC host capacity register.
Signed-off-by: Haijun Zhang haijun.zh...@freescale.com
Signed-off-by: Anton Vorontsov cbouatmai...@gmail.com
---
changes for this patch set:
- split from patch [PATCH 1/2] Powerpc: Add
- voltage ranges support for T4
Documentation/devicetree/bindings/mmc/fsl-esdhc.txt | 3 +++
arch/powerpc/boot/dts/fsl/t4240si-post.dtsi | 1 +
2 files changed, 4 insertions(+)
diff --git a/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt
b/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt
index bd9be0b..f1ac253 100644
--- a/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt
+++ b/Documentation/devicetree/bindings/mmc/fsl-esdhc.txt
@@ -19,6 +19,8 @@ Optional properties:
bus-width = 1 property.
- sdhci,auto-cmd12: specifies that a controller can only handle auto
CMD12.
+ - 3300 3300: specifies that eSDHC controller can support voltages ranges
+from 3300 to 3300.
Example:
@@ -29,4 +31,5 @@ sdhci@2e000 {
interrupt-parent = ipic;
/* Filled in by U-Boot */
clock-frequency = 0;
+ voltage-ranges = 3300 3300;
};
diff --git a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
index bd611a9..567d0fb 100644
--- a/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t4240si-post.dtsi
@@ -399,6 +399,7 @@
sdhc@114000 {
compatible = fsl,t4240-esdhc, fsl,esdhc;
sdhci,auto-cmd12;
+ voltage-ranges = 1800 1800;
};
/include/ qoriq-i2c-0.dtsi
/include/ qoriq-i2c-1.dtsi
--
1.8.0
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[PATCH 2/2] Powerpc: Add 3.3v voltage support for T4240QDS
Freescale T4240QDS reference board has extra voltage shifters added
to allow 3.3V operation, so add 3.3v voltage support for T4240QDS.
Signed-off-by: Haijun Zhang haijun.zh...@freescale.com
Signed-off-by: Anton Vorontsov cbouatmai...@gmail.com
---
changes for this patch set:
- split from patch [PATCH 1/2] Powerpc: Add
- voltage ranges support for T4
arch/powerpc/boot/dts/t4240qds.dts | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/powerpc/boot/dts/t4240qds.dts
b/arch/powerpc/boot/dts/t4240qds.dts
index 0555976..5beccdd 100644
--- a/arch/powerpc/boot/dts/t4240qds.dts
+++ b/arch/powerpc/boot/dts/t4240qds.dts
@@ -148,6 +148,11 @@
interrupts = 0x1 0x1 0 0;
};
};
+
+ sdhc@114000 {
+ compatible = fsl,t4240-esdhc, fsl,esdhc;
+ voltage-ranges = 1800 1800 3300 3300;
+ };
};
pci0: pcie@ffe24 {
--
1.8.0
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cpuidle/pseries: Fix kernel command line parameter smt-snooze-delay
smt-snooze-delay is a tun-able provided currently on powerpc to delay the
entry of an idle cpu to NAP state. By default, the value is 100us,
which is entry criteria for NAP state i.e only if the idle period is
above 100us it would enter NAP. Value of -1 disables entry into NAP.
This value can be set either through sysfs, ppc64_cpu util or by
passing it via kernel command line. Currently this feature is broken
when the value is passed via the kernel command line.
This patch aims to fix this, by taking the appropriate action
based on the value after the pseries driver is registered.
This check is carried on in the back-end driver rather than
setup_smt_snooze_delay(), as one is not sure if the cpuidle driver
is even registered when setup routine is executed.
Also, this fixes re-enabling of NAP states by setting appropriate
value without having to reboot using smt-snooze-delay parameter.
Also, to note is, smt-snooze-delay is per-cpu variable.
This can be used to enable/disable NAP on per-cpu
basis using sysfs but when this variable is passed
via kernel command line or using the smt-snooze-delay
it applies to all the cpus. Per-cpu tuning can
only be done via sysfs.
Signed-off-by: Deepthi Dharwar deep...@linux.vnet.ibm.com
---
arch/powerpc/platforms/pseries/processor_idle.c | 34 ++-
1 file changed, 27 insertions(+), 7 deletions(-)
diff --git a/arch/powerpc/platforms/pseries/processor_idle.c
b/arch/powerpc/platforms/pseries/processor_idle.c
index 4644efa0..8133f50 100644
--- a/arch/powerpc/platforms/pseries/processor_idle.c
+++ b/arch/powerpc/platforms/pseries/processor_idle.c
@@ -170,18 +170,36 @@ static struct cpuidle_state
shared_states[MAX_IDLE_STATE_COUNT] = {
void update_smt_snooze_delay(int cpu, int residency)
{
struct cpuidle_driver *drv = cpuidle_get_driver();
- struct cpuidle_device *dev = per_cpu(cpuidle_devices, cpu);
+ struct cpuidle_device *dev;
if (cpuidle_state_table != dedicated_states)
return;
- if (residency 0) {
- /* Disable the Nap state on that cpu */
- if (dev)
- dev-states_usage[1].disable = 1;
- } else
- if (drv)
+ if (!drv)
+ return;
+
+ if (cpu == -1) {
+ if (residency 0) {
+ /* Disable NAP on all cpus */
+ drv-states[1].disabled = true;
+ } else {
drv-states[1].target_residency = residency;
+ drv-states[1].disabled = false;
+ }
+ return;
+ }
+
+ dev = per_cpu(cpuidle_devices, cpu);
+ if (!dev)
+ return;
+
+ if (residency 0)
+ dev-states_usage[1].disable = 1;
+ else {
+ drv-states[1].target_residency = residency;
+ drv-states[1].disabled = false;
+ dev-states_usage[1].disable = 0;
+ }
}
static int pseries_cpuidle_add_cpu_notifier(struct notifier_block *n,
@@ -331,6 +349,8 @@ static int __init pseries_processor_idle_init(void)
return retval;
}
+ update_smt_snooze_delay(-1, per_cpu(smt_snooze_delay, 0));
+
retval = pseries_idle_devices_init();
if (retval) {
pseries_idle_devices_uninit();
Regards,
Deepthi
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