Re: [PATCH v9 2/6] clk: Move all drivers to use internal API

2014-09-08 Thread Mike Turquette
Quoting Tomeu Vizoso (2014-09-03 08:31:57) In preparation to change the public API to return a per-user clk structure, remove any usage of this public API from the clock implementations. The reason for having this in a separate commit from the one that introduces the implementation of the

Re: [PATCH] drivers: char: hw_random: printk replacement

2014-09-08 Thread Sudip Mukherjee
On Thu, Aug 28, 2014 at 08:32:58PM +0530, Sudip Mukherjee wrote: as pr_* macros are more preffered over printk, so printk replaced with corresponding pr_* macros Signed-off-by: Sudip Mukherjee su...@vectorindia.org --- The replacement was done by a bash script to avoid copy paste error.

[PATCH v2 2/5] Documentation: Add isl1208 and isl12022 to trivial-devices list

2014-09-08 Thread Philipp Zabel
This patch adds the Intersil ISL1208 and ISL12022 I2C RTCs to the trivial-devices list. For ISL1208 a deprecated intersil,isl1208 entry is added since that is used in ppa8548.dts. Signed-off-by: Philipp Zabel p.za...@pengutronix.de --- Changes since v1: - Added deprecated entries that are still

[PATCH v2 4/5] rtc: rtc-isl12022: Change vendor prefix for Intersil Corporation to isil

2014-09-08 Thread Philipp Zabel
Currently there is a wild mixture of isl, isil, and intersil compatibles in the kernel. At this point, changing the vendor symbol to the most often used variant, which is equal to the NASDAQ symbol, isil, should not hurt. Patch db04d6284e2a (drivers/rtc/rtc-isl12022.c: device tree support) added

[PATCH v2 0/5] Change vendor prefix for Intersil Corporation

2014-09-08 Thread Philipp Zabel
Hi, currently there is a wild mixture of isl, isil, and intersil compatibles in the kernel. I figure at this point it is still possible to change this to use isil everywhere without too much pain, but it might be preferred to keep the already documented isl prefix, even though it doesn't follow

[PATCH v2 3/5] ARM: mvebu: Change vendor prefix for Intersil Corporation to isil

2014-09-08 Thread Philipp Zabel
Currently there is a wild mixture of isl, isil, and intersil compatibles in the kernel. At this point, changing the vendor symbol to the most often used variant, which is equal to the NASDAQ symbol, isil, should not hurt. Signed-off-by: Philipp Zabel p.za...@pengutronix.de ---

[PATCH v2 5/5] rtc: rtc-isl12057: Change vendor prefix for Intersil Corporation to isil

2014-09-08 Thread Philipp Zabel
Currently there is a wild mixture of isl, isil, and intersil compatibles in the kernel. At this point, changing the vendor symbol to the most often used variant, which is equal to the NASDAQ symbol, isil, should not hurt. Patch 70e123373c05 (rtc: Add support for Intersil ISL12057 I2C RTC chip)

[PATCH v2 1/5] of: Change vendor prefix for Intersil Corporation to isil

2014-09-08 Thread Philipp Zabel
Currently there is a wild mixture of isl, isil, and intersil compatibles in the kernel. At this point, changing the vendor symbol to the most often used variant, which is equal to the NASDAQ symbol, isil, should not hurt. This patch marks both intersil and isl prefix as deprecated and documents

Re: [RFC PATCH 0/6] Change vendor prefix for Intersil Corporation

2014-09-08 Thread Philipp Zabel
Hi Jason, Am Sonntag, den 07.09.2014, 09:32 -0400 schrieb Jason Cooper: Just to dot our i's and cross our t's, would you mind sending out a non-rfc version of this series? Thank you for the reminder, I have sent an updated version. regards Philipp

Re: [PATCH 1/2 v5] powerpc/kvm: support to handle sw breakpoint

2014-09-08 Thread Alexander Graf
On 07.09.14 18:31, Madhavan Srinivasan wrote: This patch adds kernel side support for software breakpoint. Design is that, by using an illegal instruction, we trap to hypervisor via Emulation Assistance interrupt, where we check for the illegal instruction and accordingly we return to Host

Re: [PATCH 2/2 v5] powerpc/kvm: common sw breakpoint instr across ppc

2014-09-08 Thread Alexander Graf
On 07.09.14 18:31, Madhavan Srinivasan wrote: This patch extends the use of illegal instruction as software breakpoint instruction across the ppc platform. Patch extends booke program interrupt code to support software breakpoint. Signed-off-by: Madhavan Srinivasan ma...@linux.vnet.ibm.com

Re: [PATCH] of: make sure of_alias is initialized before accessing it

2014-09-08 Thread Grant Likely
On Wed, 27 Aug 2014 17:09:39 +0300, Laurentiu Tudor b10...@freescale.com wrote: Simply swap of_alias and of_chosen initialization so that of_alias ends up read first. This must be done because it is accessed couple of lines below when trying to initialize the of_stdout using the alias based

Re: [PATCH] pseries: Fix endianness in cpu hotplug and hotremove

2014-09-08 Thread Nathan Fontenot
It looks like you have a lot of the same changes as the patch Bharata sent out last week. Including the one issue I saw in Bharata's patch below. On 09/05/2014 02:09 PM, Thomas Falcon wrote: This patch attempts to ensure that all values are in the proper endianness format when both hotadding

Re: [PATCH] of: make sure of_alias is initialized before accessing it

2014-09-08 Thread Laurentiu Tudor
On 09/08/2014 04:29 PM, Grant Likely wrote: On Wed, 27 Aug 2014 17:09:39 +0300, Laurentiu Tudor b10...@freescale.com wrote: Simply swap of_alias and of_chosen initialization so that of_alias ends up read first. This must be done because it is accessed couple of lines below when trying to

Re: [PATCH v1 09/21] Irq_remapping/MSI: Use MSI chip framework to configure MSI/MSI-X irq

2014-09-08 Thread wangyijing
在 2014年9月5日,18:42,Sergei Shtylyov sergei.shtyl...@cogentembedded.com 写道: Hello. On 9/5/2014 2:09 PM, Yijing Wang wrote: Use MSI chip framework instead of arch MSI functions to configure MSI/MSI-X irq. So we can manage MSI/MSI-X irq in a unified framework. Signed-off-by: Yijing Wang

Re: [PATCH v1 15/21] Powerpc/MSI: Use MSI chip framework to configure MSI/MSI-X irq

2014-09-08 Thread wangyijing
在 2014年9月5日,18:47,Sergei Shtylyov sergei.shtyl...@cogentembedded.com 写道: Hello. On 9/5/2014 2:10 PM, Yijing Wang wrote: Use MSI chip framework instead of arch MSI functions to configure MSI/MSI-X irq. So we can manage MSI/MSI-X irq in a unified framework. Signed-off-by: Yijing Wang

RE: bit fields data tearing

2014-09-08 Thread Marc Gauthier
Paul E. McKenney wrote: On Fri, Sep 05, 2014 at 02:50:31PM -0400, Peter Hurley wrote: On 09/05/2014 02:09 PM, Paul E. McKenney wrote: This commit documents the fact that it is not safe to use bitfields as shared variables in synchronization algorithms. It also documents that CPUs must provide

Re: [PATCH] pseries: Fix endianness in cpu hotplug and hotremove

2014-09-08 Thread Thomas Falcon
I guess we were both working on it independently. I had made the changes to hotplug a cpu a few weeks ago, but was blocked on removing a cpu. Last week I realized what was blocking me and fixed cpu removal, so I sent the patch along. Since Bharata has already submitted a patch that will

Re: bit fields data tearing

2014-09-08 Thread One Thousand Gnomes
On Fri, 05 Sep 2014 08:41:52 -0700 H. Peter Anvin h...@zytor.com wrote: On 09/05/2014 08:31 AM, Peter Hurley wrote: Which is a bit ironic because I remember when Digital had a team working on emulating native x86 apps on Alpha/NT. Right, because the x86 architecture was obsolete and

Re: bit fields data tearing

2014-09-08 Thread H. Peter Anvin
On 09/08/2014 10:52 AM, One Thousand Gnomes wrote: On Fri, 05 Sep 2014 08:41:52 -0700 H. Peter Anvin h...@zytor.com wrote: On 09/05/2014 08:31 AM, Peter Hurley wrote: Which is a bit ironic because I remember when Digital had a team working on emulating native x86 apps on Alpha/NT.

Re: bit fields data tearing

2014-09-08 Thread H. Peter Anvin
On 09/07/2014 10:56 PM, James Bottomley wrote: On Sun, 2014-09-07 at 16:39 -0700, H. Peter Anvin wrote: How many PARISC systems do we have that actually do real work on Linux? I'd be very surprised if this problem didn't exist on all alignment requiring architectures, like PPC and Sparc as

Re: bit fields data tearing

2014-09-08 Thread James Bottomley
On Mon, 2014-09-08 at 18:52 +0100, One Thousand Gnomes wrote: On Fri, 05 Sep 2014 08:41:52 -0700 H. Peter Anvin h...@zytor.com wrote: On 09/05/2014 08:31 AM, Peter Hurley wrote: Which is a bit ironic because I remember when Digital had a team working on emulating native x86 apps on

Re: bit fields data tearing

2014-09-08 Thread James Bottomley
On Mon, 2014-09-08 at 11:12 -0700, H. Peter Anvin wrote: On 09/07/2014 10:56 PM, James Bottomley wrote: On Sun, 2014-09-07 at 16:39 -0700, H. Peter Anvin wrote: How many PARISC systems do we have that actually do real work on Linux? I'd be very surprised if this problem didn't exist on

Re: bit fields data tearing

2014-09-08 Thread H. Peter Anvin
On 09/08/2014 12:09 PM, James Bottomley wrote: Um, I think you need to re-read the thread; that's not what I said at all. It's even written lower down: PA can't do atomic bit sets (no atomic RMW except the ldcw operation) it can do atomic writes to fundamental sizes (byte, short, int, long)

Re: bit fields data tearing

2014-09-08 Thread One Thousand Gnomes
I think the whole removing Alpha EV5 support is basically bonkers. Just use set_bit in the tty layer. Alpha will continue to work as well as it always has done and you won't design out support for any future processor that turns out not to do byte aligned stores. Alan Is *that*

Re: bit fields data tearing

2014-09-08 Thread H. Peter Anvin
On 09/08/2014 12:09 PM, James Bottomley wrote: Um, I think you need to re-read the thread; that's not what I said at all. It's even written lower down: PA can't do atomic bit sets (no atomic RMW except the ldcw operation) it can do atomic writes to fundamental sizes (byte, short, int, long)

[PATCH 1/3] init/main.c: Give init_task a canary

2014-09-08 Thread Aaron Tomlin
Tasks get their end of stack set to STACK_END_MAGIC with the aim to catch stack overruns. Currently this feature does not apply to init_task. This patch removes this restriction. Note that a similar patch was posted by Prarit Bhargava [1] some time ago but was never merged. [1]:

[PATCH 2/3] sched: Add helper for task stack page overrun checking

2014-09-08 Thread Aaron Tomlin
This facility is used in a few places so let's introduce a helper function to improve code readability. Signed-off-by: Aaron Tomlin atom...@redhat.com --- arch/powerpc/mm/fault.c| 4 +--- arch/x86/mm/fault.c| 4 +--- include/linux/sched.h | 2 ++ kernel/trace/trace_stack.c | 2

[PATCH v2 0/3] sched: Always check the integrity of the canary

2014-09-08 Thread Aaron Tomlin
Currently in the event of a stack overrun a call to schedule() does not check for this type of corruption. This corruption is often silent and can go unnoticed. However once the corrupted region is examined at a later stage, the outcome is undefined and often results in a sporadic page fault which

[PATCH 3/3] sched: BUG when stack end location is over written

2014-09-08 Thread Aaron Tomlin
Currently in the event of a stack overrun a call to schedule() does not check for this type of corruption. This corruption is often silent and can go unnoticed. However once the corrupted region is examined at a later stage, the outcome is undefined and often results in a sporadic page fault which

Re: bit fields data tearing

2014-09-08 Thread Chris Metcalf
On 9/8/2014 1:50 AM, James Bottomley wrote: Actual alignment is pretty irrelevant. That's why all architectures which require alignment also have to implement misaligned traps ... this is a fundamental requirement of the networking code, for instance. Can you clarify what you think the

Re: bit fields data tearing

2014-09-08 Thread James Bottomley
On Mon, 2014-09-08 at 16:45 -0400, Chris Metcalf wrote: On 9/8/2014 1:50 AM, James Bottomley wrote: Actual alignment is pretty irrelevant. That's why all architectures which require alignment also have to implement misaligned traps ... this is a fundamental requirement of the networking

Re: bit fields data tearing

2014-09-08 Thread Peter Hurley
On 09/08/2014 01:59 PM, H. Peter Anvin wrote: On 09/08/2014 10:52 AM, One Thousand Gnomes wrote: On Fri, 05 Sep 2014 08:41:52 -0700 H. Peter Anvin h...@zytor.com wrote: On 09/05/2014 08:31 AM, Peter Hurley wrote: Which is a bit ironic because I remember when Digital had a team working on

Re: bit fields data tearing

2014-09-08 Thread Peter Hurley
On 09/08/2014 01:50 AM, James Bottomley wrote: On Sun, 2014-09-07 at 16:41 -0400, Peter Hurley wrote: On 09/07/2014 03:04 PM, James Bottomley wrote: On Sun, 2014-09-07 at 09:21 -0700, Paul E. McKenney wrote: On Sat, Sep 06, 2014 at 10:07:22PM -0700, James Bottomley wrote: On Thu, 2014-09-04

Re: [PATCH V2 0/2] cpufreq/powernv: Set core pstate to a minimum just before hotplugging it out

2014-09-08 Thread Rafael J. Wysocki
On Friday, September 05, 2014 01:11:22 PM Viresh Kumar wrote: On 5 September 2014 13:09, Preeti U Murthy pre...@linux.vnet.ibm.com wrote: Today cpus go to winkle when they are offlined. Since it is the deepest idle state that we have, it is expected to save good amount of power as compared

Re: [PATCH 0/2] PCI/MSI: Remove arch_msi_check_device()

2014-09-08 Thread Michael Ellerman
On Fri, 2014-09-05 at 15:27 -0600, Bjorn Helgaas wrote: On Fri, Sep 5, 2014 at 3:25 PM, Bjorn Helgaas bhelg...@google.com wrote: On Sat, Jul 12, 2014 at 01:21:06PM +0200, Alexander Gordeev wrote: Hello, This is a cleanup effort to get rid of useless arch_msi_check_device(). I am not

Re: [PATCH] powerpc: Add macros for the ibm_architecture_vec[] lengths

2014-09-08 Thread Stewart Smith
Michael Ellerman m...@ellerman.id.au writes: The encoding of the lengths in the ibm_architecture_vec array is interesting to say the least. It's non-obvious how the number of bytes we provide relates to the length value. In fact we already got it wrong once, see 11e9ed43ca8a Fix up

Re: bit fields data tearing

2014-09-08 Thread Paul E. McKenney
On Mon, Sep 08, 2014 at 06:47:35PM -0400, Peter Hurley wrote: On 09/08/2014 01:59 PM, H. Peter Anvin wrote: On 09/08/2014 10:52 AM, One Thousand Gnomes wrote: On Fri, 05 Sep 2014 08:41:52 -0700 H. Peter Anvin h...@zytor.com wrote: On 09/05/2014 08:31 AM, Peter Hurley wrote: Which is

Re: [Xen-devel] [PATCH v1 08/21] x86/xen/MSI: Use MSI chip framework to configure MSI/MSI-X irq

2014-09-08 Thread Yijing Wang
On 2014/9/5 22:29, David Vrabel wrote: On 05/09/14 11:09, Yijing Wang wrote: Use MSI chip framework instead of arch MSI functions to configure MSI/MSI-X irq. So we can manage MSI/MSI-X irq in a unified framework. [...] --- a/arch/x86/pci/xen.c +++ b/arch/x86/pci/xen.c [...] @@ -418,9

Re: bit fields data tearing

2014-09-08 Thread H. Peter Anvin
On 09/08/2014 03:43 PM, James Bottomley wrote: This was years ago (possibly decades). We had to implement in-kernel unaligned traps for the networking layer because it could access short and int fields that weren't of the correct alignment when processing packets. It that's all corrected

Re: bit fields data tearing

2014-09-08 Thread James Bottomley
On Mon, 2014-09-08 at 19:30 -0400, Peter Hurley wrote: On 09/08/2014 01:50 AM, James Bottomley wrote: Two things: I think that gcc has given up on combining adjacent writes, perhaps because unaligned writes on some arches are prohibitive, so whatever minor optimization was believed to be

Re: bit fields data tearing

2014-09-08 Thread H. Peter Anvin
On 09/08/2014 07:56 PM, James Bottomley wrote: Yeah, the extra requirement I added is basically nonsense, since the only issue is what instructions the compiler is emitting. So if compiler thinks the alignment is natural and combines the writes -- ok. If the compiler thinks the alignment is

Re: bit fields data tearing

2014-09-08 Thread H. Peter Anvin
Add a short member for proper alignment and one will probably pop out. Sent from my tablet, pardon any formatting problems. On Sep 8, 2014, at 19:56, James Bottomley james.bottom...@hansenpartnership.com wrote: On Mon, 2014-09-08 at 19:30 -0400, Peter Hurley wrote: On 09/08/2014 01:50 AM,