Re: [RFC PATCH 2/3] powerpc/kernel: Prepare for seccomp-filter in the 64-bit syscall path

2015-05-20 Thread Michael Neuling
On Fri, 2015-05-15 at 18:29 +1000, Michael Ellerman wrote:
 In order to support seccomp-filter we need to be able to cope with
 seccomp potentially setting a return value for the syscall.
 
 Currently this doesn't work, because we assume any failure from
 do_syscall_trace_enter() should result in ENOSYS being returned to
 userspace.
 
 The complication is that we don't know if seccomp has set a return
 value, in fact the failure may not even be caused by seccomp it may have
 been from ptrace. So in some cases we should return ENOSYS, and in
 others we should return whatever's in regs, but we don't know which at
 this level.
 
 The trick is to pre-fill regs-result with -ENOSYS, so that we return
 that unless seccomp overwrites it with something else.
 
 Note that it's negative ENOSYS, so that we still go via the
 syscall_error path on the way out and set CR0[SO].
 
 On the other hand in syscall_set_return_value() we set the return value
 as it should be presented to userspace. That is mainly for consistency
 with syscall_get_error().
 
 Signed-off-by: Michael Ellerman m...@ellerman.id.au
 ---
  arch/powerpc/include/asm/syscall.h | 13 +
  arch/powerpc/kernel/entry_64.S | 37 +++--
  2 files changed, 44 insertions(+), 6 deletions(-)
 
 diff --git a/arch/powerpc/include/asm/syscall.h 
 b/arch/powerpc/include/asm/syscall.h
 index ff21b7a2f0cc..3f61ef03a54a 100644
 --- a/arch/powerpc/include/asm/syscall.h
 +++ b/arch/powerpc/include/asm/syscall.h
 @@ -50,6 +50,12 @@ static inline void syscall_set_return_value(struct 
 task_struct *task,
   struct pt_regs *regs,
   int error, long val)
  {
 + /*
 +  * We are setting the return value _as presented to userspace_.
 +  * So we set CR0[SO] and also negate error, making it positive.
 +  * That means we will _not_ go through the syscall_error path on the
 +  * exit to userspace.
 +  */
   if (error) {
   regs-ccr |= 0x1000L;
   regs-gpr[3] = -error;
 @@ -57,6 +63,13 @@ static inline void syscall_set_return_value(struct 
 task_struct *task,
   regs-ccr = ~0x1000L;
   regs-gpr[3] = val;
   }
 +
 + /*
 +  * Set regs-result to match r3. This mirrors the way a regular syscall
 +  * exit works. It also makes the return value juggling in
 +  * syscall_dotrace work.
 +  */
 + regs-result = regs-gpr[3];
  }
  
  static inline void syscall_get_arguments(struct task_struct *task,
 diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
 index b55c393310f3..3c912d9047c4 100644
 --- a/arch/powerpc/kernel/entry_64.S
 +++ b/arch/powerpc/kernel/entry_64.S
 @@ -143,8 +143,7 @@ END_FW_FTR_SECTION_IFSET(FW_FEATURE_SPLPAR)
   CURRENT_THREAD_INFO(r11, r1)
   ld  r10,TI_FLAGS(r11)
   andi.   r11,r10,_TIF_SYSCALL_DOTRACE
 - bne syscall_dotrace
 -.Lsyscall_dotrace_cont:
 + bne syscall_dotrace /* does not return */
   cmpldi  0,r0,NR_syscalls
   bge-syscall_enosys
  
 @@ -235,27 +234,53 @@ syscall_error:
   
  /* Traced system call support */
  syscall_dotrace:
 + /* Save non-volatile GPRs so seccomp/ptrace etc. can see them */
   bl  save_nvgprs
  
 + /*
 +  * Seccomp may set regs-result, but we don't know at this level, so
 +  * preload result with ENOSYS here. That way below in the path to
 +  * .Lsyscall_exit we can load regs-result and get either ENOSYS, or
 +  * the value set by seccomp.
 +  */
 + li  r3,-ENOSYS
 + std r3,RESULT(r1)
 +
   /* Get pt_regs into r3 */
   mr  r3, r9
   bl  do_syscall_trace_enter
 +
   /*
 -  * Restore argument registers possibly just changed.
 -  * We use the return value of do_syscall_trace_enter
 -  * for the call number to look up in the table (r0).
 +  * We use the return value of do_syscall_trace_enter() as the syscall
 +  * number. If the syscall was rejected for any reason
 +  * do_syscall_trace_enter() returns -1 and the test below against
 +  * NR_syscalls will fail.
*/
   mr  r0,r3
 +
 + /* Restore argument registers just clobbered and/or possibly changed. */
   ld  r3,GPR3(r1)
   ld  r4,GPR4(r1)
   ld  r5,GPR5(r1)
   ld  r6,GPR6(r1)
   ld  r7,GPR7(r1)
   ld  r8,GPR8(r1)
 +
 + /* Repopulate r9 and r10 for the system_call path */
   addir9,r1,STACK_FRAME_OVERHEAD
   CURRENT_THREAD_INFO(r10, r1)
   ld  r10,TI_FLAGS(r10)
 - b   .Lsyscall_dotrace_cont
 +
 + /* Check the syscall number is valid */
 + cmpldi  0,r0,NR_syscalls
 + blt+system_call
 +
 + /*
 +  * Syscall number is bad, get the result, either ENOSYS from above or
 +  * something set by seccomp.
 +  */
 + ld  r3,RESULT(r1)
 + b   .Lsyscall_exit
 

[Patch v2 08/14] genirq: Introduce helper function irq_data_get_affinity_mask()

2015-05-20 Thread Jiang Liu
Introduce helper function irq_data_get_affinity_mask() and
irq_get_affinity_mask() to hide implementation details,
so we could move field 'affinity' from struct irq_data into
struct irq_common_data later.

Signed-off-by: Jiang Liu jiang@linux.intel.com
---
 arch/alpha/kernel/irq.c   |2 +-
 arch/arm/kernel/irq.c |4 ++--
 arch/arm64/kernel/irq.c   |4 ++--
 arch/blackfin/mach-common/ints-priority.c |3 ++-
 arch/ia64/kernel/iosapic.c|2 +-
 arch/ia64/kernel/irq.c|6 +++---
 arch/ia64/kernel/msi_ia64.c   |4 ++--
 arch/ia64/sn/kernel/msi_sn.c  |2 +-
 arch/metag/kernel/irq.c   |   10 ++
 arch/mips/bcm63xx/irq.c   |2 +-
 arch/mips/cavium-octeon/octeon-irq.c  |   14 --
 arch/mips/pmcs-msp71xx/msp_irq_cic.c  |3 ++-
 arch/mn10300/kernel/cevt-mn10300.c|2 +-
 arch/mn10300/kernel/irq.c |   13 +++--
 arch/parisc/kernel/irq.c  |   12 ++--
 arch/powerpc/kernel/irq.c |2 +-
 arch/powerpc/sysdev/xics/ics-opal.c   |2 +-
 arch/powerpc/sysdev/xics/ics-rtas.c   |2 +-
 arch/sh/kernel/irq.c  |7 ---
 arch/sparc/kernel/irq_64.c|   12 +++-
 arch/sparc/kernel/leon_kernel.c   |6 +++---
 arch/x86/kernel/apic/io_apic.c|2 +-
 arch/x86/kernel/apic/vector.c |5 ++---
 arch/x86/kernel/irq.c |5 +++--
 arch/xtensa/kernel/irq.c  |   10 ++
 drivers/irqchip/irq-mips-gic.c|2 +-
 drivers/parisc/iosapic.c  |2 +-
 drivers/sh/intc/chip.c|6 +++---
 drivers/xen/events/events_base.c  |4 ++--
 include/linux/irq.h   |   12 
 30 files changed, 93 insertions(+), 69 deletions(-)

diff --git a/arch/alpha/kernel/irq.c b/arch/alpha/kernel/irq.c
index 7b2be251c30f..bd8e47699cad 100644
--- a/arch/alpha/kernel/irq.c
+++ b/arch/alpha/kernel/irq.c
@@ -60,7 +60,7 @@ int irq_select_affinity(unsigned int irq)
cpu = (cpu  (NR_CPUS-1) ? cpu + 1 : 0);
last_cpu = cpu;
 
-   cpumask_copy(data-affinity, cpumask_of(cpu));
+   cpumask_copy(irq_data_get_affinity_mask(data), cpumask_of(cpu));
chip-irq_set_affinity(data, cpumask_of(cpu), false);
return 0;
 }
diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
index 350f188c92d2..baf8edebe26f 100644
--- a/arch/arm/kernel/irq.c
+++ b/arch/arm/kernel/irq.c
@@ -140,7 +140,7 @@ int __init arch_probe_nr_irqs(void)
 static bool migrate_one_irq(struct irq_desc *desc)
 {
struct irq_data *d = irq_desc_get_irq_data(desc);
-   const struct cpumask *affinity = d-affinity;
+   const struct cpumask *affinity = irq_data_get_affinity_mask(d);
struct irq_chip *c;
bool ret = false;
 
@@ -160,7 +160,7 @@ static bool migrate_one_irq(struct irq_desc *desc)
if (!c-irq_set_affinity)
pr_debug(IRQ%u: unable to set affinity\n, d-irq);
else if (c-irq_set_affinity(d, affinity, false) == IRQ_SET_MASK_OK  
ret)
-   cpumask_copy(d-affinity, affinity);
+   cpumask_copy(irq_data_get_affinity_mask(d), affinity);
 
return ret;
 }
diff --git a/arch/arm64/kernel/irq.c b/arch/arm64/kernel/irq.c
index 240b75c0e94f..463fa2e7e34c 100644
--- a/arch/arm64/kernel/irq.c
+++ b/arch/arm64/kernel/irq.c
@@ -61,7 +61,7 @@ void __init init_IRQ(void)
 static bool migrate_one_irq(struct irq_desc *desc)
 {
struct irq_data *d = irq_desc_get_irq_data(desc);
-   const struct cpumask *affinity = d-affinity;
+   const struct cpumask *affinity = irq_data_get_affinity_mask(d);
struct irq_chip *c;
bool ret = false;
 
@@ -81,7 +81,7 @@ static bool migrate_one_irq(struct irq_desc *desc)
if (!c-irq_set_affinity)
pr_debug(IRQ%u: unable to set affinity\n, d-irq);
else if (c-irq_set_affinity(d, affinity, false) == IRQ_SET_MASK_OK  
ret)
-   cpumask_copy(d-affinity, affinity);
+   cpumask_copy(irq_data_get_affinity_mask(d), affinity);
 
return ret;
 }
diff --git a/arch/blackfin/mach-common/ints-priority.c 
b/arch/blackfin/mach-common/ints-priority.c
index 7236bdfc71e6..332a434b4669 100644
--- a/arch/blackfin/mach-common/ints-priority.c
+++ b/arch/blackfin/mach-common/ints-priority.c
@@ -194,7 +194,8 @@ void bfin_internal_unmask_irq(unsigned int irq)
 #ifdef CONFIG_SMP
 static void bfin_internal_unmask_irq_chip(struct irq_data *d)
 {
-   bfin_internal_unmask_irq_affinity(d-irq, d-affinity);
+   bfin_internal_unmask_irq_affinity(d-irq,
+ irq_data_get_affinity_mask(d));
 }
 
 static int bfin_internal_set_affinity(struct irq_data *d,
diff --git 

[PATCH v2] cxl: Export AFU error buffer via sysfs

2015-05-20 Thread Vaibhav Jain
Export the AFU Error Buffer via sysfs attribute (afu_err_buf). AFU
error buffer is used by the AFU to report application specific
errors. The contents of this buffer are AFU specific and are intended to
be interpreted by the application interacting with the afu.

Testing:
- Build against pseries le/be configs.
- Run testing with a special version of memcpy afu on a 'be'
kernel.

Change-log:
v1 - v2
- Simplified cxl_afu_read_err_buffer to handle unaligned reads
by performing a short read.

Signed-off-by: Vaibhav Jain vaib...@linux.vnet.ibm.com
---
 Documentation/ABI/testing/sysfs-class-cxl | 11 ++
 drivers/misc/cxl/cxl.h|  7 
 drivers/misc/cxl/pci.c| 60 +++
 drivers/misc/cxl/sysfs.c  | 33 +
 4 files changed, 111 insertions(+)

diff --git a/Documentation/ABI/testing/sysfs-class-cxl 
b/Documentation/ABI/testing/sysfs-class-cxl
index d46bba8..45e9ce3 100644
--- a/Documentation/ABI/testing/sysfs-class-cxl
+++ b/Documentation/ABI/testing/sysfs-class-cxl
@@ -6,6 +6,17 @@ Example: The real path of the attribute 
/sys/class/cxl/afu0.0s/irqs_max is
 
 Slave contexts (eg. /sys/class/cxl/afu0.0s):
 
+What:   /sys/class/cxl/afu/afu_err_buf
+Date:   September 2014
+Contact:linuxppc-dev@lists.ozlabs.org
+Description:read only
+AFU Error Buffer contents. The contents of this file are
+   application specific and depends on the AFU being used.
+   Applications interacting with the AFU can use this attribute
+   to know about the current error condition and take appropriate
+   action like logging the event etc.
+
+
 What:   /sys/class/cxl/afu/irqs_max
 Date:   September 2014
 Contact:linuxppc-dev@lists.ozlabs.org
diff --git a/drivers/misc/cxl/cxl.h b/drivers/misc/cxl/cxl.h
index a1cee47..789f077 100644
--- a/drivers/misc/cxl/cxl.h
+++ b/drivers/misc/cxl/cxl.h
@@ -362,6 +362,10 @@ struct cxl_afu {
struct mutex spa_mutex;
spinlock_t afu_cntl_lock;
 
+   /* AFU error buffer fields and bin attribute for sysfs */
+   u64 eb_len, eb_offset;
+   struct bin_attribute attr_eb;
+
/*
 * Only the first part of the SPA is used for the process element
 * linked list. The only other part that software needs to worry about
@@ -563,6 +567,9 @@ static inline void __iomem *_cxl_p2n_addr(struct cxl_afu 
*afu, cxl_p2n_reg_t reg
 u16 cxl_afu_cr_read16(struct cxl_afu *afu, int cr, u64 off);
 u8 cxl_afu_cr_read8(struct cxl_afu *afu, int cr, u64 off);
 
+ssize_t cxl_afu_read_err_buffer(struct cxl_afu *afu, char *buf,
+   loff_t off, size_t count);
+
 
 struct cxl_calls {
void (*cxl_slbia)(struct mm_struct *mm);
diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
index 1ef0164..162a8fc 100644
--- a/drivers/misc/cxl/pci.c
+++ b/drivers/misc/cxl/pci.c
@@ -593,6 +593,22 @@ static int cxl_read_afu_descriptor(struct cxl_afu *afu)
afu-crs_len = AFUD_CR_LEN(val) * 256;
afu-crs_offset = AFUD_READ_CR_OFF(afu);
 
+
+   /* eb_len is in multiple of 4K */
+   afu-eb_len = AFUD_EB_LEN(AFUD_READ_EB(afu)) * 4096;
+   afu-eb_offset = AFUD_READ_EB_OFF(afu);
+
+   /* eb_off is 4K aligned so lower 12 bits are always zero */
+   if (EXTRACT_PPC_BITS(afu-eb_offset, 0, 11) != 0) {
+   dev_warn(afu-dev,
+Invalid AFU error buffer offset %Lx\n,
+afu-eb_offset);
+   dev_info(afu-dev,
+Ignoring AFU error buffer in the descriptor\n);
+   /* indicate that no afu buffer exists */
+   afu-eb_len = 0;
+   }
+
return 0;
 }
 
@@ -672,6 +688,50 @@ static int sanitise_afu_regs(struct cxl_afu *afu)
return 0;
 }
 
+/*
+ * afu_eb_read:
+ * Called from sysfs and reads the afu error info buffer. The h/w only supports
+ * 4/8 bytes aligned access. So most of the code tries to get around this by
+ * reading full 8 bytes aligned chunks, copying it to a temp buffer and 
dropping
+ * unneeded bytes at the beginning  the end of the requested region.
+ */
+ssize_t cxl_afu_read_err_buffer(struct cxl_afu *afu, char *buf,
+   loff_t off, size_t count)
+{
+   u8 tbuff[8];
+   const void __iomem *ebuf = afu-afu_desc_mmio + afu-eb_offset;
+
+   count = min((size_t)(afu-eb_len - off), count);
+
+   if (unlikely(count = 0)) {
+   /* handle case where no ebuf exists or offset out of bound */
+   count = 0;
+
+   } else if ((count = 8)  IS_ALIGNED(off, 8)) {
+   /* read all the intermediate aligned words */
+
+   count = round_down(off + count, 8) - off;
+   _memcpy_fromio(buf,
+  ebuf + off, count);
+
+   } else if (!IS_ALIGNED(off, 8)) {
+ 

[RFC v1 04/25] powerpc, irq: Use irq_desc_get_xxx() to avoid redundant lookup of irq_desc

2015-05-20 Thread Jiang Liu
Use irq_desc_get_xxx() to avoid redundant lookup of irq_desc while we
already have a pointer to corresponding irq_desc.

Signed-off-by: Jiang Liu jiang@linux.intel.com
---
 arch/powerpc/platforms/52xx/mpc52xx_gpt.c |2 +-
 arch/powerpc/platforms/cell/axon_msi.c|2 +-
 arch/powerpc/platforms/embedded6xx/hlwd-pic.c |2 +-
 arch/powerpc/sysdev/uic.c |2 +-
 arch/powerpc/sysdev/xics/xics-common.c|2 +-
 5 files changed, 5 insertions(+), 5 deletions(-)

diff --git a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c 
b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
index c949ca055712..63016621aff8 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
@@ -193,7 +193,7 @@ static struct irq_chip mpc52xx_gpt_irq_chip = {
 
 void mpc52xx_gpt_irq_cascade(unsigned int virq, struct irq_desc *desc)
 {
-   struct mpc52xx_gpt_priv *gpt = irq_get_handler_data(virq);
+   struct mpc52xx_gpt_priv *gpt = irq_desc_get_handler_data(desc);
int sub_virq;
u32 status;
 
diff --git a/arch/powerpc/platforms/cell/axon_msi.c 
b/arch/powerpc/platforms/cell/axon_msi.c
index 623bd961465a..817d0e6747ea 100644
--- a/arch/powerpc/platforms/cell/axon_msi.c
+++ b/arch/powerpc/platforms/cell/axon_msi.c
@@ -95,7 +95,7 @@ static void msic_dcr_write(struct axon_msic *msic, unsigned 
int dcr_n, u32 val)
 static void axon_msi_cascade(unsigned int irq, struct irq_desc *desc)
 {
struct irq_chip *chip = irq_desc_get_chip(desc);
-   struct axon_msic *msic = irq_get_handler_data(irq);
+   struct axon_msic *msic = irq_desc_get_handler_data(desc);
u32 write_offset, msi;
int idx;
int retry = 0;
diff --git a/arch/powerpc/platforms/embedded6xx/hlwd-pic.c 
b/arch/powerpc/platforms/embedded6xx/hlwd-pic.c
index c269caee58f9..9dd154d6f89a 100644
--- a/arch/powerpc/platforms/embedded6xx/hlwd-pic.c
+++ b/arch/powerpc/platforms/embedded6xx/hlwd-pic.c
@@ -124,7 +124,7 @@ static void hlwd_pic_irq_cascade(unsigned int cascade_virq,
  struct irq_desc *desc)
 {
struct irq_chip *chip = irq_desc_get_chip(desc);
-   struct irq_domain *irq_domain = irq_get_handler_data(cascade_virq);
+   struct irq_domain *irq_domain = irq_desc_get_handler_data(desc);
unsigned int virq;
 
raw_spin_lock(desc-lock);
diff --git a/arch/powerpc/sysdev/uic.c b/arch/powerpc/sysdev/uic.c
index 7c37157d4c24..e763fe215cf5 100644
--- a/arch/powerpc/sysdev/uic.c
+++ b/arch/powerpc/sysdev/uic.c
@@ -198,7 +198,7 @@ void uic_irq_cascade(unsigned int virq, struct irq_desc 
*desc)
 {
struct irq_chip *chip = irq_desc_get_chip(desc);
struct irq_data *idata = irq_desc_get_irq_data(desc);
-   struct uic *uic = irq_get_handler_data(virq);
+   struct uic *uic = irq_desc_get_handler_data(desc);
u32 msr;
int src;
int subvirq;
diff --git a/arch/powerpc/sysdev/xics/xics-common.c 
b/arch/powerpc/sysdev/xics/xics-common.c
index 878a54036a25..76be7b00dd80 100644
--- a/arch/powerpc/sysdev/xics/xics-common.c
+++ b/arch/powerpc/sysdev/xics/xics-common.c
@@ -227,7 +227,7 @@ void xics_migrate_irqs_away(void)
 
/* Locate interrupt server */
server = -1;
-   ics = irq_get_chip_data(virq);
+   ics = irq_desc_get_chip_data(desc);
if (ics)
server = ics-get_server(ics, irq);
if (server  0) {
-- 
1.7.10.4

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Re: [PATCH] ppc64 ftrace: mark data_access callees notrace (pt.1)

2015-05-20 Thread Torsten Duwe
On Tue, May 19, 2015 at 01:27:07PM +1000, Michael Ellerman wrote:
 On Mon, 2015-05-18 at 14:29 +0200, Jiri Kosina wrote:
  
  ftrace already handles recursion protection by itself (depending on the 
  per-ftrace-ops FTRACE_OPS_FL_RECURSION_SAFE flag).
 
 OK, so I wonder why that's not working for us?

IIRC a data access fault happens just before that flag is looked at ;-)

I'm now thinking about a hybrid solution: mark the most critical functions
notrace, especially those directly involved with MMU loading, and add
a per-thread flag to catch the not-so-obvious cases.

Torsten

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[Patch v2 12/14] genirq: Use helper function to access irq_data-msi_desc

2015-05-20 Thread Jiang Liu
Use irq_data access helper to access irq_data-msi_desc, so we could
move msi_desc from struct irq_data into struct irq_common_data later.

Signed-off-by: Jiang Liu jiang@linux.intel.com
---
 arch/ia64/kernel/msi_ia64.c |2 +-
 arch/ia64/sn/kernel/msi_sn.c|2 +-
 arch/powerpc/sysdev/xics/ics-opal.c |2 +-
 arch/powerpc/sysdev/xics/ics-rtas.c |2 +-
 arch/tile/kernel/pci_gx.c   |2 +-
 drivers/pci/msi.c   |2 +-
 6 files changed, 6 insertions(+), 6 deletions(-)

diff --git a/arch/ia64/kernel/msi_ia64.c b/arch/ia64/kernel/msi_ia64.c
index 6c50d332b7d7..af4eaec0f7c3 100644
--- a/arch/ia64/kernel/msi_ia64.c
+++ b/arch/ia64/kernel/msi_ia64.c
@@ -23,7 +23,7 @@ static int ia64_set_msi_irq_affinity(struct irq_data *idata,
if (irq_prepare_move(irq, cpu))
return -1;
 
-   __get_cached_msi_msg(idata-msi_desc, msg);
+   __get_cached_msi_msg(irq_data_get_msi_desc(idata), msg);
 
addr = msg.address_lo;
addr = MSI_ADDR_DEST_ID_MASK;
diff --git a/arch/ia64/sn/kernel/msi_sn.c b/arch/ia64/sn/kernel/msi_sn.c
index 42b5a13af142..fb25065b22c6 100644
--- a/arch/ia64/sn/kernel/msi_sn.c
+++ b/arch/ia64/sn/kernel/msi_sn.c
@@ -175,7 +175,7 @@ static int sn_set_msi_irq_affinity(struct irq_data *data,
 * Release XIO resources for the old MSI PCI address
 */
 
-   __get_cached_msi_msg(data-msi_desc, msg);
+   __get_cached_msi_msg(irq_data_get_msi_desc(data), msg);
sn_pdev = (struct pcidev_info *)sn_irq_info-irq_pciioinfo;
pdev = sn_pdev-pdi_linux_pcidev;
provider = SN_PCIDEV_BUSPROVIDER(pdev);
diff --git a/arch/powerpc/sysdev/xics/ics-opal.c 
b/arch/powerpc/sysdev/xics/ics-opal.c
index 3996393c254d..27c936c080a6 100644
--- a/arch/powerpc/sysdev/xics/ics-opal.c
+++ b/arch/powerpc/sysdev/xics/ics-opal.c
@@ -72,7 +72,7 @@ static unsigned int ics_opal_startup(struct irq_data *d)
 * card, using the MSI mask bits. Firmware doesn't appear to unmask
 * at that level, so we do it here by hand.
 */
-   if (d-msi_desc)
+   if (irq_data_get_msi_desc(d))
pci_msi_unmask_irq(d);
 #endif
 
diff --git a/arch/powerpc/sysdev/xics/ics-rtas.c 
b/arch/powerpc/sysdev/xics/ics-rtas.c
index e2665a9dfc0f..3854dd41558d 100644
--- a/arch/powerpc/sysdev/xics/ics-rtas.c
+++ b/arch/powerpc/sysdev/xics/ics-rtas.c
@@ -75,7 +75,7 @@ static unsigned int ics_rtas_startup(struct irq_data *d)
 * card, using the MSI mask bits. Firmware doesn't appear to unmask
 * at that level, so we do it here by hand.
 */
-   if (d-msi_desc)
+   if (irq_data_get_msi_desc(d))
pci_msi_unmask_irq(d);
 #endif
/* unmask it */
diff --git a/arch/tile/kernel/pci_gx.c b/arch/tile/kernel/pci_gx.c
index b1df847d0686..65b701b3b5ed 100644
--- a/arch/tile/kernel/pci_gx.c
+++ b/arch/tile/kernel/pci_gx.c
@@ -1442,7 +1442,7 @@ static struct pci_ops tile_cfg_ops = {
 /* MSI support starts here. */
 static unsigned int tilegx_msi_startup(struct irq_data *d)
 {
-   if (d-msi_desc)
+   if (irq_data_get_msi_desc(d))
pci_msi_unmask_irq(d);
 
return 0;
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c
index be6034cf5c21..c2f0da733d3a 100644
--- a/drivers/pci/msi.c
+++ b/drivers/pci/msi.c
@@ -1178,7 +1178,7 @@ EXPORT_SYMBOL(pci_enable_msix_range);
  */
 void pci_msi_domain_write_msg(struct irq_data *irq_data, struct msi_msg *msg)
 {
-   struct msi_desc *desc = irq_data-msi_desc;
+   struct msi_desc *desc = irq_data_get_msi_desc(irq_data);
 
/*
 * For MSI-X desc-irq is always equal to irq_data-irq. For
-- 
1.7.10.4

___
Linuxppc-dev mailing list
Linuxppc-dev@lists.ozlabs.org
https://lists.ozlabs.org/listinfo/linuxppc-dev

[RFC v1 16/25] genirq: Kill the first parameter 'irq' of irq_flow_handler_t

2015-05-20 Thread Jiang Liu
Now most IRQ flow handlers make no use of the first parameter 'irq'.
And for those who do make use of 'irq', we could easily get the irq
number through irq_desc-irq_data-irq. So kill the first parameter
'irq' of irq_flow_handler_t.

To ease review, I have split the changes into several parts, though
they should be merge as one to support bisecting.

Signed-off-by: Jiang Liu jiang@linux.intel.com
---
 arch/powerpc/include/asm/qe_ic.h|   23 +--
 arch/powerpc/include/asm/tsi108_pci.h   |2 +-
 arch/powerpc/platforms/512x/mpc5121_ads_cpld.c  |4 +++-
 arch/powerpc/platforms/52xx/media5200.c |2 +-
 arch/powerpc/platforms/52xx/mpc52xx_gpt.c   |2 +-
 arch/powerpc/platforms/82xx/pq2ads-pci-pic.c|2 +-
 arch/powerpc/platforms/85xx/common.c|2 +-
 arch/powerpc/platforms/85xx/mpc85xx_ds.c|2 +-
 arch/powerpc/platforms/85xx/socrates_fpga_pic.c |3 ++-
 arch/powerpc/platforms/86xx/pic.c   |2 +-
 arch/powerpc/platforms/8xx/m8xx_setup.c |2 +-
 arch/powerpc/platforms/cell/axon_msi.c  |2 +-
 arch/powerpc/platforms/cell/interrupt.c |3 ++-
 arch/powerpc/platforms/cell/spider-pic.c|2 +-
 arch/powerpc/platforms/chrp/setup.c |2 +-
 arch/powerpc/platforms/embedded6xx/mvme5100.c   |2 +-
 arch/powerpc/platforms/pseries/setup.c  |2 +-
 arch/powerpc/sysdev/ge/ge_pic.c |2 +-
 arch/powerpc/sysdev/mpic.c  |2 +-
 arch/powerpc/sysdev/qe_lib/qe_ic.c  |4 ++--
 arch/powerpc/sysdev/tsi108_pci.c|2 +-
 arch/powerpc/sysdev/uic.c   |2 +-
 arch/powerpc/sysdev/xilinx_intc.c   |2 +-
 23 files changed, 36 insertions(+), 37 deletions(-)

diff --git a/arch/powerpc/include/asm/qe_ic.h b/arch/powerpc/include/asm/qe_ic.h
index 25784cc959a0..1e155ca6d33c 100644
--- a/arch/powerpc/include/asm/qe_ic.h
+++ b/arch/powerpc/include/asm/qe_ic.h
@@ -59,14 +59,14 @@ enum qe_ic_grp_id {
 
 #ifdef CONFIG_QUICC_ENGINE
 void qe_ic_init(struct device_node *node, unsigned int flags,
-   void (*low_handler)(unsigned int irq, struct irq_desc *desc),
-   void (*high_handler)(unsigned int irq, struct irq_desc *desc));
+   void (*low_handler)(struct irq_desc *desc),
+   void (*high_handler)(struct irq_desc *desc));
 unsigned int qe_ic_get_low_irq(struct qe_ic *qe_ic);
 unsigned int qe_ic_get_high_irq(struct qe_ic *qe_ic);
 #else
 static inline void qe_ic_init(struct device_node *node, unsigned int flags,
-   void (*low_handler)(unsigned int irq, struct irq_desc *desc),
-   void (*high_handler)(unsigned int irq, struct irq_desc *desc))
+   void (*low_handler)(struct irq_desc *desc),
+   void (*high_handler)(struct irq_desc *desc))
 {}
 static inline unsigned int qe_ic_get_low_irq(struct qe_ic *qe_ic)
 { return 0; }
@@ -78,8 +78,7 @@ void qe_ic_set_highest_priority(unsigned int virq, int high);
 int qe_ic_set_priority(unsigned int virq, unsigned int priority);
 int qe_ic_set_high_priority(unsigned int virq, unsigned int priority, int 
high);
 
-static inline void qe_ic_cascade_low_ipic(unsigned int irq,
- struct irq_desc *desc)
+static inline void qe_ic_cascade_low_ipic(struct irq_desc *desc)
 {
struct qe_ic *qe_ic = irq_desc_get_handler_data(desc);
unsigned int cascade_irq = qe_ic_get_low_irq(qe_ic);
@@ -88,8 +87,7 @@ static inline void qe_ic_cascade_low_ipic(unsigned int irq,
generic_handle_irq(cascade_irq);
 }
 
-static inline void qe_ic_cascade_high_ipic(unsigned int irq,
-  struct irq_desc *desc)
+static inline void qe_ic_cascade_high_ipic(struct irq_desc *desc)
 {
struct qe_ic *qe_ic = irq_desc_get_handler_data(desc);
unsigned int cascade_irq = qe_ic_get_high_irq(qe_ic);
@@ -98,8 +96,7 @@ static inline void qe_ic_cascade_high_ipic(unsigned int irq,
generic_handle_irq(cascade_irq);
 }
 
-static inline void qe_ic_cascade_low_mpic(unsigned int irq,
- struct irq_desc *desc)
+static inline void qe_ic_cascade_low_mpic(struct irq_desc *desc)
 {
struct qe_ic *qe_ic = irq_desc_get_handler_data(desc);
unsigned int cascade_irq = qe_ic_get_low_irq(qe_ic);
@@ -111,8 +108,7 @@ static inline void qe_ic_cascade_low_mpic(unsigned int irq,
chip-irq_eoi(desc-irq_data);
 }
 
-static inline void qe_ic_cascade_high_mpic(unsigned int irq,
-  struct irq_desc *desc)
+static inline void qe_ic_cascade_high_mpic(struct irq_desc *desc)
 {
struct qe_ic *qe_ic = irq_desc_get_handler_data(desc);
unsigned int cascade_irq = qe_ic_get_high_irq(qe_ic);
@@ -124,8 +120,7 @@ static inline void qe_ic_cascade_high_mpic(unsigned int irq,
 

Re: [PATCH v2] cxl: Export AFU error buffer via sysfs

2015-05-20 Thread Michael Neuling
On Wed, 2015-05-20 at 16:26 +0530, Vaibhav Jain wrote:
 Export the AFU Error Buffer via sysfs attribute (afu_err_buf). AFU
 error buffer is used by the AFU to report application specific
 errors. The contents of this buffer are AFU specific and are intended to
 be interpreted by the application interacting with the afu.
 
 Testing:
   - Build against pseries le/be configs.
   - Run testing with a special version of memcpy afu on a 'be'
   kernel.
 
 Change-log:
 v1 - v2
   - Simplified cxl_afu_read_err_buffer to handle unaligned reads
   by performing a short read.
 
 Signed-off-by: Vaibhav Jain vaib...@linux.vnet.ibm.com
 ---
  Documentation/ABI/testing/sysfs-class-cxl | 11 ++
  drivers/misc/cxl/cxl.h|  7 
  drivers/misc/cxl/pci.c| 60 
 +++
  drivers/misc/cxl/sysfs.c  | 33 +
  4 files changed, 111 insertions(+)
 
 diff --git a/Documentation/ABI/testing/sysfs-class-cxl 
 b/Documentation/ABI/testing/sysfs-class-cxl
 index d46bba8..45e9ce3 100644
 --- a/Documentation/ABI/testing/sysfs-class-cxl
 +++ b/Documentation/ABI/testing/sysfs-class-cxl
 @@ -6,6 +6,17 @@ Example: The real path of the attribute 
 /sys/class/cxl/afu0.0s/irqs_max is
  
  Slave contexts (eg. /sys/class/cxl/afu0.0s):
  
 +What:   /sys/class/cxl/afu/afu_err_buf
 +Date:   September 2014
 +Contact:linuxppc-dev@lists.ozlabs.org
 +Description:read only
 +AFU Error Buffer contents. The contents of this file are
 + application specific and depends on the AFU being used.
 + Applications interacting with the AFU can use this attribute
 + to know about the current error condition and take appropriate
 + action like logging the event etc.
 +
 +
  What:   /sys/class/cxl/afu/irqs_max
  Date:   September 2014
  Contact:linuxppc-dev@lists.ozlabs.org
 diff --git a/drivers/misc/cxl/cxl.h b/drivers/misc/cxl/cxl.h
 index a1cee47..789f077 100644
 --- a/drivers/misc/cxl/cxl.h
 +++ b/drivers/misc/cxl/cxl.h
 @@ -362,6 +362,10 @@ struct cxl_afu {
   struct mutex spa_mutex;
   spinlock_t afu_cntl_lock;
  
 + /* AFU error buffer fields and bin attribute for sysfs */
 + u64 eb_len, eb_offset;
 + struct bin_attribute attr_eb;
 +
   /*
* Only the first part of the SPA is used for the process element
* linked list. The only other part that software needs to worry about
 @@ -563,6 +567,9 @@ static inline void __iomem *_cxl_p2n_addr(struct cxl_afu 
 *afu, cxl_p2n_reg_t reg
  u16 cxl_afu_cr_read16(struct cxl_afu *afu, int cr, u64 off);
  u8 cxl_afu_cr_read8(struct cxl_afu *afu, int cr, u64 off);
  
 +ssize_t cxl_afu_read_err_buffer(struct cxl_afu *afu, char *buf,
 + loff_t off, size_t count);
 +
  
  struct cxl_calls {
   void (*cxl_slbia)(struct mm_struct *mm);
 diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
 index 1ef0164..162a8fc 100644
 --- a/drivers/misc/cxl/pci.c
 +++ b/drivers/misc/cxl/pci.c
 @@ -593,6 +593,22 @@ static int cxl_read_afu_descriptor(struct cxl_afu *afu)
   afu-crs_len = AFUD_CR_LEN(val) * 256;
   afu-crs_offset = AFUD_READ_CR_OFF(afu);
  
 +
 + /* eb_len is in multiple of 4K */
 + afu-eb_len = AFUD_EB_LEN(AFUD_READ_EB(afu)) * 4096;
 + afu-eb_offset = AFUD_READ_EB_OFF(afu);
 +
 + /* eb_off is 4K aligned so lower 12 bits are always zero */
 + if (EXTRACT_PPC_BITS(afu-eb_offset, 0, 11) != 0) {
 + dev_warn(afu-dev,
 +  Invalid AFU error buffer offset %Lx\n,
 +  afu-eb_offset);
 + dev_info(afu-dev,
 +  Ignoring AFU error buffer in the descriptor\n);
 + /* indicate that no afu buffer exists */
 + afu-eb_len = 0;
 + }
 +
   return 0;
  }
  
 @@ -672,6 +688,50 @@ static int sanitise_afu_regs(struct cxl_afu *afu)
   return 0;
  }
  
 +/*
 + * afu_eb_read:
 + * Called from sysfs and reads the afu error info buffer. The h/w only 
 supports
 + * 4/8 bytes aligned access. So most of the code tries to get around this by
 + * reading full 8 bytes aligned chunks, copying it to a temp buffer and 
 dropping
 + * unneeded bytes at the beginning  the end of the requested region.
 + */
 +ssize_t cxl_afu_read_err_buffer(struct cxl_afu *afu, char *buf,
 + loff_t off, size_t count)
 +{
 + u8 tbuff[8];
 + const void __iomem *ebuf = afu-afu_desc_mmio + afu-eb_offset;
 +
 + count = min((size_t)(afu-eb_len - off), count);
 +
 + if (unlikely(count = 0)) {
 + /* handle case where no ebuf exists or offset out of bound */
 + count = 0;
 +
 + } else if ((count = 8)  IS_ALIGNED(off, 8)) {
 + /* read all the intermediate aligned words */
 +
 + count = round_down(off + count, 8) - off;
 + _memcpy_fromio(buf,
 + 

[PATCH] powerpc/mpc85xx: Add DPAA Ethernet QMan support to the

2015-05-20 Thread Madalin Bucur
From: Emil Medve emilian.me...@freescale.com

Signed-off-by: Emil Medve emilian.me...@freescale.com
---
 arch/powerpc/boot/dts/b4qds.dtsi   |  1 +
 arch/powerpc/boot/dts/fsl/qoriq-dpaa-res1.dtsi | 77 ++
 arch/powerpc/boot/dts/fsl/qoriq-dpaa-res2.dtsi | 56 +++
 arch/powerpc/boot/dts/fsl/qoriq-dpaa-res3.dtsi | 77 ++
 arch/powerpc/boot/dts/kmcoge4.dts  |  1 +
 arch/powerpc/boot/dts/oca4080.dts  |  1 +
 arch/powerpc/boot/dts/p1023rdb.dts |  1 +
 arch/powerpc/boot/dts/p2041rdb.dts |  1 +
 arch/powerpc/boot/dts/p3041ds.dts  |  1 +
 arch/powerpc/boot/dts/p4080ds.dts  |  1 +
 arch/powerpc/boot/dts/p5020ds.dts  |  1 +
 arch/powerpc/boot/dts/p5040ds.dts  |  1 +
 arch/powerpc/boot/dts/t104xqds.dtsi|  2 +
 arch/powerpc/boot/dts/t104xrdb.dtsi|  2 +
 arch/powerpc/boot/dts/t208xqds.dtsi|  2 +
 arch/powerpc/boot/dts/t208xrdb.dtsi|  2 +
 arch/powerpc/boot/dts/t4240qds.dts |  1 +
 arch/powerpc/boot/dts/t4240rdb.dts |  1 +
 18 files changed, 229 insertions(+)
 create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-dpaa-res1.dtsi
 create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-dpaa-res2.dtsi
 create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-dpaa-res3.dtsi

diff --git a/arch/powerpc/boot/dts/b4qds.dtsi b/arch/powerpc/boot/dts/b4qds.dtsi
index 24ed80d..3cd23db 100644
--- a/arch/powerpc/boot/dts/b4qds.dtsi
+++ b/arch/powerpc/boot/dts/b4qds.dtsi
@@ -218,3 +218,4 @@
 };
 
 /include/ fsl/b4si-post.dtsi
+/include/ fsl/qoriq-dpaa-res3.dtsi
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-dpaa-res1.dtsi 
b/arch/powerpc/boot/dts/fsl/qoriq-dpaa-res1.dtsi
new file mode 100644
index 000..24d83e0
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-dpaa-res1.dtsi
@@ -0,0 +1,77 @@
+/*
+ * QorIQ DPAA resources device tree stub [ FQIDs, BPIDs ]
+ *
+ * Copyright 2011-2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ *  names of its contributors may be used to endorse or promote products
+ *  derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License (GPL) as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 
THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/* These stubs are required to alloc qbman drivers to determine what ranges of
+ * resources are available for dynamic allocation, primarily because there are
+ * some legacy a priori assumptions in certain subsystems (eg. networking)
+ * that certain resources are reserved for their use. When those drivers (and 
in
+ * some cases, their corresponding device-tree nodes) are updated to 
dynamically
+ * allocate their resources, then *all* resources can be managed by the
+ * allocators and there may be no further need to define these stubs.
+ *
+ * A couple of qualifiers to the above statement though:
+ *
+ * - Some resource ranges are hardware-specific, rather than being defined by
+ *   software memory allocation choices. Eg. the number of available BPIDs is
+ *   baked into silicon and so will probably always need to be expressed in the
+ *   device-tree, though in that case it will express all BPIDs, not just those
+ *   available for dynamic allocation.
+ *
+ * - Even for memory-backed resources that are software determined (FQIDs), 
this
+ *   information may only be configured and available on the control-plane
+ *   partition that manages the device, so in 

Re: [PATCH v2] cxl: Export AFU error buffer via sysfs

2015-05-20 Thread Michael Neuling
On Wed, 2015-05-20 at 22:31 +1000, Michael Neuling wrote:
 On Wed, 2015-05-20 at 22:12 +1000, Michael Neuling wrote:
  On Wed, 2015-05-20 at 16:26 +0530, Vaibhav Jain wrote:
   Export the AFU Error Buffer via sysfs attribute (afu_err_buf). AFU
   error buffer is used by the AFU to report application specific
   errors. The contents of this buffer are AFU specific and are intended to
   be interpreted by the application interacting with the afu.
   
   Testing:
 - Build against pseries le/be configs.
 - Run testing with a special version of memcpy afu on a 'be'
 kernel.
   
   Change-log:
   v1 - v2
 - Simplified cxl_afu_read_err_buffer to handle unaligned reads
 by performing a short read.
   
   Signed-off-by: Vaibhav Jain vaib...@linux.vnet.ibm.com
   ---
Documentation/ABI/testing/sysfs-class-cxl | 11 ++
drivers/misc/cxl/cxl.h|  7 
drivers/misc/cxl/pci.c| 60 
   +++
drivers/misc/cxl/sysfs.c  | 33 +
4 files changed, 111 insertions(+)
   
   diff --git a/Documentation/ABI/testing/sysfs-class-cxl 
   b/Documentation/ABI/testing/sysfs-class-cxl
   index d46bba8..45e9ce3 100644
   --- a/Documentation/ABI/testing/sysfs-class-cxl
   +++ b/Documentation/ABI/testing/sysfs-class-cxl
   @@ -6,6 +6,17 @@ Example: The real path of the attribute 
   /sys/class/cxl/afu0.0s/irqs_max is

Slave contexts (eg. /sys/class/cxl/afu0.0s):

   +What:   /sys/class/cxl/afu/afu_err_buf
   +Date:   September 2014
   +Contact:linuxppc-dev@lists.ozlabs.org
   +Description:read only
   +AFU Error Buffer contents. The contents of this file are
   + application specific and depends on the AFU being used.
   + Applications interacting with the AFU can use this attribute
   + to know about the current error condition and take appropriate
   + action like logging the event etc.
   +
   +
What:   /sys/class/cxl/afu/irqs_max
Date:   September 2014
Contact:linuxppc-dev@lists.ozlabs.org
   diff --git a/drivers/misc/cxl/cxl.h b/drivers/misc/cxl/cxl.h
   index a1cee47..789f077 100644
   --- a/drivers/misc/cxl/cxl.h
   +++ b/drivers/misc/cxl/cxl.h
   @@ -362,6 +362,10 @@ struct cxl_afu {
 struct mutex spa_mutex;
 spinlock_t afu_cntl_lock;

   + /* AFU error buffer fields and bin attribute for sysfs */
   + u64 eb_len, eb_offset;
   + struct bin_attribute attr_eb;
   +
 /*
  * Only the first part of the SPA is used for the process element
  * linked list. The only other part that software needs to worry about
   @@ -563,6 +567,9 @@ static inline void __iomem *_cxl_p2n_addr(struct 
   cxl_afu *afu, cxl_p2n_reg_t reg
u16 cxl_afu_cr_read16(struct cxl_afu *afu, int cr, u64 off);
u8 cxl_afu_cr_read8(struct cxl_afu *afu, int cr, u64 off);

   +ssize_t cxl_afu_read_err_buffer(struct cxl_afu *afu, char *buf,
   + loff_t off, size_t count);
   +

struct cxl_calls {
 void (*cxl_slbia)(struct mm_struct *mm);
   diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
   index 1ef0164..162a8fc 100644
   --- a/drivers/misc/cxl/pci.c
   +++ b/drivers/misc/cxl/pci.c
   @@ -593,6 +593,22 @@ static int cxl_read_afu_descriptor(struct cxl_afu 
   *afu)
 afu-crs_len = AFUD_CR_LEN(val) * 256;
 afu-crs_offset = AFUD_READ_CR_OFF(afu);

   +
   + /* eb_len is in multiple of 4K */
   + afu-eb_len = AFUD_EB_LEN(AFUD_READ_EB(afu)) * 4096;
   + afu-eb_offset = AFUD_READ_EB_OFF(afu);
   +
   + /* eb_off is 4K aligned so lower 12 bits are always zero */
   + if (EXTRACT_PPC_BITS(afu-eb_offset, 0, 11) != 0) {
   + dev_warn(afu-dev,
   +  Invalid AFU error buffer offset %Lx\n,
   +  afu-eb_offset);
   + dev_info(afu-dev,
   +  Ignoring AFU error buffer in the descriptor\n);
   + /* indicate that no afu buffer exists */
   + afu-eb_len = 0;
   + }
   +
 return 0;
}

   @@ -672,6 +688,50 @@ static int sanitise_afu_regs(struct cxl_afu *afu)
 return 0;
}

   +/*
   + * afu_eb_read:
   + * Called from sysfs and reads the afu error info buffer. The h/w only 
   supports
   + * 4/8 bytes aligned access. So most of the code tries to get around 
   this by
   + * reading full 8 bytes aligned chunks, copying it to a temp buffer and 
   dropping
   + * unneeded bytes at the beginning  the end of the requested region.
   + */
   +ssize_t cxl_afu_read_err_buffer(struct cxl_afu *afu, char *buf,
   + loff_t off, size_t count)
   +{
   + u8 tbuff[8];
   + const void __iomem *ebuf = afu-afu_desc_mmio + afu-eb_offset;
   +
   + count = min((size_t)(afu-eb_len - off), count);
   +
   + if (unlikely(count = 0)) {
   + /* handle case where no ebuf exists or offset out of bound */
   + count = 0;
   +
   + 

[PATCH 4/4] powerpc/fsl-booke: Add T1024RDB FMan device tree

2015-05-20 Thread Madalin Bucur
Signed-off-by: Madalin Bucur madalin.bu...@freescale.com
---
 arch/powerpc/boot/dts/t1024rdb.dts | 45 ++
 1 file changed, 45 insertions(+)

diff --git a/arch/powerpc/boot/dts/t1024rdb.dts 
b/arch/powerpc/boot/dts/t1024rdb.dts
index 0984ae8..860e4c7 100644
--- a/arch/powerpc/boot/dts/t1024rdb.dts
+++ b/arch/powerpc/boot/dts/t1024rdb.dts
@@ -161,6 +161,51 @@
#size-cells = 0;
};
};
+
+   fman@40 {
+   fm1mac1: ethernet@e {
+   phy-handle = xg_aqr105_phy3;
+   phy-connection-type = xgmii;
+   sleep = rcpm 0x8000;
+   };
+
+   fm1mac2: ethernet@e2000 {
+   sleep = rcpm 0x4000;
+   };
+
+   fm1mac3: ethernet@e4000 {
+   phy-handle = rgmii_phy2;
+   phy-connection-type = rgmii;
+   sleep = rcpm 0x2000;
+   };
+
+   fm1mac4: ethernet@e6000 {
+   phy-handle = rgmii_phy1;
+   phy-connection-type = rgmii;
+   sleep = rcpm 0x1000;
+   };
+
+
+   mdio0: mdio@fc000 {
+   rgmii_phy1: ethernet-phy@2 {
+   reg = 0x2;
+   };
+   rgmii_phy2: ethernet-phy@6 {
+   reg = 0x6;
+   };
+   };
+
+   xmdio0: mdio@fd000 {
+   xg_aqr105_phy3: ethernet-phy@1 {
+   compatible = 
ethernet-phy-ieee802.3-c45;
+   reg = 0x1;
+   };
+   sg_2500_aqr105_phy4: ethernet-phy@2 {
+   compatible = 
ethernet-phy-ieee802.3-c45;
+   reg = 0x2;
+   };
+   };
+   };
};
 
pci0: pcie@ffe24 {
-- 
1.7.11.7

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[PATCH, v2] powerpc/mpc85xx: Add DPAA Ethernet QMan support to the device tree(s)

2015-05-20 Thread Madalin Bucur
From: Emil Medve emilian.me...@freescale.com

Signed-off-by: Emil Medve emilian.me...@freescale.com
---
 arch/powerpc/boot/dts/b4qds.dtsi   |  1 +
 arch/powerpc/boot/dts/fsl/qoriq-dpaa-res1.dtsi | 77 ++
 arch/powerpc/boot/dts/fsl/qoriq-dpaa-res2.dtsi | 56 +++
 arch/powerpc/boot/dts/fsl/qoriq-dpaa-res3.dtsi | 77 ++
 arch/powerpc/boot/dts/kmcoge4.dts  |  1 +
 arch/powerpc/boot/dts/oca4080.dts  |  1 +
 arch/powerpc/boot/dts/p1023rdb.dts |  1 +
 arch/powerpc/boot/dts/p2041rdb.dts |  1 +
 arch/powerpc/boot/dts/p3041ds.dts  |  1 +
 arch/powerpc/boot/dts/p4080ds.dts  |  1 +
 arch/powerpc/boot/dts/p5020ds.dts  |  1 +
 arch/powerpc/boot/dts/p5040ds.dts  |  1 +
 arch/powerpc/boot/dts/t104xqds.dtsi|  2 +
 arch/powerpc/boot/dts/t104xrdb.dtsi|  2 +
 arch/powerpc/boot/dts/t208xqds.dtsi|  2 +
 arch/powerpc/boot/dts/t208xrdb.dtsi|  2 +
 arch/powerpc/boot/dts/t4240qds.dts |  1 +
 arch/powerpc/boot/dts/t4240rdb.dts |  1 +
 18 files changed, 229 insertions(+)
 create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-dpaa-res1.dtsi
 create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-dpaa-res2.dtsi
 create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-dpaa-res3.dtsi

diff --git a/arch/powerpc/boot/dts/b4qds.dtsi b/arch/powerpc/boot/dts/b4qds.dtsi
index 24ed80d..3cd23db 100644
--- a/arch/powerpc/boot/dts/b4qds.dtsi
+++ b/arch/powerpc/boot/dts/b4qds.dtsi
@@ -218,3 +218,4 @@
 };
 
 /include/ fsl/b4si-post.dtsi
+/include/ fsl/qoriq-dpaa-res3.dtsi
diff --git a/arch/powerpc/boot/dts/fsl/qoriq-dpaa-res1.dtsi 
b/arch/powerpc/boot/dts/fsl/qoriq-dpaa-res1.dtsi
new file mode 100644
index 000..24d83e0
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-dpaa-res1.dtsi
@@ -0,0 +1,77 @@
+/*
+ * QorIQ DPAA resources device tree stub [ FQIDs, BPIDs ]
+ *
+ * Copyright 2011-2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ *  names of its contributors may be used to endorse or promote products
+ *  derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License (GPL) as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 
THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+/* These stubs are required to alloc qbman drivers to determine what ranges of
+ * resources are available for dynamic allocation, primarily because there are
+ * some legacy a priori assumptions in certain subsystems (eg. networking)
+ * that certain resources are reserved for their use. When those drivers (and 
in
+ * some cases, their corresponding device-tree nodes) are updated to 
dynamically
+ * allocate their resources, then *all* resources can be managed by the
+ * allocators and there may be no further need to define these stubs.
+ *
+ * A couple of qualifiers to the above statement though:
+ *
+ * - Some resource ranges are hardware-specific, rather than being defined by
+ *   software memory allocation choices. Eg. the number of available BPIDs is
+ *   baked into silicon and so will probably always need to be expressed in the
+ *   device-tree, though in that case it will express all BPIDs, not just those
+ *   available for dynamic allocation.
+ *
+ * - Even for memory-backed resources that are software determined (FQIDs), 
this
+ *   information may only be configured and available on the control-plane
+ *   partition that manages the device, so in 

Re: [PATCH v2] cxl: Export AFU error buffer via sysfs

2015-05-20 Thread Michael Neuling
On Wed, 2015-05-20 at 22:12 +1000, Michael Neuling wrote:
 On Wed, 2015-05-20 at 16:26 +0530, Vaibhav Jain wrote:
  Export the AFU Error Buffer via sysfs attribute (afu_err_buf). AFU
  error buffer is used by the AFU to report application specific
  errors. The contents of this buffer are AFU specific and are intended to
  be interpreted by the application interacting with the afu.
  
  Testing:
  - Build against pseries le/be configs.
  - Run testing with a special version of memcpy afu on a 'be'
  kernel.
  
  Change-log:
  v1 - v2
  - Simplified cxl_afu_read_err_buffer to handle unaligned reads
  by performing a short read.
  
  Signed-off-by: Vaibhav Jain vaib...@linux.vnet.ibm.com
  ---
   Documentation/ABI/testing/sysfs-class-cxl | 11 ++
   drivers/misc/cxl/cxl.h|  7 
   drivers/misc/cxl/pci.c| 60 
  +++
   drivers/misc/cxl/sysfs.c  | 33 +
   4 files changed, 111 insertions(+)
  
  diff --git a/Documentation/ABI/testing/sysfs-class-cxl 
  b/Documentation/ABI/testing/sysfs-class-cxl
  index d46bba8..45e9ce3 100644
  --- a/Documentation/ABI/testing/sysfs-class-cxl
  +++ b/Documentation/ABI/testing/sysfs-class-cxl
  @@ -6,6 +6,17 @@ Example: The real path of the attribute 
  /sys/class/cxl/afu0.0s/irqs_max is
   
   Slave contexts (eg. /sys/class/cxl/afu0.0s):
   
  +What:   /sys/class/cxl/afu/afu_err_buf
  +Date:   September 2014
  +Contact:linuxppc-dev@lists.ozlabs.org
  +Description:read only
  +AFU Error Buffer contents. The contents of this file are
  +   application specific and depends on the AFU being used.
  +   Applications interacting with the AFU can use this attribute
  +   to know about the current error condition and take appropriate
  +   action like logging the event etc.
  +
  +
   What:   /sys/class/cxl/afu/irqs_max
   Date:   September 2014
   Contact:linuxppc-dev@lists.ozlabs.org
  diff --git a/drivers/misc/cxl/cxl.h b/drivers/misc/cxl/cxl.h
  index a1cee47..789f077 100644
  --- a/drivers/misc/cxl/cxl.h
  +++ b/drivers/misc/cxl/cxl.h
  @@ -362,6 +362,10 @@ struct cxl_afu {
  struct mutex spa_mutex;
  spinlock_t afu_cntl_lock;
   
  +   /* AFU error buffer fields and bin attribute for sysfs */
  +   u64 eb_len, eb_offset;
  +   struct bin_attribute attr_eb;
  +
  /*
   * Only the first part of the SPA is used for the process element
   * linked list. The only other part that software needs to worry about
  @@ -563,6 +567,9 @@ static inline void __iomem *_cxl_p2n_addr(struct 
  cxl_afu *afu, cxl_p2n_reg_t reg
   u16 cxl_afu_cr_read16(struct cxl_afu *afu, int cr, u64 off);
   u8 cxl_afu_cr_read8(struct cxl_afu *afu, int cr, u64 off);
   
  +ssize_t cxl_afu_read_err_buffer(struct cxl_afu *afu, char *buf,
  +   loff_t off, size_t count);
  +
   
   struct cxl_calls {
  void (*cxl_slbia)(struct mm_struct *mm);
  diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
  index 1ef0164..162a8fc 100644
  --- a/drivers/misc/cxl/pci.c
  +++ b/drivers/misc/cxl/pci.c
  @@ -593,6 +593,22 @@ static int cxl_read_afu_descriptor(struct cxl_afu *afu)
  afu-crs_len = AFUD_CR_LEN(val) * 256;
  afu-crs_offset = AFUD_READ_CR_OFF(afu);
   
  +
  +   /* eb_len is in multiple of 4K */
  +   afu-eb_len = AFUD_EB_LEN(AFUD_READ_EB(afu)) * 4096;
  +   afu-eb_offset = AFUD_READ_EB_OFF(afu);
  +
  +   /* eb_off is 4K aligned so lower 12 bits are always zero */
  +   if (EXTRACT_PPC_BITS(afu-eb_offset, 0, 11) != 0) {
  +   dev_warn(afu-dev,
  +Invalid AFU error buffer offset %Lx\n,
  +afu-eb_offset);
  +   dev_info(afu-dev,
  +Ignoring AFU error buffer in the descriptor\n);
  +   /* indicate that no afu buffer exists */
  +   afu-eb_len = 0;
  +   }
  +
  return 0;
   }
   
  @@ -672,6 +688,50 @@ static int sanitise_afu_regs(struct cxl_afu *afu)
  return 0;
   }
   
  +/*
  + * afu_eb_read:
  + * Called from sysfs and reads the afu error info buffer. The h/w only 
  supports
  + * 4/8 bytes aligned access. So most of the code tries to get around this 
  by
  + * reading full 8 bytes aligned chunks, copying it to a temp buffer and 
  dropping
  + * unneeded bytes at the beginning  the end of the requested region.
  + */
  +ssize_t cxl_afu_read_err_buffer(struct cxl_afu *afu, char *buf,
  +   loff_t off, size_t count)
  +{
  +   u8 tbuff[8];
  +   const void __iomem *ebuf = afu-afu_desc_mmio + afu-eb_offset;
  +
  +   count = min((size_t)(afu-eb_len - off), count);
  +
  +   if (unlikely(count = 0)) {
  +   /* handle case where no ebuf exists or offset out of bound */
  +   count = 0;
  +
  +   } else if ((count = 8)  IS_ALIGNED(off, 8)) {
  +   /* read all the intermediate aligned words 

[PATCH 0/4] Add support for DPAA on T1023RDB and T1024RDB

2015-05-20 Thread Madalin Bucur
These patches depend upon several other patches that are now in review:

[1] powerpc/mpc85xx: Add DPAA Ethernet QMan support to the device tree(s)
[2] powerpc/mpc85xx: Create dts components for the FSL QorIQ DPAA FMan
[3] powerpc/fsl-booke: Add T1023 RDB board support
[3] powerpc/fsl-booke: Add T1024 RDB board support
[3] powerpc/fsl-booke: Add T1024 QDS board support
[3] powerpc/fsl-booke: Add device tree support for T1024/T1023 SoC

Current patchwork links:
[1] https://patchwork.ozlabs.org/patch/474402/
[2] https://patchwork.ozlabs.org/patch/443974/
[3] 
http://patchwork.ozlabs.org/project/linuxppc-dev/list/?=shengzhousubmitter=8045

Madalin Bucur (4):
  powerpc/fsl-booke: Add T1023RDB QBMan device tree components
  powerpc/fsl-booke: Add T1023RDB FMan device tree components
  powerpc/fsl-booke: Add T1024RDB QBMan device tree components
  powerpc/fsl-booke: Add T1024RDB FMan device tree components

 arch/powerpc/boot/dts/fsl/qoriq-fman3l-0.dtsi |  94 ++
 arch/powerpc/boot/dts/fsl/t1023si-post.dtsi   | 136 ++
 arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi|   6 ++
 arch/powerpc/boot/dts/t1023rdb.dts|  69 +
 arch/powerpc/boot/dts/t1024rdb.dts|  73 ++
 5 files changed, 378 insertions(+)
 create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-fman3l-0.dtsi

-- 
1.7.11.7

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[PATCH 1/4] powerpc/fsl-booke: Add T1023RDB QBMan device tree

2015-05-20 Thread Madalin Bucur
Signed-off-by: Madalin Bucur madalin.bu...@freescale.com
---
 arch/powerpc/boot/dts/fsl/t1023si-post.dtsi | 109 
 arch/powerpc/boot/dts/t1023rdb.dts  |  29 
 2 files changed, 138 insertions(+)

diff --git a/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi 
b/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi
index dbe6578..48c1690 100644
--- a/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi
@@ -32,6 +32,21 @@
  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  */
 
+bman_fbpr {
+   compatible = fsl,bman-fbpr;
+   alloc-ranges = 0 0 0x1 0;
+};
+
+qman_fqd {
+   compatible = fsl,qman-fqd;
+   alloc-ranges = 0 0 0x1 0;
+};
+
+qman_pfdr {
+   compatible = fsl,qman-pfdr;
+   alloc-ranges = 0 0 0x1 0;
+};
+
 ifc {
#address-cells = 2;
#size-cells = 1;
@@ -178,6 +193,98 @@
};
 };
 
+bportals {
+   #address-cells = 0x1;
+   #size-cells = 0x1;
+   compatible = simple-bus;
+
+   bman-portal@0 {
+   cell-index = 0x0;
+   compatible = fsl,bman-portal;
+   reg = 0x0 0x4000, 0x100 0x1000;
+   interrupts = 105 2 0 0;
+   };
+   bman-portal@4000 {
+   cell-index = 0x1;
+   compatible = fsl,bman-portal;
+   reg = 0x4000 0x4000, 0x1001000 0x1000;
+   interrupts = 107 2 0 0;
+   };
+   bman-portal@8000 {
+   cell-index = 2;
+   compatible = fsl,bman-portal;
+   reg = 0x8000 0x4000, 0x1002000 0x1000;
+   interrupts = 109 2 0 0;
+   };
+   bman-portal@c000 {
+   cell-index = 0x3;
+   compatible = fsl,bman-portal;
+   reg = 0xc000 0x4000, 0x1003000 0x1000;
+   interrupts = 111 2 0 0;
+   };
+   bman-portal@1 {
+   cell-index = 0x4;
+   compatible = fsl,bman-portal;
+   reg = 0x1 0x4000, 0x1004000 0x1000;
+   interrupts = 113 2 0 0;
+   };
+   bman-portal@14000 {
+   cell-index = 0x5;
+   compatible = fsl,bman-portal;
+   reg = 0x14000 0x4000, 0x1005000 0x1000;
+   interrupts = 115 2 0 0;
+   };
+};
+
+qportals {
+   #address-cells = 0x1;
+   #size-cells = 0x1;
+   compatible = simple-bus;
+
+   qportal0: qman-portal@0 {
+   cell-index = 0x0;
+   compatible = fsl,qman-portal;
+   reg = 0x0 0x4000, 0x100 0x1000;
+   interrupts = 104 0x2 0 0;
+   fsl,qman-channel-id = 0x0;
+   };
+   qportal1: qman-portal@4000 {
+   cell-index = 0x1;
+   compatible = fsl,qman-portal;
+   reg = 0x4000 0x4000, 0x1001000 0x1000;
+   interrupts = 106 0x2 0 0;
+   fsl,qman-channel-id = 0x1;
+   };
+   qportal2: qman-portal@8000 {
+   cell-index = 0x2;
+   compatible = fsl,qman-portal;
+   reg = 0x8000 0x4000, 0x1002000 0x1000;
+   interrupts = 108 0x2 0 0;
+   fsl,qman-channel-id = 0x2;
+   };
+   qportal3: qman-portal@c000 {
+   cell-index = 0x3;
+   compatible = fsl,qman-portal;
+   reg = 0xc000 0x4000, 0x1003000 0x1000;
+   interrupts = 110 0x2 0 0;
+   fsl,qman-channel-id = 0x3;
+   };
+   qportal4: qman-portal@1 {
+   cell-index = 0x4;
+   compatible = fsl,qman-portal;
+   reg = 0x1 0x4000, 0x1004000 0x1000;
+   interrupts = 112 0x2 0 0;
+   fsl,qman-channel-id = 0x4;
+   };
+   qportal5: qman-portal@14000 {
+   cell-index = 0x5;
+   compatible = fsl,qman-portal;
+   reg = 0x14000 0x4000, 0x1005000 0x1000;
+   interrupts = 114 0x2 0 0;
+   fsl,qman-channel-id = 0x5;
+   };
+};
+
 soc {
#address-cells = 1;
#size-cells = 1;
@@ -327,4 +434,6 @@ sata@22 {
 };
 
 /include/ qoriq-sec5.0-0.dtsi
+/include/ qoriq-qman3.dtsi
+/include/ qoriq-bman1.dtsi
 };
diff --git a/arch/powerpc/boot/dts/t1023rdb.dts 
b/arch/powerpc/boot/dts/t1023rdb.dts
index 3780e68..571e070 100644
--- a/arch/powerpc/boot/dts/t1023rdb.dts
+++ b/arch/powerpc/boot/dts/t1023rdb.dts
@@ -41,6 +41,25 @@
#size-cells = 2;
interrupt-parent = mpic;
 
+   reserved-memory {
+   #address-cells = 2;
+   #size-cells = 2;
+   ranges;
+
+   bman_fbpr: bman-fbpr {
+   size = 0 0x100;
+   alignment = 0 0x100;
+   };
+   qman_fqd: qman-fqd {
+   size = 0 0x40;
+   alignment = 0 0x40;
+   };
+   qman_pfdr: qman-pfdr {
+   size = 0 

[PATCH 2/4] powerpc/fsl-booke: Add T1023RDB FMan device tree

2015-05-20 Thread Madalin Bucur
Signed-off-by: Madalin Bucur madalin.bu...@freescale.com
---
 arch/powerpc/boot/dts/fsl/qoriq-fman3l-0.dtsi | 94 +++
 arch/powerpc/boot/dts/fsl/t1023si-post.dtsi   | 27 
 arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi|  6 ++
 arch/powerpc/boot/dts/t1023rdb.dts| 40 
 4 files changed, 167 insertions(+)
 create mode 100644 arch/powerpc/boot/dts/fsl/qoriq-fman3l-0.dtsi

diff --git a/arch/powerpc/boot/dts/fsl/qoriq-fman3l-0.dtsi 
b/arch/powerpc/boot/dts/fsl/qoriq-fman3l-0.dtsi
new file mode 100644
index 000..8e9e272
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/qoriq-fman3l-0.dtsi
@@ -0,0 +1,94 @@
+/*
+ * QorIQ FMan v3 device tree stub [ controller @ offset 0x40 ]
+ *
+ * Copyright 2012 - 2015 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ * * Redistributions of source code must retain the above copyright
+ *  notice, this list of conditions and the following disclaimer.
+ * * Redistributions in binary form must reproduce the above copyright
+ *  notice, this list of conditions and the following disclaimer in the
+ *  documentation and/or other materials provided with the distribution.
+ * * Neither the name of Freescale Semiconductor nor the
+ *  names of its contributors may be used to endorse or promote products
+ *  derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License (GPL) as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 
THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+fman0: fman@40 {
+   #address-cells = 1;
+   #size-cells = 1;
+   cell-index = 0;
+   compatible = fsl,fman;
+   ranges = 0 0x40 0x10;
+   reg = 0x40 0x10;
+   interrupts = 96 2 0 0, 16 2 1 1;
+   clocks = fm0clk;
+   clock-names = fm0clk;
+   fsl,qman-channel-range = 0x800 0x10;
+
+   muram@0 {
+   compatible = fsl,fman-muram;
+   reg = 0x0 0x3;
+   };
+
+   fman0_oh_0x2: port@82000 {
+   cell-index = 0x2;
+   compatible = fsl,fman-v3-port-oh;
+   reg = 0x82000 0x1000;
+   };
+
+   fman0_oh_0x3: port@83000 {
+   cell-index = 0x3;
+   compatible = fsl,fman-v3-port-oh;
+   reg = 0x83000 0x1000;
+   };
+
+   fman0_oh_0x4: port@84000 {
+   cell-index = 0x4;
+   compatible = fsl,fman-v3-port-oh;
+   reg = 0x84000 0x1000;
+   };
+
+   fman0_oh_0x5: port@85000 {
+   cell-index = 0x5;
+   compatible = fsl,fman-v3-port-oh;
+   reg = 0x85000 0x1000;
+   };
+
+   mdio0: mdio@fc000 {
+   #address-cells = 1;
+   #size-cells = 0;
+   compatible = fsl,fman-memac-mdio, fsl,fman-xmdio;
+   reg = 0xfc000 0x1000;
+   };
+
+   xmdio0: mdio@fd000 {
+   #address-cells = 1;
+   #size-cells = 0;
+   compatible = fsl,fman-memac-mdio, fsl,fman-xmdio;
+   reg = 0xfd000 0x1000;
+   };
+
+   ptp_timer0: ptp-timer@fe000 {
+   compatible = fsl,fman-ptp-timer;
+   reg = 0xfe000 0x1000;
+   };
+};
diff --git a/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi 
b/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi
index 48c1690..a6eb7ae 100644
--- a/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi
@@ -344,6 +344,14 @@
reg = 0xe 0xe00;
fsl,has-rstcr;
fsl,liodn-bits = 12;
+
+   fm0clk: fm0-clk-mux {
+   #clock-cells = 0;
+   compatible = fsl,fman-clk-mux;
+   clocks = pll0 1;
+   clock-names = pll0-div2;
+   clock-output-names = fm0-clk;
+   };
};
 
 /include/ qoriq-clockgen2.dtsi
@@ -436,4 +444,23 @@ 

[PATCH 3/4] powerpc/fsl-booke: Add T1024RDB QBMan device tree

2015-05-20 Thread Madalin Bucur
Signed-off-by: Madalin Bucur madalin.bu...@freescale.com
---
 arch/powerpc/boot/dts/t1024rdb.dts | 28 
 1 file changed, 28 insertions(+)

diff --git a/arch/powerpc/boot/dts/t1024rdb.dts 
b/arch/powerpc/boot/dts/t1024rdb.dts
index eb1d51b..0984ae8 100644
--- a/arch/powerpc/boot/dts/t1024rdb.dts
+++ b/arch/powerpc/boot/dts/t1024rdb.dts
@@ -41,6 +41,25 @@
#size-cells = 2;
interrupt-parent = mpic;
 
+   reserved-memory {
+   #address-cells = 2;
+   #size-cells = 2;
+   ranges;
+
+   bman_fbpr: bman-fbpr {
+   size = 0 0x100;
+   alignment = 0 0x100;
+   };
+   qman_fqd: qman-fqd {
+   size = 0 0x40;
+   alignment = 0 0x40;
+   };
+   qman_pfdr: qman-pfdr {
+   size = 0 0x200;
+   alignment = 0 0x200;
+   };
+   };
+
ifc: localbus@ffe124000 {
reg = 0xf 0xfe124000 0 0x2000;
ranges = 0 0 0xf 0xe800 0x0800
@@ -82,6 +101,14 @@
ranges = 0x 0xf 0x 0x01072000;
};
 
+   bportals: bman-portals@ff400 {
+   ranges = 0x0 0xf 0xf400 0x200;
+   };
+
+   qportals: qman-portals@ff600 {
+   ranges = 0x0 0xf 0xf600 0x200;
+   };
+
soc: soc@ffe00 {
ranges = 0x 0xf 0xfe00 0x100;
reg = 0xf 0xfe00 0 0x1000;
@@ -183,3 +210,4 @@
 };
 
 /include/ fsl/t1024si-post.dtsi
+/include/ fsl/qoriq-dpaa-res3.dtsi
-- 
1.7.11.7

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[PATCH v3] cxl: Export AFU error buffer via sysfs

2015-05-20 Thread Vaibhav Jain
Export the AFU Error Buffer via sysfs attribute (afu_err_buf). AFU
error buffer is used by the AFU to report application specific
errors. The contents of this buffer are AFU specific and are intended to
be interpreted by the application interacting with the afu.

Testing:
- Build against pseries le/be configs.
- Run testing with a special version of memcpy afu on a 'be'
kernel.

Change-log:
v2 - v3
- Addressed mikey's comment to further simplify
cxl_afu_read_err_buffer to use a bounce buffer for unaligned
reads.

v1 - v2
- Simplified cxl_afu_read_err_buffer to handle unaligned reads
by performing a short read.

Signed-off-by: Vaibhav Jain vaib...@linux.vnet.ibm.com
---
 Documentation/ABI/testing/sysfs-class-cxl | 11 ++
 drivers/misc/cxl/cxl.h|  7 
 drivers/misc/cxl/pci.c| 62 +++
 drivers/misc/cxl/sysfs.c  | 33 
 4 files changed, 113 insertions(+)

diff --git a/Documentation/ABI/testing/sysfs-class-cxl 
b/Documentation/ABI/testing/sysfs-class-cxl
index d46bba8..45e9ce3 100644
--- a/Documentation/ABI/testing/sysfs-class-cxl
+++ b/Documentation/ABI/testing/sysfs-class-cxl
@@ -6,6 +6,17 @@ Example: The real path of the attribute 
/sys/class/cxl/afu0.0s/irqs_max is
 
 Slave contexts (eg. /sys/class/cxl/afu0.0s):
 
+What:   /sys/class/cxl/afu/afu_err_buf
+Date:   September 2014
+Contact:linuxppc-dev@lists.ozlabs.org
+Description:read only
+AFU Error Buffer contents. The contents of this file are
+   application specific and depends on the AFU being used.
+   Applications interacting with the AFU can use this attribute
+   to know about the current error condition and take appropriate
+   action like logging the event etc.
+
+
 What:   /sys/class/cxl/afu/irqs_max
 Date:   September 2014
 Contact:linuxppc-dev@lists.ozlabs.org
diff --git a/drivers/misc/cxl/cxl.h b/drivers/misc/cxl/cxl.h
index a1cee47..789f077 100644
--- a/drivers/misc/cxl/cxl.h
+++ b/drivers/misc/cxl/cxl.h
@@ -362,6 +362,10 @@ struct cxl_afu {
struct mutex spa_mutex;
spinlock_t afu_cntl_lock;
 
+   /* AFU error buffer fields and bin attribute for sysfs */
+   u64 eb_len, eb_offset;
+   struct bin_attribute attr_eb;
+
/*
 * Only the first part of the SPA is used for the process element
 * linked list. The only other part that software needs to worry about
@@ -563,6 +567,9 @@ static inline void __iomem *_cxl_p2n_addr(struct cxl_afu 
*afu, cxl_p2n_reg_t reg
 u16 cxl_afu_cr_read16(struct cxl_afu *afu, int cr, u64 off);
 u8 cxl_afu_cr_read8(struct cxl_afu *afu, int cr, u64 off);
 
+ssize_t cxl_afu_read_err_buffer(struct cxl_afu *afu, char *buf,
+   loff_t off, size_t count);
+
 
 struct cxl_calls {
void (*cxl_slbia)(struct mm_struct *mm);
diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
index 1ef0164..c615f8d 100644
--- a/drivers/misc/cxl/pci.c
+++ b/drivers/misc/cxl/pci.c
@@ -593,6 +593,22 @@ static int cxl_read_afu_descriptor(struct cxl_afu *afu)
afu-crs_len = AFUD_CR_LEN(val) * 256;
afu-crs_offset = AFUD_READ_CR_OFF(afu);
 
+
+   /* eb_len is in multiple of 4K */
+   afu-eb_len = AFUD_EB_LEN(AFUD_READ_EB(afu)) * 4096;
+   afu-eb_offset = AFUD_READ_EB_OFF(afu);
+
+   /* eb_off is 4K aligned so lower 12 bits are always zero */
+   if (EXTRACT_PPC_BITS(afu-eb_offset, 0, 11) != 0) {
+   dev_warn(afu-dev,
+Invalid AFU error buffer offset %Lx\n,
+afu-eb_offset);
+   dev_info(afu-dev,
+Ignoring AFU error buffer in the descriptor\n);
+   /* indicate that no afu buffer exists */
+   afu-eb_len = 0;
+   }
+
return 0;
 }
 
@@ -672,6 +688,52 @@ static int sanitise_afu_regs(struct cxl_afu *afu)
return 0;
 }
 
+/*
+ * afu_eb_read:
+ * Called from sysfs and reads the afu error info buffer. The h/w only supports
+ * 4/8 bytes aligned access. So in case the requested offset/count arent 8 byte
+ * aligned the function uses a bounce buffer which can be max PAGE_SIZE.
+ */
+ssize_t cxl_afu_read_err_buffer(struct cxl_afu *afu, char *buf,
+   loff_t off, size_t count)
+{
+   loff_t aligned_off;
+   size_t aligned_count;
+   const void __iomem *ebuf = afu-afu_desc_mmio + afu-eb_offset;
+
+   if (!afu-eb_len || count == 0 || off  0)
+   return 0;
+
+   /* calculate aligned read window */
+   count = min((size_t)(afu-eb_len - off), count);
+   aligned_off = round_down(off, 8);
+   aligned_count = round_up(off + count, 8) - aligned_off;
+
+   /* fast path */
+   if ((aligned_off == off)  (aligned_count == count)) {
+   /* no need 

Re: [PATCH] powerpc/powernv: Fix idle state allocation corruption

2015-05-20 Thread Shreyas B Prabhu


On Wednesday 20 May 2015 10:43 PM, Jack Miller wrote:
 pnv_alloc_idle_core_states is iterating over PACAs based on the
 configured maximum number of CPUs (NR_CPUS), but PACAs are only
 initialized up to nr_cpu_ids, so rein in loops to keep from overwriting
 adjacent memory.
 

Hi Jack,

Jan Stancek has a patch fixing this (d52356e7f powerpc: fix memory
corruption by pnv_alloc_idle_core_states).

Thanks,
Shreyas

 Signed-off-by: Jack Miller mille...@us.ibm.com
 ---
  arch/powerpc/platforms/powernv/setup.c | 26 +++---
  1 file changed, 11 insertions(+), 15 deletions(-)
 
 diff --git a/arch/powerpc/platforms/powernv/setup.c 
 b/arch/powerpc/platforms/powernv/setup.c
 index ad0e32e..8e794b6 100644
 --- a/arch/powerpc/platforms/powernv/setup.c
 +++ b/arch/powerpc/platforms/powernv/setup.c
 @@ -356,9 +356,8 @@ int pnv_save_sprs_for_winkle(void)
 
  static void pnv_alloc_idle_core_states(void)
  {
 - int i, j;
 - int nr_cores = cpu_nr_cores();
 - u32 *core_idle_state;
 + u32 *core_idle_state = NULL;
 + int i, thread;
 
   /*
* core_idle_state - First 8 bits track the idle state of each thread
 @@ -371,20 +370,17 @@ static void pnv_alloc_idle_core_states(void)
* b. While the last thread in the core is saving the core state, it
* prevents a different thread from waking up.
*/
 - for (i = 0; i  nr_cores; i++) {
 - int first_cpu = i * threads_per_core;
 - int node = cpu_to_node(first_cpu);
 + for (i = 0; i  nr_cpu_ids; i++) {
 + thread = i % threads_per_core;
 
 - core_idle_state = kmalloc_node(sizeof(u32), GFP_KERNEL, node);
 - *core_idle_state = PNV_CORE_IDLE_THREAD_BITS;
 -
 - for (j = 0; j  threads_per_core; j++) {
 - int cpu = first_cpu + j;
 -
 - paca[cpu].core_idle_state_ptr = core_idle_state;
 - paca[cpu].thread_idle_state = PNV_THREAD_RUNNING;
 - paca[cpu].thread_mask = 1  j;
 + if (thread == 0) {
 + core_idle_state = kmalloc_node(sizeof(u32), GFP_KERNEL, 
 cpu_to_node(i));
 + *core_idle_state = PNV_CORE_IDLE_THREAD_BITS;
   }
 +
 + paca[i].core_idle_state_ptr = core_idle_state;
 + paca[i].thread_idle_state = PNV_THREAD_RUNNING;
 + paca[i].thread_mask = 1  thread;
   }
 
   update_subcore_sibling_mask();
 

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[PATCH] powerpc/powernv: Fix idle state allocation corruption

2015-05-20 Thread Jack Miller
pnv_alloc_idle_core_states is iterating over PACAs based on the
configured maximum number of CPUs (NR_CPUS), but PACAs are only
initialized up to nr_cpu_ids, so rein in loops to keep from overwriting
adjacent memory.

Signed-off-by: Jack Miller mille...@us.ibm.com
---
 arch/powerpc/platforms/powernv/setup.c | 26 +++---
 1 file changed, 11 insertions(+), 15 deletions(-)

diff --git a/arch/powerpc/platforms/powernv/setup.c 
b/arch/powerpc/platforms/powernv/setup.c
index ad0e32e..8e794b6 100644
--- a/arch/powerpc/platforms/powernv/setup.c
+++ b/arch/powerpc/platforms/powernv/setup.c
@@ -356,9 +356,8 @@ int pnv_save_sprs_for_winkle(void)
 
 static void pnv_alloc_idle_core_states(void)
 {
-   int i, j;
-   int nr_cores = cpu_nr_cores();
-   u32 *core_idle_state;
+   u32 *core_idle_state = NULL;
+   int i, thread;
 
/*
 * core_idle_state - First 8 bits track the idle state of each thread
@@ -371,20 +370,17 @@ static void pnv_alloc_idle_core_states(void)
 * b. While the last thread in the core is saving the core state, it
 * prevents a different thread from waking up.
 */
-   for (i = 0; i  nr_cores; i++) {
-   int first_cpu = i * threads_per_core;
-   int node = cpu_to_node(first_cpu);
+   for (i = 0; i  nr_cpu_ids; i++) {
+   thread = i % threads_per_core;
 
-   core_idle_state = kmalloc_node(sizeof(u32), GFP_KERNEL, node);
-   *core_idle_state = PNV_CORE_IDLE_THREAD_BITS;
-
-   for (j = 0; j  threads_per_core; j++) {
-   int cpu = first_cpu + j;
-
-   paca[cpu].core_idle_state_ptr = core_idle_state;
-   paca[cpu].thread_idle_state = PNV_THREAD_RUNNING;
-   paca[cpu].thread_mask = 1  j;
+   if (thread == 0) {
+   core_idle_state = kmalloc_node(sizeof(u32), GFP_KERNEL, 
cpu_to_node(i));
+   *core_idle_state = PNV_CORE_IDLE_THREAD_BITS;
}
+
+   paca[i].core_idle_state_ptr = core_idle_state;
+   paca[i].thread_idle_state = PNV_THREAD_RUNNING;
+   paca[i].thread_mask = 1  thread;
}
 
update_subcore_sibling_mask();
-- 
2.4.1

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Re: [PATCH] powerpc/powernv: Fix idle state allocation corruption

2015-05-20 Thread Jack Miller
On Wed, May 20, 2015 at 10:58:42PM +0530, Shreyas B Prabhu wrote:
 
 
 On Wednesday 20 May 2015 10:43 PM, Jack Miller wrote:
  pnv_alloc_idle_core_states is iterating over PACAs based on the
  configured maximum number of CPUs (NR_CPUS), but PACAs are only
  initialized up to nr_cpu_ids, so rein in loops to keep from overwriting
  adjacent memory.
  
 
 Hi Jack,
 
 Jan Stancek has a patch fixing this (d52356e7f powerpc: fix memory
 corruption by pnv_alloc_idle_core_states).

Must've missed it, just ran into the issue and didn't see a fix upstream.
Just found it in the April list archive.

Thanks,

- Jack

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Re: [Patch v2 08/14] genirq: Introduce helper function irq_data_get_affinity_mask()

2015-05-20 Thread Thomas Gleixner
On Wed, 20 May 2015, Jiang Liu wrote:

 Introduce helper function irq_data_get_affinity_mask() and
 irq_get_affinity_mask() to hide implementation details,

That patch does way more than introducing the functions. Again:

Patch 1: Introduce helpers

Patch 2-n: Convert users subsystem wise

Thanks,

tglx
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Re: [PATCH] drivers/mtd: add powernv flash MTD abstraction driver

2015-05-20 Thread Brian Norris
You might run this through checkpatch, as it caught several small
things.

On Mon, May 04, 2015 at 04:42:19PM +1000, Cyril Bur wrote:
 Powerpc powernv platforms allow access to certain system flash devices
 through a firmwarwe interface. This change adds an mtd driver for these
 flash devices.
 
 Minor updates from Jeremy Kerr and Joel Stanley.
 
 Signed-off-by: Cyril Bur cyril...@gmail.com
 Signed-off-by: Joel Stanley j...@jms.id.au
 Signed-off-by: Jeremy Kerr j...@ozlabs.org

While I have Jeremy's attention, let me plug a friendly reminder for
this unrelated comment:

http://patchwork.ozlabs.org/patch/413355/

Jeremy, you still haven't updated patchwork.git for your last round of
supposed merges.

 ---
  drivers/mtd/devices/Kconfig |   6 +
  drivers/mtd/devices/Makefile|   1 +
  drivers/mtd/devices/powernv_flash.c | 288 
 
  3 files changed, 295 insertions(+)
  create mode 100644 drivers/mtd/devices/powernv_flash.c
 
 diff --git a/drivers/mtd/devices/Kconfig b/drivers/mtd/devices/Kconfig
 index c49d0b1..5065e7c 100644
 --- a/drivers/mtd/devices/Kconfig
 +++ b/drivers/mtd/devices/Kconfig
 @@ -195,6 +195,12 @@ config MTD_BLOCK2MTD
 Testing MTD users (eg JFFS2) on large media and media that might
 be removed during a write (using the floppy drive).
  
 +config MTD_POWERNV_FLASH
 + tristate powernv flash MTD driver
 + depends on PPC_POWERNV
 + help
 +   This provides an MTD device for flash on powernv OPAL platforms
 +
  comment Disk-On-Chip Device Drivers
  
  config MTD_DOCG3
 diff --git a/drivers/mtd/devices/Makefile b/drivers/mtd/devices/Makefile
 index f0b0e61..7912d3a 100644
 --- a/drivers/mtd/devices/Makefile
 +++ b/drivers/mtd/devices/Makefile
 @@ -16,6 +16,7 @@ obj-$(CONFIG_MTD_SPEAR_SMI) += spear_smi.o
  obj-$(CONFIG_MTD_SST25L) += sst25l.o
  obj-$(CONFIG_MTD_BCM47XXSFLASH)  += bcm47xxsflash.o
  obj-$(CONFIG_MTD_ST_SPI_FSM)+= st_spi_fsm.o
 +obj-$(CONFIG_MTD_POWERNV_FLASH)  += powernv_flash.o
  
  
  CFLAGS_docg3.o   += -I$(src)
 diff --git a/drivers/mtd/devices/powernv_flash.c 
 b/drivers/mtd/devices/powernv_flash.c
 new file mode 100644
 index 000..18f8a19
 --- /dev/null
 +++ b/drivers/mtd/devices/powernv_flash.c
 @@ -0,0 +1,288 @@
 +/*
 + * OPAL PNOR flash MTD abstraction
 + *
 + * IBM 2015
 + *
 + * This program is free software; you can redistribute it and/or modify
 + * it under the terms of the GNU General Public License as published by
 + * the Free Software Foundation; either version 2 of the License, or
 + * (at your option) any later version.
 + *
 + * This program is distributed in the hope that it will be useful,
 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 + * GNU General Public License for more details.
 + *
 + * You should have received a copy of the GNU General Public License
 + * along with this program; if not, write to the Free Software
 + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA

ERROR:FSF_MAILING_ADDRESS: Do not include the paragraph about writing to the
Free Software Foundation's mailing address from the sample GPL notice. The FSF
has changed addresses in the past, and may do so again. Linux already includes
a copy of the GPL.
#74: FILE: drivers/mtd/devices/powernv_flash.c:17:
+ * along with this program; if not, write to the Free Software$

 + *
 + */
 +
 +#include linux/kernel.h
 +#include linux/module.h
 +#include linux/errno.h
 +#include linux/of.h
 +#include linux/of_address.h
 +#include linux/platform_device.h
 +#include linux/string.h
 +#include linux/slab.h
 +#include linux/mtd/mtd.h
 +#include linux/mtd/partitions.h
 +
 +#include linux/debugfs.h
 +#include linux/seq_file.h
 +
 +#include asm/opal.h
 +
 +
 +/*
 + * This driver creates the a Linux MTD abstraction for platform PNOR flash
 + * backed by OPAL calls
 + */
 +
 +struct powernv_flash {
 + struct mtd_info mtd;
 + uint64_tid;
 +};
 +
 +enum flash_op {
 + FLASH_OP_READ,
 + FLASH_OP_WRITE,
 + FLASH_OP_ERASE,
 +};
 +
 +static int powernv_flash_async_op(struct mtd_info *mtd, enum flash_op op,
 + loff_t offset, size_t len, size_t *retlen, u_char *buf)
 +{
 + struct powernv_flash *info = (struct powernv_flash *)mtd-priv;
 + struct device *dev = mtd-dev;
 + int token;
 + struct opal_msg msg;
 + int rc;
 +
 + dev_dbg(dev, %s(op=%d, offset=0x%llx, len=%zu)\n,
 + __func__, op, offset, len);
 +
 + token = opal_async_get_token_interruptible();
 + if (token  0) {
 + dev_err(dev, Failed to get an async token\n);
 + return -ENOMEM;
 + }
 +
 + switch (op) {
 + case FLASH_OP_READ:
 + rc = opal_flash_read(info-id, offset, __pa(buf), len, token);
 + break;
 + case FLASH_OP_WRITE:
 + rc = opal_flash_write(info-id, offset, 

Re: [PATCH kernel] commit 4fbdf9cb (lpfc: Fix for lun discovery issue with saturn adapter.)

2015-05-20 Thread James Smart

Not sure - I'll go look.

-- james


On 5/19/2015 11:55 PM, Alexey Kardashevskiy wrote:

On 05/06/2015 07:46 AM, Sebastian Herbszt wrote:

James Smart wrote:


Reviewed-By: James Smart james.sm...@emulex.com


Alexey, Sebastian,

Yes - this section needs to be reverted.  This patch is good.

-- james s


Reviewed-by: Sebastian Herbszt herb...@gmx.de



Unfortunately, just this revert is not enough, it fixed one of my 
machines but I have another machine with Emulex Corporation Saturn-X: 
LightPulse Fibre Channel Host Adapter (rev 03) which does not boot - 
the booting process stops at [  OK  ] Reached target Basic System.


Any quick idea what else to revert between 4.0 and current upstream 
before I dig further? Thanks!






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Re: [Patch v2 08/14] genirq: Introduce helper function irq_data_get_affinity_mask()

2015-05-20 Thread Russell King - ARM Linux
On Wed, May 20, 2015 at 05:40:39PM +0800, Jiang Liu wrote:
 diff --git a/arch/arm/kernel/irq.c b/arch/arm/kernel/irq.c
 index 350f188c92d2..baf8edebe26f 100644
 --- a/arch/arm/kernel/irq.c
 +++ b/arch/arm/kernel/irq.c
 @@ -140,7 +140,7 @@ int __init arch_probe_nr_irqs(void)
  static bool migrate_one_irq(struct irq_desc *desc)
  {
   struct irq_data *d = irq_desc_get_irq_data(desc);
 - const struct cpumask *affinity = d-affinity;
 + const struct cpumask *affinity = irq_data_get_affinity_mask(d);
   struct irq_chip *c;
   bool ret = false;
  
 @@ -160,7 +160,7 @@ static bool migrate_one_irq(struct irq_desc *desc)
   if (!c-irq_set_affinity)
   pr_debug(IRQ%u: unable to set affinity\n, d-irq);
   else if (c-irq_set_affinity(d, affinity, false) == IRQ_SET_MASK_OK  
 ret)
 - cpumask_copy(d-affinity, affinity);
 + cpumask_copy(irq_data_get_affinity_mask(d), affinity);
  
   return ret;
  }

 diff --git a/include/linux/irq.h b/include/linux/irq.h
 index 43581e166298..2eb82257aaee 100644
 --- a/include/linux/irq.h
 +++ b/include/linux/irq.h
 @@ -650,6 +650,18 @@ static inline int irq_data_get_node(struct irq_data *d)
   return irq_common_data_get_node(d-common);
  }
  
 +static inline struct cpumask *irq_get_affinity_mask(int irq)
 +{
 + struct irq_data *d = irq_get_irq_data(irq);
 +
 + return d ? d-affinity : NULL;
 +}
 +
 +static inline struct cpumask *irq_data_get_affinity_mask(struct irq_data *d)
 +{
 + return d-affinity;
 +}
 +
  unsigned int arch_dynirq_lower_bound(unsigned int from);
  
  int __irq_alloc_descs(int irq, unsigned int from, unsigned int cnt, int node,

For the above only,

Acked-by: Russell King rmk+ker...@arm.linux.org.uk

Thanks.

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Re: [PATCH kernel] commit 4fbdf9cb (lpfc: Fix for lun discovery issue with saturn adapter.)

2015-05-20 Thread James Smart

Alexey,

Can you send me boot messages so I can see everything the lpfc driver 
may have done ?

And you're using 10.5.0.0 verbatim ?

-- james


On 5/20/2015 9:11 AM, James Smart wrote:

Not sure - I'll go look.

-- james


On 5/19/2015 11:55 PM, Alexey Kardashevskiy wrote:

On 05/06/2015 07:46 AM, Sebastian Herbszt wrote:

James Smart wrote:


Reviewed-By: James Smart james.sm...@emulex.com


Alexey, Sebastian,

Yes - this section needs to be reverted.  This patch is good.

-- james s


Reviewed-by: Sebastian Herbszt herb...@gmx.de



Unfortunately, just this revert is not enough, it fixed one of my 
machines but I have another machine with Emulex Corporation 
Saturn-X: LightPulse Fibre Channel Host Adapter (rev 03) which does 
not boot - the booting process stops at [  OK  ] Reached target 
Basic System.


Any quick idea what else to revert between 4.0 and current upstream 
before I dig further? Thanks!








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Re: [PATCH V5 2/3] powerpc/mm: Use generic version of pmdp_clear_flush

2015-05-20 Thread Andrew Morton
On Fri, 15 May 2015 21:12:29 +0530 Aneesh Kumar K.V 
aneesh.ku...@linux.vnet.ibm.com wrote:

 Also move the pmd_trans_huge check to generic code.
 
 ...

 --- a/include/asm-generic/pgtable.h
 +++ b/include/asm-generic/pgtable.h
 @@ -196,7 +196,12 @@ static inline pmd_t pmdp_collapse_flush(struct 
 vm_area_struct *vma,
   unsigned long address,
   pmd_t *pmdp)
  {
 - return pmdp_clear_flush(vma, address, pmdp);
 + pmd_t pmd;
 + VM_BUG_ON(address  ~HPAGE_PMD_MASK);
 + VM_BUG_ON(pmd_trans_huge(*pmdp));
 + pmd = pmdp_get_and_clear(vma-vm_mm, address, pmdp);
 + flush_tlb_range(vma, address, address + HPAGE_PMD_SIZE);
 + return pmd;
  }

x86_64 allmodconfig:

In file included from ./arch/x86/include/asm/pgtable.h:878,
 from include/linux/mm.h:53,
 from include/linux/suspend.h:8,
 from arch/x86/kernel/asm-offsets.c:12:
include/asm-generic/pgtable.h: In function 'pmdp_collapse_flush':
include/asm-generic/pgtable.h:199: error: 'HPAGE_PMD_MASK' undeclared (first 
use in this function)
include/asm-generic/pgtable.h:199: error: (Each undeclared identifier is 
reported only once
include/asm-generic/pgtable.h:199: error: for each function it appears in.)
include/asm-generic/pgtable.h:202: error: implicit declaration of function 
'flush_tlb_range'
include/asm-generic/pgtable.h:202: error: 'HPAGE_PMD_SIZE' undeclared (first 
use in this function)


Including linux/huge_mm.h doesn't work.  A suitable fix would be to
move this into a .c file.

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Re: [PATCH 1/1] KVM: PPC: Book3S: correct width in XER handling

2015-05-20 Thread Scott Wood
On Wed, 2015-05-20 at 15:26 +1000, Sam Bobroff wrote:
 In 64 bit kernels, the Fixed Point Exception Register (XER) is a 64
 bit field (e.g. in kvm_regs and kvm_vcpu_arch) and in most places it is
 accessed as such.
 
 This patch corrects places where it is accessed as a 32 bit field by a
 64 bit kernel.  In some cases this is via a 32 bit load or store
 instruction which, depending on endianness, will cause either the
 lower or upper 32 bits to be missed.  In another case it is cast as a
 u32, causing the upper 32 bits to be cleared.
 
 This patch corrects those places by extending the access methods to
 64 bits.
 
 Signed-off-by: Sam Bobroff sam.bobr...@au1.ibm.com
 ---
 
  arch/powerpc/include/asm/kvm_book3s.h   |4 ++--
  arch/powerpc/kvm/book3s_hv_rmhandlers.S |6 +++---
  arch/powerpc/kvm/book3s_segment.S   |4 ++--
  3 files changed, 7 insertions(+), 7 deletions(-)

It's nominally a 64-bit register, but the upper 32 bits are reserved in
ISA 2.06.  Do newer ISAs or certain implementations define things in the
upper 32 bits, or is this just about the asm accesses being wrong on
big-endian?

Also, I see the same issue in the booke code (CCing Mihai).

-Scott

 diff --git a/arch/powerpc/include/asm/kvm_book3s.h 
 b/arch/powerpc/include/asm/kvm_book3s.h
 index b91e74a..05a875a 100644
 --- a/arch/powerpc/include/asm/kvm_book3s.h
 +++ b/arch/powerpc/include/asm/kvm_book3s.h
 @@ -225,12 +225,12 @@ static inline u32 kvmppc_get_cr(struct kvm_vcpu *vcpu)
   return vcpu-arch.cr;
  }
  
 -static inline void kvmppc_set_xer(struct kvm_vcpu *vcpu, u32 val)
 +static inline void kvmppc_set_xer(struct kvm_vcpu *vcpu, ulong val)
  {
   vcpu-arch.xer = val;
  }
  
 -static inline u32 kvmppc_get_xer(struct kvm_vcpu *vcpu)
 +static inline ulong kvmppc_get_xer(struct kvm_vcpu *vcpu)
  {
   return vcpu-arch.xer;
  }
 diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S 
 b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
 index 4d70df2..d75be59 100644
 --- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
 +++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
 @@ -870,7 +870,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
   blt hdec_soon
  
   ld  r6, VCPU_CTR(r4)
 - lwz r7, VCPU_XER(r4)
 + ld  r7, VCPU_XER(r4)
  
   mtctr   r6
   mtxer   r7
 @@ -1103,7 +1103,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_HAS_PPR)
   mfctr   r3
   mfxer   r4
   std r3, VCPU_CTR(r9)
 - stw r4, VCPU_XER(r9)
 + std r4, VCPU_XER(r9)
  
   /* If this is a page table miss then see if it's theirs or ours */
   cmpwi   r12, BOOK3S_INTERRUPT_H_DATA_STORAGE
 @@ -1675,7 +1675,7 @@ kvmppc_hdsi:
   bl  kvmppc_msr_interrupt
  fast_interrupt_c_return:
  6:   ld  r7, VCPU_CTR(r9)
 - lwz r8, VCPU_XER(r9)
 + ld  r8, VCPU_XER(r9)
   mtctr   r7
   mtxer   r8
   mr  r4, r9
 diff --git a/arch/powerpc/kvm/book3s_segment.S 
 b/arch/powerpc/kvm/book3s_segment.S
 index acee37c..ca8f174 100644
 --- a/arch/powerpc/kvm/book3s_segment.S
 +++ b/arch/powerpc/kvm/book3s_segment.S
 @@ -123,7 +123,7 @@ no_dcbz32_on:
   PPC_LL  r8, SVCPU_CTR(r3)
   PPC_LL  r9, SVCPU_LR(r3)
   lwz r10, SVCPU_CR(r3)
 - lwz r11, SVCPU_XER(r3)
 + PPC_LL  r11, SVCPU_XER(r3)
  
   mtctr   r8
   mtlrr9
 @@ -237,7 +237,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
   mfctr   r8
   mflrr9
  
 - stw r5, SVCPU_XER(r13)
 + PPC_STL r5, SVCPU_XER(r13)
   PPC_STL r6, SVCPU_FAULT_DAR(r13)
   stw r7, SVCPU_FAULT_DSISR(r13)
   PPC_STL r8, SVCPU_CTR(r13)


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Re: [PATCH 3/4] perf: Use pmu_events_map table to create event aliases

2015-05-20 Thread Sukadev Bhattiprolu
Andi Kleen [a...@linux.intel.com] wrote:
|  +/*
|  + * Return TRUE if the CPU identified by @vfm, @version, and @type
|  + * matches the current CPU.  vfm refers to [Vendor, Family, Model],
|  + *
|  + * Return FALSE otherwise.
|  + *
|  + * For Powerpc, we only compare @version to the processor PVR.
|  + */
|  +bool arch_pmu_events_match_cpu(const char *vfm __maybe_unused,
|  +   const char *version,
|  +   const char *type __maybe_unused)
|  +{
|  +   char *cpustr;
|  +   bool rc;
|  +
|  +   cpustr = get_cpu_str();
|  +   rc = !strcmp(version, cpustr);
| 
| 
| Surely against vfm not version
| I think your mapfile is wrong if that works?

Like I say in the comment, and elsewhere, each archictecture
could use a subset of [vfm, version, type] to match the CPU.

On Power, we use the PVR, which is a string like 004d0100,
to uniquely identify the CPU.

Obviously, that does not fit into the VFM field. We could either
add a new PVR field to the mapfile:

[vfm, version, type, pvr]

or, as the patch currently does, let architectures intepret the
version field as they see fit?

IOW, leave it to architectures to keep arch_pmu_events_match_cpu()
consistent with _their_ mapfile?

| 
| That's the Intel format:
| 
| .vfm = GenuineIntel-6-3E,
| .version = V16,
| .type = core,
| .table = pme_IvyTown_core
| 
| 
| -Andi

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Re: [PATCH v3] cxl: Export AFU error buffer via sysfs

2015-05-20 Thread Michael Neuling
+ */
 +ssize_t cxl_afu_read_err_buffer(struct cxl_afu *afu, char *buf,
 + loff_t off, size_t count)
 +{
 + loff_t aligned_off;
 + size_t aligned_count;
 + const void __iomem *ebuf = afu-afu_desc_mmio + afu-eb_offset;
 +
 + if (!afu-eb_len || count == 0 || off  0)

if eb_len == 0 we don't even create the sysfs file.  So is this check
needed?

 + return 0;
 +
 + /* calculate aligned read window */
 + count = min((size_t)(afu-eb_len - off), count);

What if count ends up being negative because off  afu-eb_len??

 + aligned_off = round_down(off, 8);
 + aligned_count = round_up(off + count, 8) - aligned_off;

I kinda preferred the start end variables, and length was just end -
start.

I though it was more readable. IMHO

How about:

aligned_start = round_down(off, 8);
aligned_end = round_up(off + count, 8);
aligned_length = aligned_end - aligned_start;

 +
 + /* fast path */
 + if ((aligned_off == off)  (aligned_count == count)) {
 + /* no need to use the bounce buffer */
 + _memcpy_fromio(buf, ebuf + off, count);

I would drop this, as the other code path should work fine.
Premature optimisation.

 +
 + } else {
 + /* use bounce buffer for copy */
 + void *tbuf = (void *)__get_free_page(GFP_TEMPORARY);
 +
 + if (!tbuf)
 + return -ENOMEM;
 +
 + /* max we can copy in one read is PAGE_SIZE */
 + aligned_count = min(aligned_count, PAGE_SIZE);
 + _memcpy_fromio(tbuf, ebuf + aligned_off, aligned_count);
 +
 + count = min(count, aligned_count);

This doesn't seem right.  count will equal PAGE_SIZE if it's too big but
it has to be smaller by (off  7) in this case.

How about this?

#define MAX_COPY_SIZE PAGE_SIZE
...

void *bbuf;

/* Bounds check count with err buf length */
count = min((size_t)(afu-eb_len - off), count);
if ((off  0) || (count  0))
return 0;

/* Create aligned bounce buffer to copy into */
aligned_start = round_down(off, 8);
aligned_end = round_up(off + count, 8);
aligned_length = aligned_end - aligned_start;

if (aligned_length  MAX_COPY_SIZE) {
aligned_length = MAX_COPY_SIZE;
count = MAX_COPY_SIZE - (off  0x7);
}

bbuf = (void *)__get_free_page(GFP_TEMPORARY);
if (!bbuf)
return -ENOMEM;

/* Use _memcpy_fromio() so the reads are aligned */
_memcpy_fromio(bbuf, ebuf + aligned_start, aligned_length);
memcpy(buf, bbuf + (off  0x7), count);

free_page(bbuf);


 + memcpy(buf, tbuf + (off  0x7), count);
 +
 + free_page((unsigned long)tbuf);
 + }
 +
 + return count;

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Re: [PATCH 1/1] KVM: PPC: Book3S: correct width in XER handling

2015-05-20 Thread Paul Mackerras
On Wed, May 20, 2015 at 03:26:12PM +1000, Sam Bobroff wrote:
 In 64 bit kernels, the Fixed Point Exception Register (XER) is a 64
 bit field (e.g. in kvm_regs and kvm_vcpu_arch) and in most places it is
 accessed as such.
 
 This patch corrects places where it is accessed as a 32 bit field by a
 64 bit kernel.  In some cases this is via a 32 bit load or store
 instruction which, depending on endianness, will cause either the
 lower or upper 32 bits to be missed.  In another case it is cast as a
 u32, causing the upper 32 bits to be cleared.
 
 This patch corrects those places by extending the access methods to
 64 bits.
 
 Signed-off-by: Sam Bobroff sam.bobr...@au1.ibm.com

Acked-by: Paul Mackerras pau...@samba.org
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Re: [PATCH 3/4] perf: Use pmu_events_map table to create event aliases

2015-05-20 Thread Andi Kleen
 +/*
 + * Return TRUE if the CPU identified by @vfm, @version, and @type
 + * matches the current CPU.  vfm refers to [Vendor, Family, Model],
 + *
 + * Return FALSE otherwise.
 + *
 + * For Powerpc, we only compare @version to the processor PVR.
 + */
 +bool arch_pmu_events_match_cpu(const char *vfm __maybe_unused,
 + const char *version,
 + const char *type __maybe_unused)
 +{
 + char *cpustr;
 + bool rc;
 +
 + cpustr = get_cpu_str();
 + rc = !strcmp(version, cpustr);


Surely against vfm not version
I think your mapfile is wrong if that works?

That's the Intel format:

.vfm = GenuineIntel-6-3E,
.version = V16,
.type = core,
.table = pme_IvyTown_core


-Andi

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[PATCH 1/1] powerpc/perf/hv-24x7: Check support before registering

2015-05-20 Thread Sukadev Bhattiprolu
From 955102eacf035b19080dc659a15d9b8fbd8fae7f Mon Sep 17 00:00:00 2001
From: Sukadev Bhattiprolu suka...@linux.vnet.ibm.com
Date: Tue, 28 Apr 2015 18:47:58 -0400
Subject: [PATCH 1/1] powerpc/perf/hv-24x7: Check support before registering
 PMU

We currently try to register the 24x7 PMU unconditionally. Not all
Power systems support 24x7 counters (eg: Power7). On these systems
we get a backtrace during boot when trying to register the 24x7 PMU.

Check if the hypervisor supports 24x7 counters before attempting to
register the 24x7 PMU.

Reported-by: Gustavo Luiz Duarte gu...@br.ibm.com
Signed-off-by: Sukadev Bhattiprolu suka...@linux.vnet.ibm.com
---

Changelog[v2]
- [Michael Ellerman] Simplify check with bogus parameters.
---
 arch/powerpc/perf/hv-24x7.c |   21 +
 1 file changed, 21 insertions(+)

diff --git a/arch/powerpc/perf/hv-24x7.c b/arch/powerpc/perf/hv-24x7.c
index ec2eb20..c04a332 100644
--- a/arch/powerpc/perf/hv-24x7.c
+++ b/arch/powerpc/perf/hv-24x7.c
@@ -1268,12 +1268,33 @@ static struct pmu h_24x7_pmu = {
.read= h_24x7_event_read,
 };
 
+/*
+ * Return 1 if we can access the 24x7 counter catalog from the hypervisor.
+ * Return 0 otherwise.
+ */
+static bool hv_has_24x7(void)
+{
+   unsigned long hret;
+
+   hret = h_get_24x7_catalog_page(0, 0, 0);
+
+   if (hret != H_FUNCTION)
+   pr_err(Error %ld reading catalog, disabling 24x7 PMU\n, hret);
+
+   return hret == 0;
+
+}
+
+
 static int hv_24x7_init(void)
 {
int r;
unsigned long hret;
struct hv_perf_caps caps;
 
+   if (!hv_has_24x7())
+   return -ENODEV;
+
if (!firmware_has_feature(FW_FEATURE_LPAR)) {
pr_debug(not a virtualized system, not enabling\n);
return -ENODEV;
-- 
1.7.9.5

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Re: [PATCH 1/1] KVM: PPC: Book3S: correct width in XER handling

2015-05-20 Thread Paul Mackerras
On Wed, May 20, 2015 at 05:35:08PM -0500, Scott Wood wrote:
 
 It's nominally a 64-bit register, but the upper 32 bits are reserved in
 ISA 2.06.  Do newer ISAs or certain implementations define things in the
 upper 32 bits, or is this just about the asm accesses being wrong on
 big-endian?

It's primarily about the asm accesses being wrong.

Paul.
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[PATCH v4 1/2] perf/kvm: Port perf kvm to powerpc

2015-05-20 Thread Hemant Kumar
From: Srikar Dronamraju sri...@linux.vnet.ibm.com

perf kvm can be used to analyze guest exit reasons. This support already
exists in x86. Hence, porting it to powerpc.

 - To trace KVM events :
  perf kvm stat record
  If many guests are running, we can track for a specific guest by using
  --pid as in : perf kvm stat record --pid pid

 - To see the results :
  perf kvm stat report

The result shows the number of exits (from the guest context to
host/hypervisor context) grouped by their respective exit reasons with
their frequency.

This patch makes use of the guest exit reasons available in
trace_book3s.h. It records on two already available tracepoints :
kvm_hv:kvm_guest_exit and kvm_hv:kvm_guest_enter.

Note : This patch has a dependency on the patch kvm/powerpc: Export
kvm exit reasons which exports the KVM exit reasons through the uapi.

Here is a sample o/p:
 # pgrep qemu
19378
60515

2 Guests are running on the host.

 # perf kvm stat record -a
^C[ perf record: Woken up 1 times to write data ]
[ perf record: Captured and wrote 4.153 MB perf.data.guest (39624 samples) ]

 # perf kvm stat report -p 60515
Analyze events for pid(s) 60515, all VCPUs:

   VM-EXITSamples  Samples% Time%Min Time Max
Time Avg time

H_DATA_STORAGE   500635.30% 0.13%  1.94us 49.46us 
12.37us ( +-   0.52% )
HV_DECREMENTER   445731.43% 0.02%  0.72us 16.14us  
1.91us ( +-   0.96% )
   SYSCALL   269018.97% 0.10%  2.84us528.24us 
18.29us ( +-   3.75% )
RETURN_TO_HOST   178912.61%99.76%  1.58us 672791.91us  
27470.23us ( +-   3.00% )
  EXTERNAL240 1.69% 0.00%  0.69us 10.67us  
1.33us ( +-   5.34% )

Total Samples:14182, Total events handled time:49264158.30us.

Signed-off-by: Srikar Dronamraju sri...@linux.vnet.ibm.com
Signed-off-by: Hemant Kumar hem...@linux.vnet.ibm.com
---
Changes :
- Moved the uapi related changes to arch/powerpc patchset.

This patch has a dependency on :
http://www.mail-archive.com/linuxppc-dev@lists.ozlabs.org/msg89485.html
which exports the kvm exit reasons.

 tools/perf/arch/powerpc/Makefile|  1 +
 tools/perf/arch/powerpc/util/Build  |  1 +
 tools/perf/arch/powerpc/util/kvm-stat.c | 33 +
 3 files changed, 35 insertions(+)
 create mode 100644 tools/perf/arch/powerpc/util/kvm-stat.c

diff --git a/tools/perf/arch/powerpc/Makefile b/tools/perf/arch/powerpc/Makefile
index 7fbca17..21322e0 100644
--- a/tools/perf/arch/powerpc/Makefile
+++ b/tools/perf/arch/powerpc/Makefile
@@ -1,3 +1,4 @@
 ifndef NO_DWARF
 PERF_HAVE_DWARF_REGS := 1
 endif
+HAVE_KVM_STAT_SUPPORT := 1
diff --git a/tools/perf/arch/powerpc/util/Build 
b/tools/perf/arch/powerpc/util/Build
index 7b8b0d1..c8fe207 100644
--- a/tools/perf/arch/powerpc/util/Build
+++ b/tools/perf/arch/powerpc/util/Build
@@ -1,5 +1,6 @@
 libperf-y += header.o
 libperf-y += sym-handling.o
+libperf-y += kvm-stat.o
 
 libperf-$(CONFIG_DWARF) += dwarf-regs.o
 libperf-$(CONFIG_DWARF) += skip-callchain-idx.o
diff --git a/tools/perf/arch/powerpc/util/kvm-stat.c 
b/tools/perf/arch/powerpc/util/kvm-stat.c
new file mode 100644
index 000..24e06bf
--- /dev/null
+++ b/tools/perf/arch/powerpc/util/kvm-stat.c
@@ -0,0 +1,33 @@
+#include ../../util/kvm-stat.h
+#include asm/kvm_perf_book3s.h
+
+define_exit_reasons_table(hv_exit_reasons, kvm_trace_symbol_exit);
+
+static struct kvm_events_ops exit_events = {
+   .is_begin_event = exit_event_begin,
+   .is_end_event = exit_event_end,
+   .decode_key = exit_event_decode_key,
+   .name = VM-EXIT
+};
+
+const char *const kvm_events_tp[] = {
+   kvm_hv:kvm_guest_exit,
+   kvm_hv:kvm_guest_enter,
+   NULL,
+};
+
+struct kvm_reg_events_ops kvm_reg_events_ops[] = {
+   { .name = vmexit, .ops = exit_events },
+   { NULL, NULL },
+};
+
+const char * const kvm_skip_events[] = {
+   NULL,
+};
+
+int cpu_isa_init(struct perf_kvm_stat *kvm, const char *cpuid __maybe_unused)
+{
+   kvm-exit_reasons = hv_exit_reasons;
+   kvm-exit_reasons_isa = HV;
+   return 0;
+}
-- 
1.9.3

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[PATCH v4 2/2] perf/kvm: Support HCALL events

2015-05-20 Thread Hemant Kumar
powerpc provides hcall events that also provides insights into guest
behaviour. Enhance perf kvm to record and analyze hcall events.

 - To trace hcall events :
  perf kvm stat record

 - To show the results :
  perf kvm stat report --event=hcall

The result shows the number of hypervisor calls from the guest grouped
by their respective reasons displayed with the frequency.

This patch makes use of two additional tracepoints
kvm_hv:kvm_hcall_enter and kvm_hv:kvm_hcall_exit. It uses the
pSeries hypervisor codes exported through uapi to classify the hcalls
into their respective reasons.

Note : This patch has a dependency on kvm/powerpc: Export HCALL reason
codes which exports HCALL reasons through uapi.

 # pgrep qemu
A sample output :
19378
60515

2 VMs running.

 # perf kvm stat record -a
^C[ perf record: Woken up 1 times to write data ]
[ perf record: Captured and wrote 4.153 MB perf.data.guest (39624 samples) ]

 # perf kvm stat report -p 60515 --event=hcall
Analyze events for pid(s) 60515, all VCPUs:

 HCALL-EVENTSamples  Samples% Time%Min TimeMax Time 
Avg time

H_VIO_SIGNAL   103438.44%15.77%  0.36us  1.59us 
 0.44us ( +-   0.66% )
  H_SEND_CRQ65224.24%10.97%  0.39us  1.84us 
 0.49us ( +-   1.20% )
   H_IPI52319.44%62.05%  1.35us 19.70us 
 3.44us ( +-   2.88% )
 H_PUT_TERM_CHAR41115.28% 8.03%  0.38us  3.77us 
 0.57us ( +-   1.61% )
 H_GET_TERM_CHAR 50 1.86% 0.99%  0.40us  0.98us 
 0.57us ( +-   3.37% )
   H_EOI 20 0.74% 2.19%  2.22us  4.72us 
 3.17us ( +-   5.96% )

Total Samples:2690, Total events handled time:2896.94us.

Signed-off-by: Hemant Kumar hem...@linux.vnet.ibm.com
---
Changes:
- Moved the uapi related changes to arch/powerpc side patchset.

This patch has a dependency on :
http://www.mail-archive.com/linuxppc-dev@lists.ozlabs.org/msg89487.html
which export hcall reasons through uapi.

 tools/perf/arch/powerpc/util/kvm-stat.c | 61 +
 1 file changed, 61 insertions(+)

diff --git a/tools/perf/arch/powerpc/util/kvm-stat.c 
b/tools/perf/arch/powerpc/util/kvm-stat.c
index 24e06bf..0d3ea47 100644
--- a/tools/perf/arch/powerpc/util/kvm-stat.c
+++ b/tools/perf/arch/powerpc/util/kvm-stat.c
@@ -1,7 +1,9 @@
 #include ../../util/kvm-stat.h
 #include asm/kvm_perf_book3s.h
+#include ../../util/debug.h
 
 define_exit_reasons_table(hv_exit_reasons, kvm_trace_symbol_exit);
+define_exit_reasons_table(hcall_reasons, kvm_trace_symbol_hcall);
 
 static struct kvm_events_ops exit_events = {
.is_begin_event = exit_event_begin,
@@ -10,14 +12,73 @@ static struct kvm_events_ops exit_events = {
.name = VM-EXIT
 };
 
+static void hcall_event_get_key(struct perf_evsel *evsel,
+   struct perf_sample *sample,
+   struct event_key *key)
+{
+   key-info = 0;
+   key-key = perf_evsel__intval(evsel, sample, KVM_HCALL_REASON);
+}
+
+static const char *get_exit_reason(u64 exit_code)
+{
+   struct exit_reasons_table *tbl = hcall_reasons;
+
+   while (tbl-reason != NULL) {
+   if (tbl-exit_code == exit_code)
+   return tbl-reason;
+   tbl++;
+   }
+
+   pr_err(Unknown kvm hcall exit code: %lld\n,
+  (unsigned long long)exit_code);
+   return UNKNOWN;
+}
+
+static bool hcall_event_end(struct perf_evsel *evsel,
+   struct perf_sample *sample __maybe_unused,
+   struct event_key *key __maybe_unused)
+{
+   return (!strcmp(evsel-name, KVM_HCALL_EXIT_TRACE));
+}
+
+static bool hcall_event_begin(struct perf_evsel *evsel,
+ struct perf_sample *sample, struct event_key *key)
+{
+   if (!strcmp(evsel-name, KVM_HCALL_ENTRY_TRACE)) {
+   hcall_event_get_key(evsel, sample, key);
+   return true;
+   }
+
+return false;
+}
+static void hcall_event_decode_key(struct perf_kvm_stat *kvm __maybe_unused,
+  struct event_key *key,
+  char *decode)
+{
+   const char *hcall_reason = get_exit_reason(key-key);
+
+   scnprintf(decode, DECODE_STR_LEN, %s, hcall_reason);
+}
+
+static struct kvm_events_ops hcall_events = {
+   .is_begin_event = hcall_event_begin,
+   .is_end_event = hcall_event_end,
+   .decode_key = hcall_event_decode_key,
+   .name = HCALL-EVENT,
+};
+
 const char *const kvm_events_tp[] = {
kvm_hv:kvm_guest_exit,
kvm_hv:kvm_guest_enter,
+   kvm_hv:kvm_hcall_enter,
+   kvm_hv:kvm_hcall_exit,
NULL,
 };
 
 struct kvm_reg_events_ops kvm_reg_events_ops[] = {
{ .name = vmexit, .ops = exit_events },
+   { .name = hcall, .ops = hcall_events },
{ NULL, NULL },
 };
 

[PATCH v5 RESEND] IFC: Change IO accessor based on endianness

2015-05-20 Thread Scott Wood
From: Jaiprakash Singh b44...@freescale.com

IFC IO accressor are set at run time based
on IFC IP registers endianness.IFC node in
DTS file contains information about
endianness.

Signed-off-by: Jaiprakash Singh b44...@freescale.com
Signed-off-by: Scott Wood scottw...@freescale.com
---
v5: I'm assuming it's the same as v4, but I didn't send v4, and this
comes from a versionless [RESEND] that never made it to the mailing list,
so bumping the version just in case.

 .../bindings/memory-controllers/fsl/ifc.txt|   3 +
 drivers/memory/fsl_ifc.c   |  43 ++--
 drivers/mtd/nand/fsl_ifc_nand.c| 258 +++--
 include/linux/fsl_ifc.h|  50 
 4 files changed, 213 insertions(+), 141 deletions(-)

diff --git a/Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt 
b/Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt
index d5e3704..89427b0 100644
--- a/Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt
+++ b/Documentation/devicetree/bindings/memory-controllers/fsl/ifc.txt
@@ -18,6 +18,8 @@ Properties:
   interrupt (NAND_EVTER_STAT).  If there is only one,
   that interrupt reports both types of event.
 
+- little-endian : If this property is absent, the big-endian mode will
+  be in use as default for registers.
 
 - ranges : Each range corresponds to a single chipselect, and covers
the entire access window as configured.
@@ -34,6 +36,7 @@ Example:
#size-cells = 1;
reg = 0x0 0xffe1e000 0 0x2000;
interrupts = 16 2 19 2;
+   little-endian;
 
/* NOR, NAND Flashes and CPLD on board */
ranges = 0x0 0x0 0x0 0xee00 0x0200
diff --git a/drivers/memory/fsl_ifc.c b/drivers/memory/fsl_ifc.c
index 410c397..e87459f 100644
--- a/drivers/memory/fsl_ifc.c
+++ b/drivers/memory/fsl_ifc.c
@@ -62,7 +62,7 @@ int fsl_ifc_find(phys_addr_t addr_base)
return -ENODEV;
 
for (i = 0; i  fsl_ifc_ctrl_dev-banks; i++) {
-   u32 cspr = in_be32(fsl_ifc_ctrl_dev-regs-cspr_cs[i].cspr);
+   u32 cspr = ifc_in32(fsl_ifc_ctrl_dev-regs-cspr_cs[i].cspr);
if (cspr  CSPR_V  (cspr  CSPR_BA) ==
convert_ifc_address(addr_base))
return i;
@@ -79,16 +79,16 @@ static int fsl_ifc_ctrl_init(struct fsl_ifc_ctrl *ctrl)
/*
 * Clear all the common status and event registers
 */
-   if (in_be32(ifc-cm_evter_stat)  IFC_CM_EVTER_STAT_CSER)
-   out_be32(ifc-cm_evter_stat, IFC_CM_EVTER_STAT_CSER);
+   if (ifc_in32(ifc-cm_evter_stat)  IFC_CM_EVTER_STAT_CSER)
+   ifc_out32(IFC_CM_EVTER_STAT_CSER, ifc-cm_evter_stat);
 
/* enable all error and events */
-   out_be32(ifc-cm_evter_en, IFC_CM_EVTER_EN_CSEREN);
+   ifc_out32(IFC_CM_EVTER_EN_CSEREN, ifc-cm_evter_en);
 
/* enable all error and event interrupts */
-   out_be32(ifc-cm_evter_intr_en, IFC_CM_EVTER_INTR_EN_CSERIREN);
-   out_be32(ifc-cm_erattr0, 0x0);
-   out_be32(ifc-cm_erattr1, 0x0);
+   ifc_out32(IFC_CM_EVTER_INTR_EN_CSERIREN, ifc-cm_evter_intr_en);
+   ifc_out32(0x0, ifc-cm_erattr0);
+   ifc_out32(0x0, ifc-cm_erattr1);
 
return 0;
 }
@@ -127,9 +127,9 @@ static u32 check_nand_stat(struct fsl_ifc_ctrl *ctrl)
 
spin_lock_irqsave(nand_irq_lock, flags);
 
-   stat = in_be32(ifc-ifc_nand.nand_evter_stat);
+   stat = ifc_in32(ifc-ifc_nand.nand_evter_stat);
if (stat) {
-   out_be32(ifc-ifc_nand.nand_evter_stat, stat);
+   ifc_out32(stat, ifc-ifc_nand.nand_evter_stat);
ctrl-nand_stat = stat;
wake_up(ctrl-nand_wait);
}
@@ -161,16 +161,16 @@ static irqreturn_t fsl_ifc_ctrl_irq(int irqno, void *data)
irqreturn_t ret = IRQ_NONE;
 
/* read for chip select error */
-   cs_err = in_be32(ifc-cm_evter_stat);
+   cs_err = ifc_in32(ifc-cm_evter_stat);
if (cs_err) {
dev_err(ctrl-dev, transaction sent to IFC is not mapped to
any memory bank 0x%08X\n, cs_err);
/* clear the chip select error */
-   out_be32(ifc-cm_evter_stat, IFC_CM_EVTER_STAT_CSER);
+   ifc_out32(IFC_CM_EVTER_STAT_CSER, ifc-cm_evter_stat);
 
/* read error attribute registers print the error information */
-   status = in_be32(ifc-cm_erattr0);
-   err_addr = in_be32(ifc-cm_erattr1);
+   status = ifc_in32(ifc-cm_erattr0);
+   err_addr = ifc_in32(ifc-cm_erattr1);
 
if (status  IFC_CM_ERATTR0_ERTYP_READ)
dev_err(ctrl-dev, Read transaction error
@@ -231,6 +231,23 @@ static int fsl_ifc_ctrl_probe(struct platform_device *dev)
goto err;
}
 
+   

Re: [PATCH 3/4] perf: Use pmu_events_map table to create event aliases

2015-05-20 Thread Andi Kleen
 Obviously, that does not fit into the VFM field. We could either
 add a new PVR field to the mapfile:
 
   [vfm, version, type, pvr]
 
 or, as the patch currently does, let architectures intepret the
 version field as they see fit?
 
 IOW, leave it to architectures to keep arch_pmu_events_match_cpu()
 consistent with _their_ mapfile?

version is the version number of the event file. This way 
you can't signify the version number if you ever change something.

If you need something else in vfm to identify the CPU 
can't you just add it there? I wouldn't really call it vfm, it's
really a abstract cpu identifier per architecture. So if you
need pvr just add it there.

-Andi

-- 
a...@linux.intel.com -- Speaking for myself only
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Re: [PATCH v3] cxl: Export AFU error buffer via sysfs

2015-05-20 Thread trigg

 On 21-May-2015, at 05:16, Michael Neuling mi...@neuling.org wrote:
 
 + */
 +ssize_t cxl_afu_read_err_buffer(struct cxl_afu *afu, char *buf,
 +loff_t off, size_t count)
 +{
 +loff_t aligned_off;
 +size_t aligned_count;
 +const void __iomem *ebuf = afu-afu_desc_mmio + afu-eb_offset;
 +
 +if (!afu-eb_len || count == 0 || off  0)
 
 if eb_len == 0 we don't even create the sysfs file.  So is this check
 needed?
This function is non static so it can be potentially called from kernel.
Condition check of if (count == 0 || off  0 || (size_t)off = afu-eb_len) 
should work solving the problem below too.
 
 +return 0;
 +
 +/* calculate aligned read window */
 +count = min((size_t)(afu-eb_len - off), count);
 
 What if count ends up being negative because off  afu-eb_len??
Agreed. Thanks for catching this. Size_t being unsigned would overflow
To a large positive value.

 
 +aligned_off = round_down(off, 8);
 +aligned_count = round_up(off + count, 8) - aligned_off;
 
 I kinda preferred the start end variables, and length was just end -
 start.
 
 I though it was more readable. IMHO
 
 How about:
 
   aligned_start = round_down(off, 8);
   aligned_end = round_up(off + count, 8);
   aligned_length = aligned_end - aligned_start;
Agreed on aligned_start and aligned_end but would not
need aligned_end in rest of the code.
 
 +
 +/* fast path */
 +if ((aligned_off == off)  (aligned_count == count)) {
 +/* no need to use the bounce buffer */
 +_memcpy_fromio(buf, ebuf + off, count);
 
 I would drop this, as the other code path should work fine.
 Premature optimisation.
I am inclined to differ on this. Code below uses a bounce buffer
which needs more than double the amount of loads and stores.
If the caller wants to speed up things it can simply ask for aligned
read that won't have this overhead. This will be especially useful 
In large reads.

 +
 +} else {
 +/* use bounce buffer for copy */
 +void *tbuf = (void *)__get_free_page(GFP_TEMPORARY);
 +
 +if (!tbuf)
 +return -ENOMEM;
 +
 +/* max we can copy in one read is PAGE_SIZE */
 +aligned_count = min(aligned_count, PAGE_SIZE);
 +_memcpy_fromio(tbuf, ebuf + aligned_off, aligned_count);
 +
 +count = min(count, aligned_count);
Thanks for catching this.

 
 This doesn't seem right.  count will equal PAGE_SIZE if it's too big but
 it has to be smaller by (off  7) in this case.
 
 How about this?
 
   #define MAX_COPY_SIZE PAGE_SIZE
   ...
 
   void *bbuf;
 
   /* Bounds check count with err buf length */
   count = min((size_t)(afu-eb_len - off), count);
   if ((off  0) || (count  0))
   return 0;
 
   /* Create aligned bounce buffer to copy into */
   aligned_start = round_down(off, 8);
   aligned_end = round_up(off + count, 8);
   aligned_length = aligned_end - aligned_start;
 
   if (aligned_length  MAX_COPY_SIZE) {
   aligned_length = MAX_COPY_SIZE;
   count = MAX_COPY_SIZE - (off  0x7);
   }
 
   bbuf = (void *)__get_free_page(GFP_TEMPORARY);
   if (!bbuf)
   return -ENOMEM;
 
   /* Use _memcpy_fromio() so the reads are aligned */
   _memcpy_fromio(bbuf, ebuf + aligned_start, aligned_length);
   memcpy(buf, bbuf + (off  0x7), count);
 
   free_page(bbuf);
 
 
 +memcpy(buf, tbuf + (off  0x7), count);
 +
 +free_page((unsigned long)tbuf);
 +}
 +
 +return count;
 
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Re: [PATCH] drivers/mtd: add powernv flash MTD abstraction driver

2015-05-20 Thread Jeremy Kerr
Hi Brian,

 While I have Jeremy's attention, let me plug a friendly reminder for
 this unrelated comment:
 
 http://patchwork.ozlabs.org/patch/413355/
 
 Jeremy, you still haven't updated patchwork.git for your last round of
 supposed merges.

Ah, thanks for the reminder - I've just done the push.

Cheers,


Jeremy
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[PATCH v4 1/3] kvm/powerpc: Export kvm exit reasons

2015-05-20 Thread Hemant Kumar
To analyze the kvm exits with perf, we will need to map the exit codes
with the exit reasons. Such a mapping exists today in trace_book3s.h.
Currently its not exported to perf.

This patch moves these kvm exit reasons and their mapping from
arch/powerpc/kvm/trace_book3s.h to
arch/powerpc/include/uapi/asm/trace_book3s.h.
Accordingly change the include files in trace_hv.h and trace_pr.h.

Also, add a file kvm_perf_book3s.h which defines the kvm tracepoints to
trace for kvm exit events. This is added to indicate that the
tracepoints are book3s specific. Generic kvm_perf.h then can just
include kvm_perf_book3s.h.

Signed-off-by: Hemant Kumar hem...@linux.vnet.ibm.com
---
Changes :
- Moved the uapi related changes from the perf side patchset to this
  patchset.
- Made name space changes to indicate changes specific to book3s
  (Suggested by Scott Wood)

 arch/powerpc/include/uapi/asm/kvm_perf.h|  6 +
 arch/powerpc/include/uapi/asm/kvm_perf_book3s.h | 15 
 arch/powerpc/include/uapi/asm/trace_book3s.h| 32 +
 arch/powerpc/kvm/trace_book3s.h | 32 -
 arch/powerpc/kvm/trace_hv.h |  2 +-
 arch/powerpc/kvm/trace_pr.h |  2 +-
 6 files changed, 55 insertions(+), 34 deletions(-)
 create mode 100644 arch/powerpc/include/uapi/asm/kvm_perf.h
 create mode 100644 arch/powerpc/include/uapi/asm/kvm_perf_book3s.h
 create mode 100644 arch/powerpc/include/uapi/asm/trace_book3s.h
 delete mode 100644 arch/powerpc/kvm/trace_book3s.h

diff --git a/arch/powerpc/include/uapi/asm/kvm_perf.h 
b/arch/powerpc/include/uapi/asm/kvm_perf.h
new file mode 100644
index 000..5ed2ff3
--- /dev/null
+++ b/arch/powerpc/include/uapi/asm/kvm_perf.h
@@ -0,0 +1,6 @@
+#ifndef _ASM_POWERPC_KVM_PERF_H
+#define _ASM_POWERPC_KVM_PERF_H
+
+#include asm/kvm_perf_book3s.h
+
+#endif
diff --git a/arch/powerpc/include/uapi/asm/kvm_perf_book3s.h 
b/arch/powerpc/include/uapi/asm/kvm_perf_book3s.h
new file mode 100644
index 000..735901f
--- /dev/null
+++ b/arch/powerpc/include/uapi/asm/kvm_perf_book3s.h
@@ -0,0 +1,15 @@
+#ifndef _ASM_POWERPC_KVM_PERF_BOOK3S_H
+#define _ASM_POWERPC_KVM_PERF_BOOK3S_H
+
+#include asm/trace_book3s.h
+#include asm/kvm.h
+
+#define DECODE_STR_LEN 20
+
+#define VCPU_ID vcpu_id
+
+#define KVM_ENTRY_TRACE kvm_hv:kvm_guest_enter
+#define KVM_EXIT_TRACE kvm_hv:kvm_guest_exit
+#define KVM_EXIT_REASON trap
+
+#endif /* _ASM_POWERPC_KVM_PERF_BOOK3S_H */
diff --git a/arch/powerpc/include/uapi/asm/trace_book3s.h 
b/arch/powerpc/include/uapi/asm/trace_book3s.h
new file mode 100644
index 000..f647ce0
--- /dev/null
+++ b/arch/powerpc/include/uapi/asm/trace_book3s.h
@@ -0,0 +1,32 @@
+#if !defined(_TRACE_KVM_BOOK3S_H)
+#define _TRACE_KVM_BOOK3S_H
+
+/*
+ * Common defines used by the trace macros in trace_pr.h and trace_hv.h
+ */
+
+#define kvm_trace_symbol_exit \
+   {0x100, SYSTEM_RESET}, \
+   {0x200, MACHINE_CHECK}, \
+   {0x300, DATA_STORAGE}, \
+   {0x380, DATA_SEGMENT}, \
+   {0x400, INST_STORAGE}, \
+   {0x480, INST_SEGMENT}, \
+   {0x500, EXTERNAL}, \
+   {0x501, EXTERNAL_LEVEL}, \
+   {0x502, EXTERNAL_HV}, \
+   {0x600, ALIGNMENT}, \
+   {0x700, PROGRAM}, \
+   {0x800, FP_UNAVAIL}, \
+   {0x900, DECREMENTER}, \
+   {0x980, HV_DECREMENTER}, \
+   {0xc00, SYSCALL}, \
+   {0xd00, TRACE}, \
+   {0xe00, H_DATA_STORAGE}, \
+   {0xe20, H_INST_STORAGE}, \
+   {0xe40, H_EMUL_ASSIST}, \
+   {0xf00, PERFMON}, \
+   {0xf20, ALTIVEC}, \
+   {0xf40, VSX}
+
+#endif
diff --git a/arch/powerpc/kvm/trace_book3s.h b/arch/powerpc/kvm/trace_book3s.h
deleted file mode 100644
index f647ce0..000
--- a/arch/powerpc/kvm/trace_book3s.h
+++ /dev/null
@@ -1,32 +0,0 @@
-#if !defined(_TRACE_KVM_BOOK3S_H)
-#define _TRACE_KVM_BOOK3S_H
-
-/*
- * Common defines used by the trace macros in trace_pr.h and trace_hv.h
- */
-
-#define kvm_trace_symbol_exit \
-   {0x100, SYSTEM_RESET}, \
-   {0x200, MACHINE_CHECK}, \
-   {0x300, DATA_STORAGE}, \
-   {0x380, DATA_SEGMENT}, \
-   {0x400, INST_STORAGE}, \
-   {0x480, INST_SEGMENT}, \
-   {0x500, EXTERNAL}, \
-   {0x501, EXTERNAL_LEVEL}, \
-   {0x502, EXTERNAL_HV}, \
-   {0x600, ALIGNMENT}, \
-   {0x700, PROGRAM}, \
-   {0x800, FP_UNAVAIL}, \
-   {0x900, DECREMENTER}, \
-   {0x980, HV_DECREMENTER}, \
-   {0xc00, SYSCALL}, \
-   {0xd00, TRACE}, \
-   {0xe00, H_DATA_STORAGE}, \
-   {0xe20, H_INST_STORAGE}, \
-   {0xe40, H_EMUL_ASSIST}, \
-   {0xf00, PERFMON}, \
-   {0xf20, ALTIVEC}, \
-   {0xf40, VSX}
-
-#endif
diff --git a/arch/powerpc/kvm/trace_hv.h b/arch/powerpc/kvm/trace_hv.h
index 33d9daf..02d0a07 100644
--- a/arch/powerpc/kvm/trace_hv.h
+++ b/arch/powerpc/kvm/trace_hv.h
@@ -2,7 +2,7 @@
 #define _TRACE_KVM_HV_H
 
 #include linux/tracepoint.h
-#include trace_book3s.h
+#include uapi/asm/trace_book3s.h
 #include 

Re: [PATCH V4 00/13] POWER DSCR fixes, improvements, docs and tests

2015-05-20 Thread Michael Ellerman
On Mon, 2015-05-18 at 16:26 +0530, Anshuman Khandual wrote:
   This patch series has patches for POWER DSCR fixes, improvements,
 in code documentaion, kernel support user documentation and selftest based
 test cases. It has got five test cases which are derived from Anton's DSCR
 test bucket which can be listed as follows.
 
 (1) http://ozlabs.org/~anton/junkcode/dscr_default_test.c
 (2) http://ozlabs.org/~anton/junkcode/dscr_explicit_test.c
 (3) http://ozlabs.org/~anton/junkcode/dscr_inherit_exec_test.c
 (4) http://ozlabs.org/~anton/junkcode/dscr_inherit_test.c
 (5) http://ozlabs.org/~anton/junkcode/user_dscr_test.c
 
 NOTE1: Anton's original inherit exec test expected the child to have system
 default DSCR value instead of the inherited DSCR value from it's parent.
 But looks like thats not the case when we execute the test, it always
 inherits it's parent's DSCR value over the exec call as well. So I have
 changed the test program assuming its correct to have the inherited DSCR
 value in the fork/execed child program. Please let me know if thats not
 correct and I am missing something there.

The selftests still fail to build:

  cc -Wall -O2 -flto -Wall -Werror -DGIT_VERSION='v4.0-rc1-13631-gdfcba4b' 
-I/home/buildbot/buildbot/slave/selftests-ppc64-gcc-ubuntu-be/build/tools/testing/selftests/powerpc
  -lpthreaddscr_default_test.c ../harness.c   -o dscr_default_test
  In file included from dscr_default_test.c:16:0:
  dscr.h: In function ‘get_default_dscr’:
  dscr.h:93:6: error: ignoring return value of ‘read’, declared with attribute 
warn_unused_result [-Werror=unused-result]
read(fd, buf, sizeof(buf));
^
  dscr.h: In function ‘set_default_dscr’:
  dscr.h:112:7: error: ignoring return value of ‘write’, declared with 
attribute warn_unused_result [-Werror=unused-result]
write(fd, buf, strlen(buf));
 ^
  cc1: all warnings being treated as errors
  make[1]: *** [dscr_default_test] Error 1


I'm happy for you to call perror() and exit(1) if either fail.

Please fix and resend.

cheers


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Re: [PATCH v3 1/2] perf/kvm: Port perf kvm to powerpc

2015-05-20 Thread Hemant Kumar

Hi Scott,

On 05/13/2015 08:52 AM, Scott Wood wrote:

On Tue, 2015-05-12 at 21:34 +0530, Hemant Kumar wrote:

Hi Scott,

On 05/12/2015 03:38 AM, Scott Wood wrote:

On Fri, 2015-05-08 at 06:37 +0530, Hemant Kumar wrote:

diff --git a/arch/powerpc/include/uapi/asm/kvm_perf.h 
b/arch/powerpc/include/uapi/asm/kvm_perf.h
new file mode 100644
index 000..30fa670
--- /dev/null
+++ b/arch/powerpc/include/uapi/asm/kvm_perf.h
@@ -0,0 +1,15 @@
+#ifndef _ASM_POWERPC_KVM_PERF_H
+#define _ASM_POWERPC_KVM_PERF_H
+
+#include asm/trace_book3s.h
+#include asm/kvm.h
+
+#define DECODE_STR_LEN 20
+
+#define VCPU_ID vcpu_id
+
+#define KVM_ENTRY_TRACE kvm_hv:kvm_guest_enter
+#define KVM_EXIT_TRACE kvm_hv:kvm_guest_exit
+#define KVM_EXIT_REASON trap
+
+#endif /* _ASM_POWERPC_KVM_PERF_H */

Please make sure that anything book3s-specific is named that way.

Are you suggesting to name it to something like _ASM_POWERPC_BOOK3S_PERF_H ?

My concern is seeing a generically named kvm_perf.h include a file
called trace_book3s.h which defines kvm_trace_symbol_hcall with
presumably book3s-specific content, as well as wondering how much of the
rest of the file would be applicable if booke PPC were to implement perf
kvm.

I don't know enough about perf kvm to answer that question, but I've
seen enough cases of book3s or pseries specific code that was apparently
written with the belief that no other ppc64 implementations exist, or
that no other ppc implementations would want to implement a certain
feature, to be suspicous.  Usually such cases can be dealt with after
the fact (albeit not as easily as if things were organized/namespaced
properly from the beginning), but this is uapi...

-Scott



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Tried to address your comments in v4 :
http://www.mail-archive.com/linuxppc-dev@lists.ozlabs.org/msg89490.html
and
http://www.mail-archive.com/linuxppc-dev@lists.ozlabs.org/msg89485.html

--
Thanks,
Hemant Kumar

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[PATCH v4] cxl: Export AFU error buffer via sysfs

2015-05-20 Thread Vaibhav Jain
Export the AFU Error Buffer via sysfs attribute (afu_err_buf). AFU
error buffer is used by the AFU to report application specific
errors. The contents of this buffer are AFU specific and are intended to
be interpreted by the application interacting with the afu.

Testing:
- Build against pseries le/be configs.
- Run testing with a special version of memcpy afu on a 'be'
kernel.

Change-log:
v3 - v4
- Addressed mikey's comment to further remove the fast path and
fix a bug in updating the value of 'count' in case read is
greater than PAGE_SIZE.

v2 - v3
- Addressed mikey's comment to further simplify
cxl_afu_read_err_buffer to use a bounce buffer for unaligned
reads.

v1 - v2
- Simplified cxl_afu_read_err_buffer to handle unaligned reads
by performing a short read.

Suggested-by: Michael Neuling mi...@neuling.org
Signed-off-by: Vaibhav Jain vaib...@linux.vnet.ibm.com
---
 Documentation/ABI/testing/sysfs-class-cxl | 11 ++
 drivers/misc/cxl/cxl.h|  7 
 drivers/misc/cxl/pci.c| 59 +++
 drivers/misc/cxl/sysfs.c  | 33 +
 4 files changed, 110 insertions(+)

diff --git a/Documentation/ABI/testing/sysfs-class-cxl 
b/Documentation/ABI/testing/sysfs-class-cxl
index d46bba8..45e9ce3 100644
--- a/Documentation/ABI/testing/sysfs-class-cxl
+++ b/Documentation/ABI/testing/sysfs-class-cxl
@@ -6,6 +6,17 @@ Example: The real path of the attribute 
/sys/class/cxl/afu0.0s/irqs_max is
 
 Slave contexts (eg. /sys/class/cxl/afu0.0s):
 
+What:   /sys/class/cxl/afu/afu_err_buf
+Date:   September 2014
+Contact:linuxppc-dev@lists.ozlabs.org
+Description:read only
+AFU Error Buffer contents. The contents of this file are
+   application specific and depends on the AFU being used.
+   Applications interacting with the AFU can use this attribute
+   to know about the current error condition and take appropriate
+   action like logging the event etc.
+
+
 What:   /sys/class/cxl/afu/irqs_max
 Date:   September 2014
 Contact:linuxppc-dev@lists.ozlabs.org
diff --git a/drivers/misc/cxl/cxl.h b/drivers/misc/cxl/cxl.h
index a1cee47..789f077 100644
--- a/drivers/misc/cxl/cxl.h
+++ b/drivers/misc/cxl/cxl.h
@@ -362,6 +362,10 @@ struct cxl_afu {
struct mutex spa_mutex;
spinlock_t afu_cntl_lock;
 
+   /* AFU error buffer fields and bin attribute for sysfs */
+   u64 eb_len, eb_offset;
+   struct bin_attribute attr_eb;
+
/*
 * Only the first part of the SPA is used for the process element
 * linked list. The only other part that software needs to worry about
@@ -563,6 +567,9 @@ static inline void __iomem *_cxl_p2n_addr(struct cxl_afu 
*afu, cxl_p2n_reg_t reg
 u16 cxl_afu_cr_read16(struct cxl_afu *afu, int cr, u64 off);
 u8 cxl_afu_cr_read8(struct cxl_afu *afu, int cr, u64 off);
 
+ssize_t cxl_afu_read_err_buffer(struct cxl_afu *afu, char *buf,
+   loff_t off, size_t count);
+
 
 struct cxl_calls {
void (*cxl_slbia)(struct mm_struct *mm);
diff --git a/drivers/misc/cxl/pci.c b/drivers/misc/cxl/pci.c
index 1ef0164..aa9ee00 100644
--- a/drivers/misc/cxl/pci.c
+++ b/drivers/misc/cxl/pci.c
@@ -593,6 +593,22 @@ static int cxl_read_afu_descriptor(struct cxl_afu *afu)
afu-crs_len = AFUD_CR_LEN(val) * 256;
afu-crs_offset = AFUD_READ_CR_OFF(afu);
 
+
+   /* eb_len is in multiple of 4K */
+   afu-eb_len = AFUD_EB_LEN(AFUD_READ_EB(afu)) * 4096;
+   afu-eb_offset = AFUD_READ_EB_OFF(afu);
+
+   /* eb_off is 4K aligned so lower 12 bits are always zero */
+   if (EXTRACT_PPC_BITS(afu-eb_offset, 0, 11) != 0) {
+   dev_warn(afu-dev,
+Invalid AFU error buffer offset %Lx\n,
+afu-eb_offset);
+   dev_info(afu-dev,
+Ignoring AFU error buffer in the descriptor\n);
+   /* indicate that no afu buffer exists */
+   afu-eb_len = 0;
+   }
+
return 0;
 }
 
@@ -672,6 +688,49 @@ static int sanitise_afu_regs(struct cxl_afu *afu)
return 0;
 }
 
+#define ERR_BUFF_MAX_COPY_SIZE PAGE_SIZE
+/*
+ * afu_eb_read:
+ * Called from sysfs and reads the afu error info buffer. The h/w only supports
+ * 4/8 bytes aligned access. So in case the requested offset/count arent 8 byte
+ * aligned the function uses a bounce buffer which can be max PAGE_SIZE.
+ */
+ssize_t cxl_afu_read_err_buffer(struct cxl_afu *afu, char *buf,
+   loff_t off, size_t count)
+{
+   loff_t aligned_start, aligned_end;
+   size_t aligned_length;
+   void *tbuf;
+   const void __iomem *ebuf = afu-afu_desc_mmio + afu-eb_offset;
+
+   if (count == 0 || off  0 || (size_t)off = afu-eb_len)
+   return 0;
+
+  

Re: [PATCH] powerpc/fsl: Add FMan best effort port compatible

2015-05-20 Thread Scott Wood
On Tue, 2015-05-19 at 04:27 -0500, Liberman Igal-B31950 wrote:
 Hi Scott,
 I understand your point, let me please explain more about the hardware 
 configuration and suggest another solution.
 I'm referring only to external ports (TX/RX), not OP.
 In FMan V3 we have maximum of 8 Port, it depends on the FMan revision (in B4, 
 T2, T4 we have 8 ports, in T1024 and T1040 we have 4).
 The following configuration are valid:
   - All 8 ports can work as 1G ports. 
   - Ports 7, 8 (if available) can work as 10G (with full hardware 
 resources).
   - Port 1, 2 (1 in T1024; 1, 2 in T2080) can be configured as 10G (with 
 limited hardware resources).
 Currently we use only fsl,fm-v3-port-rx/tx.
 
 We can go 2 ways:
 1. Having 2 compatibles:
   fsl,fman-v3-port-rx/tx
   fsl,fman-v3-best-effort-port-rx/tx
 
   The driver can determine the port type of fsl,fman-v3-port-rx/tx by 
 reading the HW port id.
   fsl,fman-v3-best-effort-port-rx/tx will let the driver know about the 
 best effort port and it will be used instead of fsl,fman-v3-port-rx/tx.
 
 In your opinion, should we add fsl,fman-v3-10g-port-rx/tx for 10G (with 
 full hardware resources)?
 In such chase, fsl,fman-v3-port-rx/tx will denote 1G explicitly.
 
 In FMan V2, dual ports/MACs are not available, so no need change the 
 compatibles.

The compatible string should describe what programming interface is
present.  Other information should be in other properties.  Having the
same compatible for tx and rx definitely seems wrong.

-Scott


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Re: [PATCH v3] cxl: Export AFU error buffer via sysfs

2015-05-20 Thread Michael Neuling
On Thu, 2015-05-21 at 09:06 +0530, trigg wrote:
 
 
  On 21-May-2015, at 05:16, Michael Neuling mi...@neuling.org wrote:
  
  + */
   +ssize_t cxl_afu_read_err_buffer(struct cxl_afu *afu, char *buf,
   +loff_t off, size_t count)
   +{
   +loff_t aligned_off;
   +size_t aligned_count;
   +const void __iomem *ebuf = afu-afu_desc_mmio +
   afu-eb_offset;
   +
   +if (!afu-eb_len || count == 0 || off  0)
  
  if eb_len == 0 we don't even create the sysfs file.  So is this
  check
  needed?
 This function is non static so it can be potentially called from
 kernel.

What?  You mean outside this file?

 Condition check of if (count == 0 || off  0 || (size_t)off
 = afu-eb_len) 
 should work solving the problem below too.

It makes no sense to call this outside of sysfs reading the error
buffer.

   +aligned_off = round_down(off, 8);
   +aligned_count = round_up(off + count, 8) - aligned_off;
  
  I kinda preferred the start end variables, and length was just end -
  start.
  
  I though it was more readable. IMHO
  
  How about:
  
aligned_start = round_down(off, 8);
aligned_end = round_up(off + count, 8);
aligned_length = aligned_end - aligned_start;
 Agreed on aligned_start and aligned_end but would not
 need aligned_end in rest of the code.

Aligned_end makes it more readable.

  
   +
   +/* fast path */
   +if ((aligned_off == off)  (aligned_count == count)) {
   +/* no need to use the bounce buffer */
   +_memcpy_fromio(buf, ebuf + off, count);
  
  I would drop this, as the other code path should work fine.
  Premature optimisation.
 I am inclined to differ on this. Code below uses a bounce buffer
 which needs more than double the amount of loads and stores.

Cacheable vs non-cacheable is important here though.

 If the caller wants to speed up things it can simply ask for aligned
 read that won't have this overhead. This will be especially useful 
 In large reads.

The overhead will mostly be in the non-cachable/MMIO load/stores rather
than the cacheable load/stores, so there may be little performance
difference  anyway.

The only reason this could be useful is if you have a really really
large error buffer.  Even then, why do you need to read it that quickly?

Mikey

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[PATCH v4 2/3] kvm/powerpc: Add exit reason for return code 0x0

2015-05-20 Thread Hemant Kumar
This patch adds an exit reason RETURN_TO_HOST for the return code
0x0. Note that this is not related to any interrupt vector address, but
this is added just to make sure that perf doesn't complain if and when a
kvm exit happens with a trap code as 0x0.

Signed-off-by: Hemant Kumar hem...@linux.vnet.ibm.com
---
 arch/powerpc/include/uapi/asm/trace_book3s.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/arch/powerpc/include/uapi/asm/trace_book3s.h 
b/arch/powerpc/include/uapi/asm/trace_book3s.h
index f647ce0..8635005 100644
--- a/arch/powerpc/include/uapi/asm/trace_book3s.h
+++ b/arch/powerpc/include/uapi/asm/trace_book3s.h
@@ -6,6 +6,7 @@
  */
 
 #define kvm_trace_symbol_exit \
+   {0x0,   RETURN_TO_HOST}, \
{0x100, SYSTEM_RESET}, \
{0x200, MACHINE_CHECK}, \
{0x300, DATA_STORAGE}, \
-- 
1.9.3

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[PATCH v4 3/3] kvm/powerpc: Export HCALL reason codes

2015-05-20 Thread Hemant Kumar
For perf to analyze the KVM events like hcalls, we need the
hypervisor calls and their codes to be exported through uapi.

This patch moves most of the pSeries hcall codes from
arch/powerpc/include/asm/hvcall.h to
arch/powerpc/include/uapi/asm/pseries_hcalls.h.
It also moves the mapping hcall_code-to-hcall_reason from
arch/powerpc/kvm/trace_hv.h to
arch/powerpc/include/uapi/asm/trace_hcall_pseries.h.

Signed-off-by: Hemant Kumar hem...@linux.vnet.ibm.com
---
Changes :
- Made name space changes to indicate changes related to pseries
  (Suggested by Scott Wood)

 arch/powerpc/include/asm/hvcall.h  | 120 +---
 arch/powerpc/include/uapi/asm/kvm_perf_book3s.h|   4 +
 arch/powerpc/include/uapi/asm/pseries_hcalls.h | 123 +
 .../powerpc/include/uapi/asm/trace_hcall_pseries.h | 122 
 arch/powerpc/kvm/trace_hv.h| 117 +---
 5 files changed, 252 insertions(+), 234 deletions(-)
 create mode 100644 arch/powerpc/include/uapi/asm/pseries_hcalls.h
 create mode 100644 arch/powerpc/include/uapi/asm/trace_hcall_pseries.h

diff --git a/arch/powerpc/include/asm/hvcall.h 
b/arch/powerpc/include/asm/hvcall.h
index 85bc8c0..6e38210 100644
--- a/arch/powerpc/include/asm/hvcall.h
+++ b/arch/powerpc/include/asm/hvcall.h
@@ -155,124 +155,8 @@
 /* Each control block has to be on a 4K boundary */
 #define H_CB_ALIGNMENT  4096
 
-/* pSeries hypervisor opcodes */
-#define H_REMOVE   0x04
-#define H_ENTER0x08
-#define H_READ 0x0c
-#define H_CLEAR_MOD0x10
-#define H_CLEAR_REF0x14
-#define H_PROTECT  0x18
-#define H_GET_TCE  0x1c
-#define H_PUT_TCE  0x20
-#define H_SET_SPRG00x24
-#define H_SET_DABR 0x28
-#define H_PAGE_INIT0x2c
-#define H_SET_ASR  0x30
-#define H_ASR_ON   0x34
-#define H_ASR_OFF  0x38
-#define H_LOGICAL_CI_LOAD  0x3c
-#define H_LOGICAL_CI_STORE 0x40
-#define H_LOGICAL_CACHE_LOAD   0x44
-#define H_LOGICAL_CACHE_STORE  0x48
-#define H_LOGICAL_ICBI 0x4c
-#define H_LOGICAL_DCBF 0x50
-#define H_GET_TERM_CHAR0x54
-#define H_PUT_TERM_CHAR0x58
-#define H_REAL_TO_LOGICAL  0x5c
-#define H_HYPERVISOR_DATA  0x60
-#define H_EOI  0x64
-#define H_CPPR 0x68
-#define H_IPI  0x6c
-#define H_IPOLL0x70
-#define H_XIRR 0x74
-#define H_PERFMON  0x7c
-#define H_MIGRATE_DMA  0x78
-#define H_REGISTER_VPA 0xDC
-#define H_CEDE 0xE0
-#define H_CONFER   0xE4
-#define H_PROD 0xE8
-#define H_GET_PPP  0xEC
-#define H_SET_PPP  0xF0
-#define H_PURR 0xF4
-#define H_PIC  0xF8
-#define H_REG_CRQ  0xFC
-#define H_FREE_CRQ 0x100
-#define H_VIO_SIGNAL   0x104
-#define H_SEND_CRQ 0x108
-#define H_COPY_RDMA0x110
-#define H_REGISTER_LOGICAL_LAN 0x114
-#define H_FREE_LOGICAL_LAN 0x118
-#define H_ADD_LOGICAL_LAN_BUFFER 0x11C
-#define H_SEND_LOGICAL_LAN 0x120
-#define H_BULK_REMOVE  0x124
-#define H_MULTICAST_CTRL   0x130
-#define H_SET_XDABR0x134
-#define H_STUFF_TCE0x138
-#define H_PUT_TCE_INDIRECT 0x13C
-#define H_CHANGE_LOGICAL_LAN_MAC 0x14C
-#define H_VTERM_PARTNER_INFO   0x150
-#define H_REGISTER_VTERM   0x154
-#define H_FREE_VTERM   0x158
-#define H_RESET_EVENTS  0x15C
-#define H_ALLOC_RESOURCE0x160
-#define H_FREE_RESOURCE 0x164
-#define H_MODIFY_QP 0x168
-#define H_QUERY_QP  0x16C
-#define H_REREGISTER_PMR0x170
-#define H_REGISTER_SMR  0x174
-#define H_QUERY_MR  0x178
-#define H_QUERY_MW  0x17C
-#define H_QUERY_HCA 0x180
-#define H_QUERY_PORT0x184
-#define H_MODIFY_PORT   0x188
-#define H_DEFINE_AQP1   0x18C
-#define H_GET_TRACE_BUFFER  0x190
-#define H_DEFINE_AQP0   0x194
-#define H_RESIZE_MR 0x198
-#define H_ATTACH_MCQP   0x19C
-#define H_DETACH_MCQP   0x1A0
-#define H_CREATE_RPT0x1A4
-#define H_REMOVE_RPT0x1A8
-#define H_REGISTER_RPAGES   0x1AC
-#define H_DISABLE_AND_GETC  0x1B0
-#define H_ERROR_DATA0x1B4
-#define H_GET_HCA_INFO  0x1B8
-#define H_GET_PERF_COUNT0x1BC
-#define H_MANAGE_TRACE  0x1C0
-#define H_FREE_LOGICAL_LAN_BUFFER 0x1D4
-#define H_QUERY_INT_STATE   0x1E4
-#define H_POLL_PENDING 0x1D8
-#define H_ILLAN_ATTRIBUTES 0x244
-#define H_MODIFY_HEA_QP0x250
-#define H_QUERY_HEA_QP 0x254
-#define H_QUERY_HEA0x258
-#define H_QUERY_HEA_PORT   0x25C
-#define 

Re: [PATCH 3/4] perf: Use pmu_events_map table to create event aliases

2015-05-20 Thread Sukadev Bhattiprolu
Andi Kleen [a...@linux.intel.com] wrote:
| If you need something else in vfm to identify the CPU 
| can't you just add it there? I wouldn't really call it vfm, it's
| really a abstract cpu identifier per architecture. So if you
| need pvr just add it there.

Ok. I will change vfm to cpuid_str and include pvr in it.

Sukadev

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