date:20160203

On 03-02-16, 01:11, Shilpasri G Bhat wrote:
>  static int init_chip_info(void)
>  {
>   unsigned int chip[256];
> - unsigned int cpu, i;
> + unsigned int cpu;
>   unsigned int prev_chip_id = UINT_MAX;
>   cpumask_t cpu_mask;
> - int ret = -ENOMEM;
> + int i, j, ret = -ENOMEM;
>  
>   core_to_chip_map = kcalloc(cpu_nr_cores(), sizeof(unsigned int),
>  GFP_KERNEL);
> @@ -583,12 +711,51 @@ static int init_chip_info(void)
>   goto free_chip_map;
>  
>   for (i = 0; i < nr_chips; i++) {
> + char name[10];
> +
>   chips[i].id = chip[i];
>   cpumask_copy([i].mask, cpumask_of_node(chip[i]));
>   INIT_WORK([i].throttle, powernv_cpufreq_work_fn);
> +
> + for (j = 0; j <= OCC_MAX_THROTTLE_STATUS; j++) {
> + chips[i].reason[j] =
> +  kcalloc(powernv_pstate_info.nr_pstates,
> +  sizeof(int), GFP_KERNEL);
> + if (!chips[i].reason[j]) {
> + ret = -ENOMEM;
> + goto free_chip;
> + }
> + }
> +
> + snprintf(name, sizeof(name), "chip%d", chips[i].id);
> + ret = kobject_init_and_add([i].kobj,
> +get_ktype(cpufreq_global_kobject),

Sorry but why do you need to create a kobject here ? A simple
sysfs_create_group() can create groups (directories) for you.

> +cpufreq_global_kobject, name);
> + if (ret)
> + goto free_chip;
> +
> + ret = sysfs_create_group([i].kobj, _stat_group);
> + if (ret) {
> + pr_info("Chip %d failed to create throttle sysfs 
> group\n",
> + chips[i].id);
> + goto free_kobject;
> + }
>   }

-- 
viresh
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Re: [PATCH v8 6/6] cpufreq: powernv: Add sysfs attributes to show throttle stats

2016-02-03 Thread Shilpasri G Bhat

Hi,

On 02/03/2016 01:57 PM, Viresh Kumar wrote:
> On 03-02-16, 01:11, Shilpasri G Bhat wrote:
>>  static int init_chip_info(void)
>>  {
>>  unsigned int chip[256];
>> -unsigned int cpu, i;
>> +unsigned int cpu;
>>  unsigned int prev_chip_id = UINT_MAX;
>>  cpumask_t cpu_mask;
>> -int ret = -ENOMEM;
>> +int i, j, ret = -ENOMEM;
>>  
>>  core_to_chip_map = kcalloc(cpu_nr_cores(), sizeof(unsigned int),
>> GFP_KERNEL);
>> @@ -583,12 +711,51 @@ static int init_chip_info(void)
>>  goto free_chip_map;
>>  
>>  for (i = 0; i < nr_chips; i++) {
>> +char name[10];
>> +
>>  chips[i].id = chip[i];
>>  cpumask_copy([i].mask, cpumask_of_node(chip[i]));
>>  INIT_WORK([i].throttle, powernv_cpufreq_work_fn);
>> +
>> +for (j = 0; j <= OCC_MAX_THROTTLE_STATUS; j++) {
>> +chips[i].reason[j] =
>> + kcalloc(powernv_pstate_info.nr_pstates,
>> + sizeof(int), GFP_KERNEL);
>> +if (!chips[i].reason[j]) {
>> +ret = -ENOMEM;
>> +goto free_chip;
>> +}
>> +}
>> +
>> +snprintf(name, sizeof(name), "chip%d", chips[i].id);
>> +ret = kobject_init_and_add([i].kobj,
>> +   get_ktype(cpufreq_global_kobject),
> 
> Sorry but why do you need to create a kobject here ? A simple
> sysfs_create_group() can create groups (directories) for you.

I need the chip-id in the _show(). With just sysfs_create_group() I will
get the cpufreq_global_kobject in the _show() and I will not be able to
figure out the chip-id.

Thanks and Regards,
Shilpa
> 
>> +   cpufreq_global_kobject, name);
>> +if (ret)
>> +goto free_chip;
>> +
>> +ret = sysfs_create_group([i].kobj, _stat_group);
>> +if (ret) {
>> +pr_info("Chip %d failed to create throttle sysfs 
>> group\n",
>> +chips[i].id);
>> +goto free_kobject;
>> +}
>>  }
> 

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Re: commit 9178ba294b6839eeff1a91bed95515d783f3ee6c an A-Eon Tabor Board

Resending as it was attached to and old thread relating to a different 
motherboard.


On 2/2/2016 9:54 AM, Julian Margetson wrote:


Commit 9178ba294b6839eeff1a91bed95515d783f3ee6c prevents building of 
kernel 4.1 branch on A-Eon Tabor Board.


CC arch/powerpc/math-emu/fsqrt.o
arch/powerpc/platforms/85xx/tabor.c:194:2: error: unknown field 
‘power_off’ specified in initializer

  .power_off  = tabor_power_off,
  ^
make[2]: *** [arch/powerpc/platforms/85xx/tabor.o] Error 1
make[1]: *** [arch/powerpc/platforms/85xx] Error 2
make: *** [arch/powerpc/platforms] Error 2


Builds after reverting  85xx portions of commit.

==
commit 9178ba294b6839eeff1a91bed95515d783f3ee6c

Author: Alexander Graf 

Date: Mon Oct 13 16:01:09 2014 +0200


powerpc: Convert power off logic to pm_power_off

The generic Linux framework to power off the machine is a function 
pointer


called pm_power_off. The trick about this pointer is that device 
drivers can


potentially implement it rather than board files.

Today on powerpc we set pm_power_off to invoke our generic full 
machine power


off logic which then calls ppc_md.power_off to invoke machine specific 
power


off.

However, when we want to add a power off GPIO via the "gpio-poweroff" 
driver,


this card house falls apart. That driver only registers itself if 
pm_power_off


is NULL to ensure it doesn't override board specific logic. However, 
since we


always set pm_power_off to the generic power off logic (which will 
just not


power off the machine if no ppc_md.power_off call is implemented), we 
can't


implement power off via the generic GPIO power off driver.

To fix this up, let's get rid of the ppc_md.power_off logic and just 
always use


pm_power_off as was intended. Then individual drivers such as the GPIO 
power off


driver can implement power off logic via that function pointer.

With this patch set applied and a few patches on top of QEMU that 
implement a


power off GPIO on the virt e500 machine, I can successfully turn off 
my virtual


machine after halt.

Signed-off-by: Alexander Graf 

[mpe: Squash into one patch and update changelog based on cover letter]

Signed-off-by: Michael Ellerman 


:04 04 11d9242dda2d364042ad2443b81aa124655ca79d 
8e5c37793f68e09977278bcea28e97ac7e0b812d M arch


root@julian-VirtualBox:/usr/src/linux-test#


root@julian-VirtualBox:/usr/src/linux-test# git bisect log

git bisect start

# bad: [97bf6af1f928216fd6c5a66e8a57bfa95a659672] Linux 3.19-rc1

git bisect bad 97bf6af1f928216fd6c5a66e8a57bfa95a659672

# good: [b2776bf7149bddd1f4161f14f79520f17fc1d71d] Linux 3.18

git bisect good b2776bf7149bddd1f4161f14f79520f17fc1d71d

# bad: [97bf6af1f928216fd6c5a66e8a57bfa95a659672] Linux 3.19-rc1

git bisect bad 97bf6af1f928216fd6c5a66e8a57bfa95a659672

# bad: [97bf6af1f928216fd6c5a66e8a57bfa95a659672] Linux 3.19-rc1

git bisect bad 97bf6af1f928216fd6c5a66e8a57bfa95a659672

# good: [70e71ca0af244f48a5dcf56dc435243792e3a495] Merge 
git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next


git bisect good 70e71ca0af244f48a5dcf56dc435243792e3a495

# bad: [988adfdffdd43cfd841df734664727993076d7cb] Merge branch 
'drm-next' of git://people.freedesktop.org/~airlied/linux


git bisect bad 988adfdffdd43cfd841df734664727993076d7cb

# bad: [e7cf773d431a63a2417902696fcc9e0ebdc83bbe] Merge tag 
'usb-3.19-rc1' of 
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb


git bisect bad e7cf773d431a63a2417902696fcc9e0ebdc83bbe

# bad: [26ceb127f7bcf473db926c6a026b18ddd6f274e8] Merge branch 
'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm


git bisect bad 26ceb127f7bcf473db926c6a026b18ddd6f274e8

# bad: [9bfccec24e31f4f83445cfe0c1b0a5ef97900628] Merge tag 
'ext4_for_linus' of 
git://git.kernel.org/pub/scm/linux/kernel/git/tytso/ext4


git bisect bad 9bfccec24e31f4f83445cfe0c1b0a5ef97900628

# good: [e2965cd0003f222bd49f67907c2bc6ed691c6d20] MIPS: Add MFHC0 and 
MTHC0 instructions to uasm.


git bisect good e2965cd0003f222bd49f67907c2bc6ed691c6d20

# bad: [56548fc0e86cb9156af7a7e1f15ba78f251dafaf] powerpc/powernv: 
Return to cpu offline loop when finished in KVM guest


git bisect bad 56548fc0e86cb9156af7a7e1f15ba78f251dafaf

# bad: [59994fb01a102a448ba758c9b824a29b4a99cc1b] powerpc: Use generic 
PIE randomization


git bisect bad 59994fb01a102a448ba758c9b824a29b4a99cc1b

# bad: [7aa189c8f57f2141b8655c2a13c7486d0844d490] powerpc/pseries: 
Quieten ibm,pcie-link-speed-stats warning


git bisect bad 7aa189c8f57f2141b8655c2a13c7486d0844d490

# bad: [6e4c632cdff7bf0238a2543dfe98bd1ad40313c2] powerpc: make __ffs 
return unsigned long


git bisect bad 6e4c632cdff7bf0238a2543dfe98bd1ad40313c2

# bad: [adb7cd732292b06ee964d9f6090b17c70bd8bd3d] powerpc/pci: Quieten 
unset I/O resource warning


git bisect bad adb7cd732292b06ee964d9f6090b17c70bd8bd3d

# bad:

Re: [PATCH 1/2] powerpc/eeh: Check for EEH availability in eeh_add_device_early()

2016-02-03 Thread Guilherme G. Piccoli


On 02/02/2016 08:44 PM, Gavin Shan wrote:

/**
+ * eeh_available - Checks for the availability of EEH based on running
+ * architecture.
+ *
+ * This routine should be used in case we need to check if EEH is
+ * available in some situation, regardless if EEH is enabled or not.
+ * For example, if we hotplug-add a PCI device on a machine with no
+ * other PCI device, EEH won't be enabled, yet it's available if the
+ * arch supports it.
+ */
+static inline bool eeh_available(void)
+{
+   if (machine_is(pseries) || machine_is(powernv))
+   return true;
+   return false;
+}
+


As I was told by somebody else before, the comments for static function
needn't to be exported.



Thanks for the advice Gavin, but I didn't get it. What means comments 
not being exported? For sure I can change the comment if desired, but I 
can't see any issue with it.




+/**
  * eeh_add_device_early - Enable EEH for the indicated device node
  * @pdn: PCI device node for which to set up EEH
  *
@@ -1072,7 +1089,7 @@ void eeh_add_device_early(struct pci_dn *pdn)
struct pci_controller *phb;
struct eeh_dev *edev = pdn_to_eeh_dev(pdn);

-   if (!edev || !eeh_enabled())
+   if (!edev || !eeh_available())
return;

if (!eeh_has_flag(EEH_PROBE_MODE_DEVTREE))


The change here seems not correct enough. Before the changes, 
eeh_add_device_early()
does nothing if EEH is disabled on pSeries. With the changes applied, the EEH 
device
(edev) will be scanned even EEH is disabled on pSeries.

 From the code changes, I didn't figure out the real problem you try to fix. 
Cell
platform doesn't have flag EEH_PROBE_MODE_DEVTREE. So the function does nothing
on Cell platform except calling into pdn_to_eeh_dev(). I'm not sure if the 
kernel
crashed in pdn_to_eeh_dev() on Cell platform?


Gavin, thanks for the comments. Seems your commit d91dafc02f4 
("powerpc/eeh: Delay probing EEH device during hotplug") solved the 
problem with Cell arch. Notice that Michael pointed the issue with Cell 
and fixed it by commit 89a51df5ab1d ("powerpc/eeh: Fix crash in 
eeh_add_device_early() on Cell").


But you commit is recent than Michael's and since it adds the check for 
EEH_PROBE_MODE_DEVTREE, the Cell crash doesn't happen anymore. It's my 
bad, I should have checked the dates of commits to figure your commit is 
recent than Michael's one.


Anyway, the modification proposed by this patch is useless if we revert 
Michael's commit then. Gavin and Michael, are you OK if I revert it?


The reason for the revert is that we can't check for eeh_enabled() here 
- imagine the following scenario: we boot a machine with no PCI device, 
then, we hotplug-add a PCI device. When we reach eeh_add_device_early(), 
the function eeh_enabled() is false because at boot time we had no PCI 
devices so EEH is not initialized/enabled.


Cheers,


Guilherme

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Re: [PATCH 2/2] powerpc/pseries: Check if EEH is enabled on DDW mechanism code

2016-02-03 Thread Guilherme G. Piccoli


On 02/02/2016 09:48 PM, Gavin Shan wrote:

On Tue, Jan 19, 2016 at 06:18:20PM -0200, Guilherme G. Piccoli wrote:

-   /* only attempt to use a new window if 64-bit DMA is requested */
-   if (!disable_ddw && dma_mask == DMA_BIT_MASK(64)) {
+   /* We should check if EEH is enabled here, since DDW mechanism has
+* an intrinsic dependency of EEH config addr information. Also, we
+* only attempt to use a new window if 64-bit DMA is requested */
+   if (eeh_enabled() && !disable_ddw && dma_mask == DMA_BIT_MASK(64)) {
dn = pci_device_to_OF_node(pdev);
dev_dbg(dev, "node is %s\n", dn->full_name);



There are two types of addresses: (1) PCI config address (2) PE config address.
(1) is used to indentify one PCI device which is included in the PE. (2) is the
PCI config address of PE's primary bus in pHyp. Both of them can be used to 
identify
the PE. It means the (1) PCI config address, which is retrieved from pci_dn, 
can be
passed to hypervisor. Then we don't have to disable DDW when EEH is disabled.

Guilherme, did you hit the crash on pHyp or PowerKVM?


Gavin, thanks very much for the clarification. So, we can interchange 
edev->config_addr with pdn->pci_ext_config_space ?

This would solve the issue with DDW being enabled when EEH is not.

I hit the issue on PowerVM (PHyp). I wasn't able to perform hotplug in 
qemu that time I was testing this - I can re-test on qemu. Can we use 
pci_dn config address in qemu guest too?


Cheers,


Guilherme

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Re: [PATCH v8 6/6] cpufreq: powernv: Add sysfs attributes to show throttle stats

2016-02-03 Thread Gautham R Shenoy

Hi Viresh,

> 
> What I can suggest is:
> - Move this directory inside cpuX/cpufreq/ directory, in a similar way
>   as to how we create 'stats' directory today.
> - You can then get policy->cpu, to get chip->id out of it.
> - The only disadvantage here is that the same chip directory will be
>   replicated in multiple policies, but that makes it more readable.

Thinking about it, having a sysfs group attached to a policy kobject
looks ok if replication of the same chip information across multiple
policies is not objectionable.

Regarding the table-format, it breaks the sysfs's one-value-per-file
rule. So I would still prefer each throttle reason being a separate
file which gives the number of times the chip frequency was throttled
due to that reason. We can live without the per-frequency
throttle stats listed in the throttle_status.

So, would the following be sysfs group structure be acceptable?

$ls -1 /sys/devices/system/cpu/cpuX/cpufreq/throttle_stats/
unthrottle
powercap
overtemp
supply_fault
overcurrent
occ_reset
turbo_stat
sub_turbo_stat

--
Thanks and Regards
gautham.

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Re: [PATCH v8 6/6] cpufreq: powernv: Add sysfs attributes to show throttle stats

On 03-02-16, 14:12, Shilpasri G Bhat wrote:
> I need the chip-id in the _show(). With just sysfs_create_group() I will
> get the cpufreq_global_kobject in the _show() and I will not be able to
> figure out the chip-id.

The more I look at it, the more I am convinced that keeping this
'chip' directory in /sys/devices/system/cpu/cpuX/cpufreq/ makes sense.

So, here is the deal:
- A 'chip' on your platforms can contain multiple group of CPUs, which
  are represented by policies in cpufreq core. i.e. A chip can have
  multiple policies.
- All CPUs present on the same chip are subject to same throttling
  outcomes.
- Right now you are putting the 'chip' directory in cpu/cpufreq/
  directory. Because that directory isn't specific to a policy, but
  entire cpufreq subsystem, you can't get a policy->cpu in the code
  for the kobject in question. And so you are *forced* to create a
  kobject, so that you can do container_of() and get chip->id.
- And then you also need to unnecessarily add another field in the
  chip directory 'chip_mask', that is nothing but an bitwise OR
  operation on policy->related_cpus, so that userspace can know which
  policies/CPUs are managed by the 'chip'.

What I can suggest is:
- Move this directory inside cpuX/cpufreq/ directory, in a similar way
  as to how we create 'stats' directory today.
- You can then get policy->cpu, to get chip->id out of it.
- The only disadvantage here is that the same chip directory will be
  replicated in multiple policies, but that makes it more readable.

Thoughts ?

-- 
viresh
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Re: [PATCH v8 0/6] cpufreq: powernv: Redesign the presentation of throttle notification and solve bug-fixes in the driver

2016-02-03 Thread Rafael J. Wysocki

Hi,

On Tue, Feb 2, 2016 at 8:41 PM, Shilpasri G Bhat
 wrote:
> In POWER8, OCC(On-Chip-Controller) can throttle the frequency of the
> CPU when the chip crosses its thermal and power limits. Currently,
> powernv-cpufreq driver detects and reports this event as a console
> message. Some machines may not sustain the max turbo frequency in all
> conditions and can be throttled frequently. This can lead to the
> flooding of console with throttle messages. So this patchset aims to
> redesign the presentation of this event via sysfs counters and
> tracepoints. And it also fixes couple of bugs reported in the driver.
>
> - Patch [1] fixes a memory leak bug
> - Patch [2] fixes the cpu hot-plug bug in powernv_cpufreq_work_fn().
> - Patch [3] solves a bug in powernv_cpufreq_throttle_check(), which
>   calls in to cpu_to_chip_id() in hot path which reads DT every time
>   to find the chip id.
> - Patches [4] to [6] will add a perf trace point
>   "power:powernv_throttle" and sysfs throttle counter stats in
>   /sys/devices/system/cpu/cpufreq/chipN.
>
> Changes from v7:
> - Changes in patch[6] involves adding a table to represent the
>   throtle stats in frequency X reason layout. Detailed version log
>   in the patch.
>
> Changes from v6:
> - Changes wrt comments from Balbir Singh and Viresh Kumar. Details in
>   the version log of the patches.
>
> Changes from v5:
> - Fix kbuild error:
> drivers/cpufreq/powernv-cpufreq.c:428:2: error: implicit declaration of
> function 'get_online_cpus' [-Werror=implicit-function-declaration]
>
> Changes from v4:
> - Fix a hot-plug bug in powernv_cpufreq_work_fn()
> - Changes wrt Gautham's and Shreyas's comments
>
> Changes from v3:
> - Add a fix to replace cpu_to_chip_id() with simpler PIR shift to
>   obtain the chip id.
> - Break patch2 in to two patches separating the tracepoint and sysfs
>   attribute changes.
>
> Changes from v2:
> - Fixed kbuild test warning.
> drivers/cpufreq/powernv-cpufreq.c:609:2: warning: ignoring return
> value of 'kstrtoint', declared with attribute warn_unused_result
> [-Wunused-result]
> Shilpasri G Bhat (6):
>   cpufre: powernv: Free 'chips' on module exit
>   cpufreq: powernv: Hot-plug safe the kworker thread
>   cpufreq: powernv: Remove cpu_to_chip_id() from hot-path
>   cpufreq: powernv/tracing: Add powernv_throttle tracepoint
>   cpufreq: powernv: Replace pr_info with trace print for throttle event
>   cpufreq: powernv: Add sysfs attributes to show throttle stats

It looks like patches [1-5/6] are not objectionable and I can apply
them without the last one if you want me to.

Thanks,
Rafael
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Re: commit 9178ba294b6839eeff1a91bed95515d783f3ee6c an A-Eon Tabor Board


On 2/3/2016 4:43 PM, Alexander Graf wrote:



On 02/03/2016 10:33 AM, Julian Margetson wrote:
Resending as it was attached to and old thread relating to a 
different motherboard.


On 2/2/2016 9:54 AM, Julian Margetson wrote:


Commit 9178ba294b6839eeff1a91bed95515d783f3ee6c prevents building of 
kernel 4.1 branch on A-Eon Tabor Board.


CC arch/powerpc/math-emu/fsqrt.o
arch/powerpc/platforms/85xx/tabor.c:194:2: error: unknown field 
‘power_off’ specified in initializer


I can't seem to find that file in Linux upstream?


Alex





It may have been discontinued as the patches used were maintained along 
with patches for the (Varisys)  A-Eon Cyrus board

which is officially supported from kernel 4.4.

https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=c383ee84e1d575b09d167185d15df24bde25eb15

Julian

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Re: [RFT PATCH] powerpc: convert amigaone_defconfig to use libata PATA drivers

2016-02-03 Thread Gerhard Pircher

Am 2016-02-03 um 16:50 schrieb Bartlomiej Zolnierkiewicz:
> IDE subsystem has been deprecated since 2009 and the majority
> (if not all) of Linux distributions have switched to use
> libata for ATA support exclusively.  However there are still
> some users (mostly old or/and embedded non-x86 systems) that
> have not converted from using IDE subsystem to libata PATA
> drivers.  This doesn't seem to be good thing in the long-term
> for Linux as while there is less and less PATA systems left
> in use:
> 
> * testing efforts are divided between two subsystems
> 
> * having duplicate drivers for same hardware confuses users
> 
> This patch converts amigaone_defconfig to use libata PATA
> drivers.
> 
> Signed-off-by: Bartlomiej Zolnierkiewicz 
> ---
> Build tested only.
> If you have affected hardware please test.  Thank you.
> 
>  arch/powerpc/configs/amigaone_defconfig | 10 --
>  1 file changed, 4 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/powerpc/configs/amigaone_defconfig 
> b/arch/powerpc/configs/amigaone_defconfig
> index 84f1b41..55a4929 100644
> --- a/arch/powerpc/configs/amigaone_defconfig
> +++ b/arch/powerpc/configs/amigaone_defconfig
> @@ -46,12 +46,6 @@ CONFIG_PARPORT_PC_FIFO=y
>  CONFIG_BLK_DEV_FD=y
>  CONFIG_BLK_DEV_LOOP=y
>  CONFIG_BLK_DEV_RAM=y
> -CONFIG_IDE=y
> -CONFIG_BLK_DEV_IDECD=y
> -# CONFIG_IDEPCI_PCIBUS_ORDER is not set
> -CONFIG_BLK_DEV_GENERIC=y
> -CONFIG_BLK_DEV_SIIMAGE=y
> -CONFIG_BLK_DEV_VIA82CXXX=y
>  CONFIG_SCSI=y
>  CONFIG_BLK_DEV_SD=y
>  CONFIG_CHR_DEV_ST=y
> @@ -62,6 +56,10 @@ CONFIG_SCSI_CONSTANTS=y
>  CONFIG_SCSI_SYM53C8XX_2=y
>  CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=0
>  # CONFIG_SCSI_SYM53C8XX_MMIO is not set
> +CONFIG_ATA=y
> +CONFIG_PATA_SIL680=y
> +CONFIG_PATA_VIA=y
> +CONFIG_ATA_GENERIC=y
>  CONFIG_NETDEVICES=y
>  CONFIG_VORTEX=y
>  CONFIG_8139CP=y
> 
Thanks for cleaning up the defconfig file!

libata drivers work fine on the amigaone platform (tested on all three
first-gen AmigaOne machines). BTW: could it be that CONFIG_ATA_SFF=y
and CONFIG_ATA_BMDMA=y are missing in the patch?

br,
Gerhard
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Re: commit 9178ba294b6839eeff1a91bed95515d783f3ee6c an A-Eon Tabor Board

2016-02-03 Thread Alexander Graf




On 02/03/2016 11:15 PM, Julian Margetson wrote:

On 2/3/2016 4:43 PM, Alexander Graf wrote:



On 02/03/2016 10:33 AM, Julian Margetson wrote:
Resending as it was attached to and old thread relating to a 
different motherboard.


On 2/2/2016 9:54 AM, Julian Margetson wrote:


Commit 9178ba294b6839eeff1a91bed95515d783f3ee6c prevents building 
of kernel 4.1 branch on A-Eon Tabor Board.


CC arch/powerpc/math-emu/fsqrt.o
arch/powerpc/platforms/85xx/tabor.c:194:2: error: unknown field 
‘power_off’ specified in initializer


I can't seem to find that file in Linux upstream?


Alex





It may have been discontinued as the patches used were maintained 
along with patches for the (Varisys)  A-Eon Cyrus board

which is officially supported from kernel 4.4.

https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=c383ee84e1d575b09d167185d15df24bde25eb15 



I don't quite understand how an internal API change in Linux breaking 
random external patches is a bug? Either your code is upstream or it can 
break on every git commit done upstream.



Alex

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Re: commit 9178ba294b6839eeff1a91bed95515d783f3ee6c an A-Eon Tabor Board

2016-02-03 Thread Alexander Graf




On 02/03/2016 10:33 AM, Julian Margetson wrote:
Resending as it was attached to and old thread relating to a different 
motherboard.


On 2/2/2016 9:54 AM, Julian Margetson wrote:


Commit 9178ba294b6839eeff1a91bed95515d783f3ee6c prevents building of 
kernel 4.1 branch on A-Eon Tabor Board.


CC arch/powerpc/math-emu/fsqrt.o
arch/powerpc/platforms/85xx/tabor.c:194:2: error: unknown field 
‘power_off’ specified in initializer


I can't seem to find that file in Linux upstream?


Alex

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[PATCH] powerpc/8xx: CONFIG_DEBUG_PAGEALLOC requires ITLBmiss for kernel addresses

When CONFIG_DEBUG_PAGEALLOC is activated, the initial TLB mapping gets
flushed to track accesses to wrong areas. Therefore, kernel addresses
will also generate ITLB misses.

Signed-off-by: Christophe Leroy 
---
 arch/powerpc/kernel/head_8xx.S | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index 78c1eba..e629e28 100644
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -329,7 +329,7 @@ InstructionTLBMiss:
/* If we are faulting a kernel address, we have to use the
 * kernel page tables.
 */
-#ifdef CONFIG_MODULES
+#if defined(CONFIG_MODULES) || defined (CONFIG_DEBUG_PAGEALLOC)
/* Only modules will cause ITLB Misses as we always
 * pin the first 8MB of kernel memory */
mfspr   r11, SPRN_SRR0  /* Get effective address of fault */
-- 
2.1.0

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Re: [PATCH v8 6/6] cpufreq: powernv: Add sysfs attributes to show throttle stats

On 03-02-16, 17:32, Gautham R Shenoy wrote:
> Regarding the table-format, it breaks the sysfs's one-value-per-file
> rule. So I would still prefer each throttle reason being a separate
> file which gives the number of times the chip frequency was throttled
> due to that reason. We can live without the per-frequency
> throttle stats listed in the throttle_status.
> 
> So, would the following be sysfs group structure be acceptable?
> 
> $ls -1 /sys/devices/system/cpu/cpuX/cpufreq/throttle_stats/
> unthrottle
> powercap
> overtemp
> supply_fault
> overcurrent
> occ_reset
> turbo_stat
> sub_turbo_stat

That was suggested for your convenience only, feel free to keep it the
way you want it.

I forgot about the one-value-per-file thing really, but we are using
that for cpufreq-stats as well.

And now that you have mentioned that to me, why shouldn't this stats
directory be moved to debugfs ? :)

We are never going to perform a store here, isn't it ? And is just for
information, nothing more.

@Rafael: ??

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Re: [PATCH v8 0/6] cpufreq: powernv: Redesign the presentation of throttle notification and solve bug-fixes in the driver

On 03-02-16, 14:40, Rafael J. Wysocki wrote:
> It looks like patches [1-5/6] are not objectionable and I can apply
> them without the last one if you want me to.

Looks fine to me.

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[PATCH v5 03/23] powerpc: Update documentation for noltlbs kernel parameter

Now the noltlbs kernel parameter is also applicable to PPC8xx

Signed-off-by: Christophe Leroy 
---
v2: no change
v3: no change
v4: no change
v5: no change

 Documentation/kernel-parameters.txt | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/Documentation/kernel-parameters.txt 
b/Documentation/kernel-parameters.txt
index 59e1515..c3e420b 100644
--- a/Documentation/kernel-parameters.txt
+++ b/Documentation/kernel-parameters.txt
@@ -2592,7 +2592,7 @@ bytes respectively. Such letter suffixes can also be 
entirely omitted.
nolapic_timer   [X86-32,APIC] Do not use the local APIC timer.
 
noltlbs [PPC] Do not use large page/tlb entries for kernel
-   lowmem mapping on PPC40x.
+   lowmem mapping on PPC40x and PPC8xx
 
nomca   [IA-64] Disable machine check abort handling
 
-- 
2.1.0

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[PATCH v5 06/23] powerpc32: refactor x_mapped_by_bats() and x_mapped_by_tlbcam() together

x_mapped_by_bats() and x_mapped_by_tlbcam() serve the same kind of
purpose, and are never defined at the same time.
So rename them x_block_mapped() and define them in the relevant
places

Signed-off-by: Christophe Leroy 
---
v2: no change
v3: Functions are mutually exclusive so renamed iaw Scott comment instead of 
grouping into a single function
v4: no change
v5: no change

 arch/powerpc/mm/fsl_booke_mmu.c |  4 ++--
 arch/powerpc/mm/mmu_decl.h  | 10 ++
 arch/powerpc/mm/pgtable_32.c| 44 ++---
 arch/powerpc/mm/ppc_mmu_32.c|  4 ++--
 4 files changed, 20 insertions(+), 42 deletions(-)

diff --git a/arch/powerpc/mm/fsl_booke_mmu.c b/arch/powerpc/mm/fsl_booke_mmu.c
index f3afe3d..5d45341 100644
--- a/arch/powerpc/mm/fsl_booke_mmu.c
+++ b/arch/powerpc/mm/fsl_booke_mmu.c
@@ -75,7 +75,7 @@ unsigned long tlbcam_sz(int idx)
 /*
  * Return PA for this VA if it is mapped by a CAM, or 0
  */
-phys_addr_t v_mapped_by_tlbcam(unsigned long va)
+phys_addr_t v_block_mapped(unsigned long va)
 {
int b;
for (b = 0; b < tlbcam_index; ++b)
@@ -87,7 +87,7 @@ phys_addr_t v_mapped_by_tlbcam(unsigned long va)
 /*
  * Return VA for a given PA or 0 if not mapped
  */
-unsigned long p_mapped_by_tlbcam(phys_addr_t pa)
+unsigned long p_block_mapped(phys_addr_t pa)
 {
int b;
for (b = 0; b < tlbcam_index; ++b)
diff --git a/arch/powerpc/mm/mmu_decl.h b/arch/powerpc/mm/mmu_decl.h
index 7faeb9f..40dd5d3 100644
--- a/arch/powerpc/mm/mmu_decl.h
+++ b/arch/powerpc/mm/mmu_decl.h
@@ -158,3 +158,13 @@ struct tlbcam {
u32 MAS7;
 };
 #endif
+
+#if defined(CONFIG_6xx) || defined(CONFIG_FSL_BOOKE)
+/* 6xx have BATS */
+/* FSL_BOOKE have TLBCAM */
+phys_addr_t v_block_mapped(unsigned long va);
+unsigned long p_block_mapped(phys_addr_t pa);
+#else
+static inline phys_addr_t v_block_mapped(unsigned long va) { return 0; }
+static inline unsigned long p_block_mapped(phys_addr_t pa) { return 0; }
+#endif
diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
index 7692d1b..db0d35e 100644
--- a/arch/powerpc/mm/pgtable_32.c
+++ b/arch/powerpc/mm/pgtable_32.c
@@ -41,32 +41,8 @@ unsigned long ioremap_base;
 unsigned long ioremap_bot;
 EXPORT_SYMBOL(ioremap_bot);/* aka VMALLOC_END */
 
-#ifdef CONFIG_6xx
-#define HAVE_BATS  1
-#endif
-
-#if defined(CONFIG_FSL_BOOKE)
-#define HAVE_TLBCAM1
-#endif
-
 extern char etext[], _stext[];
 
-#ifdef HAVE_BATS
-extern phys_addr_t v_mapped_by_bats(unsigned long va);
-extern unsigned long p_mapped_by_bats(phys_addr_t pa);
-#else /* !HAVE_BATS */
-#define v_mapped_by_bats(x)(0UL)
-#define p_mapped_by_bats(x)(0UL)
-#endif /* HAVE_BATS */
-
-#ifdef HAVE_TLBCAM
-extern phys_addr_t v_mapped_by_tlbcam(unsigned long va);
-extern unsigned long p_mapped_by_tlbcam(phys_addr_t pa);
-#else /* !HAVE_TLBCAM */
-#define v_mapped_by_tlbcam(x)  (0UL)
-#define p_mapped_by_tlbcam(x)  (0UL)
-#endif /* HAVE_TLBCAM */
-
 #define PGDIR_ORDER(32 + PGD_T_LOG2 - PGDIR_SHIFT)
 
 #ifndef CONFIG_PPC_4K_PAGES
@@ -228,19 +204,10 @@ __ioremap_caller(phys_addr_t addr, unsigned long size, 
unsigned long flags,
 
/*
 * Is it already mapped?  Perhaps overlapped by a previous
-* BAT mapping.  If the whole area is mapped then we're done,
-* otherwise remap it since we want to keep the virt addrs for
-* each request contiguous.
-*
-* We make the assumption here that if the bottom and top
-* of the range we want are mapped then it's mapped to the
-* same virt address (and this is contiguous).
-*  -- Cort
+* mapping.
 */
-   if ((v = p_mapped_by_bats(p)) /*&& p_mapped_by_bats(p+size-1)*/ )
-   goto out;
-
-   if ((v = p_mapped_by_tlbcam(p)))
+   v = p_block_mapped(p);
+   if (v)
goto out;
 
if (slab_is_available()) {
@@ -278,7 +245,8 @@ void iounmap(volatile void __iomem *addr)
 * If mapped by BATs then there is nothing to do.
 * Calling vfree() generates a benign warning.
 */
-   if (v_mapped_by_bats((unsigned long)addr)) return;
+   if (v_block_mapped((unsigned long)addr))
+   return;
 
if (addr > high_memory && (unsigned long) addr < ioremap_bot)
vunmap((void *) (PAGE_MASK & (unsigned long)addr));
@@ -403,7 +371,7 @@ static int __change_page_attr(struct page *page, pgprot_t 
prot)
BUG_ON(PageHighMem(page));
address = (unsigned long)page_address(page);
 
-   if (v_mapped_by_bats(address) || v_mapped_by_tlbcam(address))
+   if (v_block_mapped(address))
return 0;
if (!get_pteptr(_mm, address, , ))
return -EINVAL;
diff --git a/arch/powerpc/mm/ppc_mmu_32.c b/arch/powerpc/mm/ppc_mmu_32.c
index 6b2f3e4..2a049fb 100644
--- a/arch/powerpc/mm/ppc_mmu_32.c
+++ b/arch/powerpc/mm/ppc_mmu_32.c
@@ -49,7 +49,7 @@ struct batrange {

[PATCH v5 18/23] powerpc: add inline functions for cache related instructions

This patch adds inline functions to use dcbz, dcbi, dcbf, dcbst
from C functions

Signed-off-by: Christophe Leroy 
---
v2: new
v3: no change
v4: no change
v5: no change

 arch/powerpc/include/asm/cache.h | 19 +++
 1 file changed, 19 insertions(+)

diff --git a/arch/powerpc/include/asm/cache.h b/arch/powerpc/include/asm/cache.h
index 5f8229e..ffbafbf 100644
--- a/arch/powerpc/include/asm/cache.h
+++ b/arch/powerpc/include/asm/cache.h
@@ -69,6 +69,25 @@ extern void _set_L3CR(unsigned long);
 #define _set_L3CR(val) do { } while(0)
 #endif
 
+static inline void dcbz(void *addr)
+{
+   __asm__ __volatile__ ("dcbz 0, %0" : : "r"(addr) : "memory");
+}
+
+static inline void dcbi(void *addr)
+{
+   __asm__ __volatile__ ("dcbi 0, %0" : : "r"(addr) : "memory");
+}
+
+static inline void dcbf(void *addr)
+{
+   __asm__ __volatile__ ("dcbf 0, %0" : : "r"(addr) : "memory");
+}
+
+static inline void dcbst(void *addr)
+{
+   __asm__ __volatile__ ("dcbst 0, %0" : : "r"(addr) : "memory");
+}
 #endif /* !__ASSEMBLY__ */
 #endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_CACHE_H */
-- 
2.1.0

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[PATCH v5 21/23] powerpc: Simplify test in __dma_sync()

This simplification helps the compiler. We now have only one test
instead of two, so it reduces the number of branches.

Signed-off-by: Christophe Leroy 
---
v2: new
v3: no change
v4: no change
v5: no change

 arch/powerpc/mm/dma-noncoherent.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/powerpc/mm/dma-noncoherent.c 
b/arch/powerpc/mm/dma-noncoherent.c
index 169aba4..2dc74e5 100644
--- a/arch/powerpc/mm/dma-noncoherent.c
+++ b/arch/powerpc/mm/dma-noncoherent.c
@@ -327,7 +327,7 @@ void __dma_sync(void *vaddr, size_t size, int direction)
 * invalidate only when cache-line aligned otherwise there is
 * the potential for discarding uncommitted data from the cache
 */
-   if ((start & (L1_CACHE_BYTES - 1)) || (size & (L1_CACHE_BYTES - 
1)))
+   if ((start | end) & (L1_CACHE_BYTES - 1))
flush_dcache_range(start, end);
else
invalidate_dcache_range(start, end);
-- 
2.1.0

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Re: [PATCH] powerpc/fsl-pci: Correct the comparison of the LTSSM

2016-02-03 Thread Scott Wood

On Wed, 2016-02-03 at 21:32 +, Edward L Swarthout wrote:
> From: Scott Wood:
> > On Mon, 2016-02-01 at 03:57 +, Zhiqiang Hou wrote:
> > > Any comments?
> > 
> > Only that it was submitted too late for the last merge window, and I have
> > not
> > yet begun processing patches for the next one.  If you meant this to be a
> > fix
> > important enough to go in outside the merge window, it's missing any
> > statement
> > of what the actual symptoms are.
> > 
> > > -Original Message-
> > > From: Zhiqiang Hou [mailto:zhiqiang@freescale.com]
> > > To: linuxppc-dev@lists.ozlabs.org; b...@kernel.crashing.org;
> > > Subject: [PATCH] powerpc/fsl-pci: Correct the comparison of the LTSSM
> > > 
> > > Only the value PCIE_LTSSM_L0 stands for the link is up, instead of >=
> > > PCIE_LTSSM_L0.
> > > 
> > > diff --git a/arch/powerpc/sysdev/fsl_pci.c
> > > b/arch/powerpc/sysdev/fsl_pci.c
> > > @@ -73,7 +73,7 @@ static int fsl_pcie_check_link(struct pci_controller
> > > early_read_config_dword(hose, 0, 0, PCIE_LTSSM,
> > > -   if (val < PCIE_LTSSM_L0)
> > > +   if (val != PCIE_LTSSM_L0)
> > > return 1;
> 
> This patch is incorrect as there are actually two states L0 and L0s
> (standby) 
> that indicate an active link (a LTSSM value of 0x11 or  0x12).
> 
> The next user manual revision should contain this detail.

The next manual of what chip?

Are there any non-active states for which the current test does not work?

-Scott

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[PATCH 1/6] ibmvscsi: Correct values for several viosrp_crq_format enums

The enum values for VIOSRP_LINUX_FORMAT and VIOSRP_INLINE_FORMAT are
off by one. They are currently defined as 0x06 and 0x07 respetively.
These values are defined in PAPR correctly as 0x05 and 0x06. This
inconsistency has gone unnoticed as neither enum is currently used.
The possible future support of PING messages between the VIOS and
client adapter relies on VIOSRP_INLINE_FORMAT crq messages.
Corrected these enum values to match PAPR definitions.

Signed-off-by: Tyrel Datwyler 
---
 drivers/scsi/ibmvscsi/viosrp.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/scsi/ibmvscsi/viosrp.h b/drivers/scsi/ibmvscsi/viosrp.h
index 1162430..d1044e9 100644
--- a/drivers/scsi/ibmvscsi/viosrp.h
+++ b/drivers/scsi/ibmvscsi/viosrp.h
@@ -56,8 +56,8 @@ enum viosrp_crq_formats {
VIOSRP_MAD_FORMAT = 0x02,
VIOSRP_OS400_FORMAT = 0x03,
VIOSRP_AIX_FORMAT = 0x04,
-   VIOSRP_LINUX_FORMAT = 0x06,
-   VIOSRP_INLINE_FORMAT = 0x07
+   VIOSRP_LINUX_FORMAT = 0x05,
+   VIOSRP_INLINE_FORMAT = 0x06
 };
 
 enum viosrp_crq_status {
-- 
2.5.0

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[PATCH v5 04/23] powerpc/8xx: move setup_initial_memory_limit() into 8xx_mmu.c

Now we have a 8xx specific .c file for that so put it in there
as other powerpc variants do

Signed-off-by: Christophe Leroy 
---
v2: no change
v3: no change
v4: no change
v5: no change

 arch/powerpc/mm/8xx_mmu.c | 17 +
 arch/powerpc/mm/init_32.c | 19 ---
 2 files changed, 17 insertions(+), 19 deletions(-)

diff --git a/arch/powerpc/mm/8xx_mmu.c b/arch/powerpc/mm/8xx_mmu.c
index 2d42745..a84f5eb 100644
--- a/arch/powerpc/mm/8xx_mmu.c
+++ b/arch/powerpc/mm/8xx_mmu.c
@@ -81,3 +81,20 @@ unsigned long __init mmu_mapin_ram(unsigned long top)
 
return mapped;
 }
+
+void setup_initial_memory_limit(phys_addr_t first_memblock_base,
+   phys_addr_t first_memblock_size)
+{
+   /* We don't currently support the first MEMBLOCK not mapping 0
+* physical on those processors
+*/
+   BUG_ON(first_memblock_base != 0);
+
+#ifdef CONFIG_PIN_TLB
+   /* 8xx can only access 24MB at the moment */
+   memblock_set_current_limit(min_t(u64, first_memblock_size, 0x0180));
+#else
+   /* 8xx can only access 8MB at the moment */
+   memblock_set_current_limit(min_t(u64, first_memblock_size, 0x0080));
+#endif
+}
diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
index a10be66..1a18e4b 100644
--- a/arch/powerpc/mm/init_32.c
+++ b/arch/powerpc/mm/init_32.c
@@ -193,22 +193,3 @@ void __init MMU_init(void)
/* Shortly after that, the entire linear mapping will be available */
memblock_set_current_limit(lowmem_end_addr);
 }
-
-#ifdef CONFIG_8xx /* No 8xx specific .c file to put that in ... */
-void setup_initial_memory_limit(phys_addr_t first_memblock_base,
-   phys_addr_t first_memblock_size)
-{
-   /* We don't currently support the first MEMBLOCK not mapping 0
-* physical on those processors
-*/
-   BUG_ON(first_memblock_base != 0);
-
-#ifdef CONFIG_PIN_TLB
-   /* 8xx can only access 24MB at the moment */
-   memblock_set_current_limit(min_t(u64, first_memblock_size, 0x0180));
-#else
-   /* 8xx can only access 8MB at the moment */
-   memblock_set_current_limit(min_t(u64, first_memblock_size, 0x0080));
-#endif
-}
-#endif /* CONFIG_8xx */
-- 
2.1.0

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[PATCH v5 07/23] powerpc/8xx: Fix vaddr for IMMR early remap

Memory: 124428K/131072K available (3748K kernel code, 188K rwdata,
648K rodata, 508K init, 290K bss, 6644K reserved)
Kernel virtual memory layout:
  * 0xfffdf000..0xf000  : fixmap
  * 0xfde0..0xfe00  : consistent mem
  * 0xfddf6000..0xfde0  : early ioremap
  * 0xc900..0xfddf6000  : vmalloc & ioremap
SLUB: HWalign=16, Order=0-3, MinObjects=0, CPUs=1, Nodes=1

Today, IMMR is mapped 1:1 at startup

Mapping IMMR 1:1 is just wrong because it may overlap with another
area. On most mpc8xx boards it is OK as IMMR is set to 0xff00
but for instance on EP88xC board, IMMR is at 0xfa20 which
overlaps with VM ioremap area

This patch fixes the virtual address for remapping IMMR with the fixmap
regardless of the value of IMMR.

The size of IMMR area is 256kbytes (CPM at offset 0, security engine
at offset 128k) so a 512k page is enough

Signed-off-by: Christophe Leroy 
---
v2: no change
v3: Using fixmap instead of fixed address
v4: Fix a wrong #if notified by kbuild robot
v5: no change

 arch/powerpc/include/asm/fixmap.h |  7 +++
 arch/powerpc/kernel/asm-offsets.c |  8 
 arch/powerpc/kernel/head_8xx.S| 11 ++-
 arch/powerpc/mm/mmu_decl.h|  7 +++
 arch/powerpc/sysdev/cpm_common.c  | 15 ---
 5 files changed, 40 insertions(+), 8 deletions(-)

diff --git a/arch/powerpc/include/asm/fixmap.h 
b/arch/powerpc/include/asm/fixmap.h
index 90f604b..d7dd8fb 100644
--- a/arch/powerpc/include/asm/fixmap.h
+++ b/arch/powerpc/include/asm/fixmap.h
@@ -51,6 +51,13 @@ enum fixed_addresses {
FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */
FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1,
 #endif
+#ifdef CONFIG_PPC_8xx
+   /* For IMMR we need an aligned 512K area */
+   FIX_IMMR_START,
+   FIX_IMMR_TOP = (FIX_IMMR_START - 1 + ((512 * 1024) / PAGE_SIZE)) &
+  ~(((512 * 1024) / PAGE_SIZE) - 1),
+   FIX_IMMR_BASE = FIX_IMMR_TOP - 1 + ((512 * 1024) / PAGE_SIZE),
+#endif
/* FIX_PCIE_MCFG, */
__end_of_fixed_addresses
 };
diff --git a/arch/powerpc/kernel/asm-offsets.c 
b/arch/powerpc/kernel/asm-offsets.c
index 07cebc3..9724ff8 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -68,6 +68,10 @@
 #include "../mm/mmu_decl.h"
 #endif
 
+#ifdef CONFIG_PPC_8xx
+#include 
+#endif
+
 int main(void)
 {
DEFINE(THREAD, offsetof(struct task_struct, thread));
@@ -772,5 +776,9 @@ int main(void)
 
DEFINE(PPC_DBELL_SERVER, PPC_DBELL_SERVER);
 
+#ifdef CONFIG_PPC_8xx
+   DEFINE(VIRT_IMMR_BASE, __fix_to_virt(FIX_IMMR_BASE));
+#endif
+
return 0;
 }
diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index 87d1f5f..09173ae 100644
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -30,6 +30,7 @@
 #include 
 #include 
 #include 
+#include 
 
 /* Macro to make the code more readable. */
 #ifdef CONFIG_8xx_CPU6
@@ -763,7 +764,7 @@ start_here:
  * virtual to physical.  Also, set the cache mode since that is defined
  * by TLB entries and perform any additional mapping (like of the IMMR).
  * If configured to pin some TLBs, we pin the first 8 Mbytes of kernel,
- * 24 Mbytes of data, and the 8M IMMR space.  Anything not covered by
+ * 24 Mbytes of data, and the 512k IMMR space.  Anything not covered by
  * these mappings is mapped by page tables.
  */
 initial_mmu:
@@ -812,7 +813,7 @@ initial_mmu:
ori r8, r8, MD_APG_INIT@l
mtspr   SPRN_MD_AP, r8
 
-   /* Map another 8 MByte at the IMMR to get the processor
+   /* Map a 512k page for the IMMR to get the processor
 * internal registers (among other things).
 */
 #ifdef CONFIG_PIN_TLB
@@ -820,12 +821,12 @@ initial_mmu:
mtspr   SPRN_MD_CTR, r10
 #endif
mfspr   r9, 638 /* Get current IMMR */
-   andis.  r9, r9, 0xff80  /* Get 8Mbyte boundary */
+   andis.  r9, r9, 0xfff8  /* Get 512 kbytes boundary */
 
-   mr  r8, r9  /* Create vaddr for TLB */
+   lis r8, VIRT_IMMR_BASE@h/* Create vaddr for TLB */
ori r8, r8, MD_EVALID   /* Mark it valid */
mtspr   SPRN_MD_EPN, r8
-   li  r8, MD_PS8MEG   /* Set 8M byte page */
+   li  r8, MD_PS512K | MD_GUARDED  /* Set 512k byte page */
ori r8, r8, MD_SVALID   /* Make it valid */
mtspr   SPRN_MD_TWC, r8
mr  r8, r9  /* Create paddr for TLB */
diff --git a/arch/powerpc/mm/mmu_decl.h b/arch/powerpc/mm/mmu_decl.h
index 40dd5d3..e7228b7 100644
--- a/arch/powerpc/mm/mmu_decl.h
+++ b/arch/powerpc/mm/mmu_decl.h
@@ -107,6 +107,13 @@ struct hash_pte;
 extern struct hash_pte *Hash, *Hash_end;
 extern unsigned long Hash_size, Hash_mask;
 
+#define PHYS_IMMR_BASE (mfspr(SPRN_IMMR) & 0xfff8)
+#ifdef CONFIG_PPC_8xx
+#define VIRT_IMMR_BASE

[PATCH v5 17/23] powerpc/8xx: rewrite flush_instruction_cache() in C

On PPC8xx, flushing instruction cache is performed by writing
in register SPRN_IC_CST. This registers suffers CPU6 ERRATA.
The patch rewrites the fonction in C so that CPU6 ERRATA will
be handled transparently

Signed-off-by: Christophe Leroy 
---
v2: no change
v3: no change
v4: no change
v5: no change

 arch/powerpc/kernel/misc_32.S | 10 --
 arch/powerpc/mm/8xx_mmu.c |  7 +++
 2 files changed, 11 insertions(+), 6 deletions(-)

diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
index be8edd6..7d1284f 100644
--- a/arch/powerpc/kernel/misc_32.S
+++ b/arch/powerpc/kernel/misc_32.S
@@ -296,12 +296,9 @@ _GLOBAL(real_writeb)
  * Flush instruction cache.
  * This is a no-op on the 601.
  */
+#ifndef CONFIG_PPC_8xx
 _GLOBAL(flush_instruction_cache)
-#if defined(CONFIG_8xx)
-   isync
-   lis r5, IDC_INVALL@h
-   mtspr   SPRN_IC_CST, r5
-#elif defined(CONFIG_4xx)
+#if defined(CONFIG_4xx)
 #ifdef CONFIG_403GCX
li  r3, 512
mtctr   r3
@@ -334,9 +331,10 @@ END_FTR_SECTION_IFSET(CPU_FTR_UNIFIED_ID_CACHE)
mfspr   r3,SPRN_HID0
ori r3,r3,HID0_ICFI
mtspr   SPRN_HID0,r3
-#endif /* CONFIG_8xx/4xx */
+#endif /* CONFIG_4xx */
isync
blr
+#endif /* CONFIG_PPC_8xx */
 
 /*
  * Write any modified data cache blocks out to memory
diff --git a/arch/powerpc/mm/8xx_mmu.c b/arch/powerpc/mm/8xx_mmu.c
index 8701e4d..604af7a 100644
--- a/arch/powerpc/mm/8xx_mmu.c
+++ b/arch/powerpc/mm/8xx_mmu.c
@@ -181,3 +181,10 @@ void set_context(unsigned long id, pgd_t *pgd)
/* sync */
mb();
 }
+
+void flush_instruction_cache(void)
+{
+   isync();
+   mtspr(SPRN_IC_CST, IDC_INVALL);
+   isync();
+}
-- 
2.1.0

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[PATCH v5 23/23] powerpc32: Remove one insn in mulhdu

Remove one instruction in mulhdu

Signed-off-by: Christophe Leroy 
---
v2: new
v3: no change
v4: no change
v5: no change

 arch/powerpc/kernel/misc_32.S | 11 +--
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
index 3ec5a22..bf5160f 100644
--- a/arch/powerpc/kernel/misc_32.S
+++ b/arch/powerpc/kernel/misc_32.S
@@ -91,17 +91,16 @@ _GLOBAL(mulhdu)
addcr7,r0,r7
addze   r4,r4
 1: beqlr   cr1 /* all done if high part of A is 0 */
-   mr  r10,r3
mullw   r9,r3,r5
-   mulhwu  r3,r3,r5
+   mulhwu  r10,r3,r5
beq 2f
-   mullw   r0,r10,r6
-   mulhwu  r8,r10,r6
+   mullw   r0,r3,r6
+   mulhwu  r8,r3,r6
addcr7,r0,r7
adder4,r4,r8
-   addze   r3,r3
+   addze   r10,r10
 2: addcr4,r4,r9
-   addze   r3,r3
+   addze   r3,r10
blr
 
 /*
-- 
2.1.0

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Re: commit 9178ba294b6839eeff1a91bed95515d783f3ee6c an A-Eon Tabor Board

On 2/3/2016 6:59 PM, Alexander Graf wrote:

On 02/03/2016 11:54 PM, Julian Margetson wrote:

On 2/3/2016 6:20 PM, Alexander Graf wrote:

On 02/03/2016 11:15 PM, Julian Margetson wrote:

On 2/3/2016 4:43 PM, Alexander Graf wrote:

On 02/03/2016 10:33 AM, Julian Margetson wrote:
Resending as it was attached to and old thread relating to a
different motherboard.

On 2/2/2016 9:54 AM, Julian Margetson wrote:

Commit 9178ba294b6839eeff1a91bed95515d783f3ee6c prevents
building of kernel 4.1 branch on A-Eon Tabor Board.

CC arch/powerpc/math-emu/fsqrt.o
arch/powerpc/platforms/85xx/tabor.c:194:2: error: unknown field
‘power_off’ specified in initializer

I can't seem to find that file in Linux upstream?

Alex

It may have been discontinued as the patches used were maintained
along with patches for the (Varisys) A-Eon Cyrus board

which is officially supported from kernel 4.4.

https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=c383ee84e1d575b09d167185d15df24bde25eb15

I don't quite understand how an internal API change in Linux
breaking random external patches is a bug? Either your code is
upstream or it can break on every git commit done upstream.

Alex

Sorry I am relatively new at this.
If I manage to pinpoint a problem on my powerpc machines I report it
. Most of them so far have indeed been bugs.
The random external patches were done by person with far greater
competence than me who are no longer in the picture.

Any guidance would be greatly appreciated.

I think the most important step really is to upstream board support,
otherwise things will continue to fall apart for sure.

As for the exact breakage you saw, just remove the line and put a line
like

pm_power_off = tabor_power_off;

in your board probe function in tabor.c.

Alex

Thanks.
I will give it a try.

Julian

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[PATCH 2/6] ibmvscsi: Add and use enums for valid CRQ header values

The PAPR defines four valid header values for the first byte of a
CRQ message. Namely, an unused/empty message (0x00), a valid
command/response entry (0x80), a valid initialization entry (0xC0),
and a transport event (0xFF). Define these values as enums and use
them in the code in place of their magic number equivalents.

Signed-off-by: Tyrel Datwyler 
---
 drivers/scsi/ibmvscsi/ibmvscsi.c | 14 +++---
 drivers/scsi/ibmvscsi/viosrp.h   |  7 +++
 2 files changed, 14 insertions(+), 7 deletions(-)

diff --git a/drivers/scsi/ibmvscsi/ibmvscsi.c b/drivers/scsi/ibmvscsi/ibmvscsi.c
index adfef9d..176260d 100644
--- a/drivers/scsi/ibmvscsi/ibmvscsi.c
+++ b/drivers/scsi/ibmvscsi/ibmvscsi.c
@@ -182,7 +182,7 @@ static struct viosrp_crq *crq_queue_next_crq(struct 
crq_queue *queue)
 
spin_lock_irqsave(>lock, flags);
crq = >msgs[queue->cur];
-   if (crq->valid & 0x80) {
+   if (crq->valid & VIOSRP_CRQ_VALID) {
if (++queue->cur == queue->size)
queue->cur = 0;
 
@@ -231,7 +231,7 @@ static void ibmvscsi_task(void *data)
/* Pull all the valid messages off the CRQ */
while ((crq = crq_queue_next_crq(>queue)) != NULL) {
ibmvscsi_handle_crq(crq, hostdata);
-   crq->valid = 0x00;
+   crq->valid = VIOSRP_CRQ_FREE;
}
 
vio_enable_interrupts(vdev);
@@ -239,7 +239,7 @@ static void ibmvscsi_task(void *data)
if (crq != NULL) {
vio_disable_interrupts(vdev);
ibmvscsi_handle_crq(crq, hostdata);
-   crq->valid = 0x00;
+   crq->valid = VIOSRP_CRQ_FREE;
} else {
done = 1;
}
@@ -474,7 +474,7 @@ static int initialize_event_pool(struct event_pool *pool,
struct srp_event_struct *evt = >events[i];
memset(>crq, 0x00, sizeof(evt->crq));
atomic_set(>free, 1);
-   evt->crq.valid = 0x80;
+   evt->crq.valid = VIOSRP_CRQ_VALID;
evt->crq.IU_length = cpu_to_be16(sizeof(*evt->xfer_iu));
evt->crq.IU_data_ptr = cpu_to_be64(pool->iu_token +
sizeof(*evt->xfer_iu) * i);
@@ -1767,7 +1767,7 @@ static void ibmvscsi_handle_crq(struct viosrp_crq *crq,
struct srp_event_struct *evt_struct =
(__force struct srp_event_struct *)crq->IU_data_ptr;
switch (crq->valid) {
-   case 0xC0:  /* initialization */
+   case VIOSRP_CRQ_INIT:   /* initialization */
switch (crq->format) {
case 0x01:  /* Initialization message */
dev_info(hostdata->dev, "partner initialized\n");
@@ -1791,7 +1791,7 @@ static void ibmvscsi_handle_crq(struct viosrp_crq *crq,
dev_err(hostdata->dev, "unknown crq message type: 
%d\n", crq->format);
}
return;
-   case 0xFF:  /* Hypervisor telling us the connection is closed */
+   case VIOSRP_CRQ_TRANSPORT:  /* Hypervisor telling us the connection 
is closed */
scsi_block_requests(hostdata->host);
atomic_set(>request_limit, 0);
if (crq->format == 0x06) {
@@ -1807,7 +1807,7 @@ static void ibmvscsi_handle_crq(struct viosrp_crq *crq,
ibmvscsi_reset_host(hostdata);
}
return;
-   case 0x80:  /* real payload */
+   case VIOSRP_CRQ_VALID:  /* real payload */
break;
default:
dev_err(hostdata->dev, "got an invalid message type 0x%02x\n",
diff --git a/drivers/scsi/ibmvscsi/viosrp.h b/drivers/scsi/ibmvscsi/viosrp.h
index d1044e9..17f2de0 100644
--- a/drivers/scsi/ibmvscsi/viosrp.h
+++ b/drivers/scsi/ibmvscsi/viosrp.h
@@ -51,6 +51,13 @@ union srp_iu {
u8 reserved[SRP_MAX_IU_LEN];
 };
 
+enum viosrp_crq_headers {
+   VIOSRP_CRQ_FREE = 0x00,
+   VIOSRP_CRQ_VALID = 0x80,
+   VIOSRP_CRQ_INIT = 0xC0,
+   VIOSRP_CRQ_TRANSPORT = 0xFF
+};
+
 enum viosrp_crq_formats {
VIOSRP_SRP_FORMAT = 0x01,
VIOSRP_MAD_FORMAT = 0x02,
-- 
2.5.0

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[PATCH v5 01/23] powerpc/8xx: Save r3 all the time in DTLB miss handler

We are spending between 40 and 160 cycles with a mean of 65 cycles in
the DTLB handling routine (measured with mftbl) so make it more
simple althought it adds one instruction.
With this modification, we get three registers available at all time,
which will help with following patch.

Signed-off-by: Christophe Leroy 
---
v2: no change
v3: no change
v4: no change
v5: no change

 arch/powerpc/kernel/head_8xx.S | 13 -
 1 file changed, 4 insertions(+), 9 deletions(-)

diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index e629e28..a89492e 100644
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -385,23 +385,20 @@ InstructionTLBMiss:
 
. = 0x1200
 DataStoreTLBMiss:
-#ifdef CONFIG_8xx_CPU6
mtspr   SPRN_SPRG_SCRATCH2, r3
-#endif
EXCEPTION_PROLOG_0
-   mfcrr10
+   mfcrr3
 
/* If we are faulting a kernel address, we have to use the
 * kernel page tables.
 */
-   mfspr   r11, SPRN_MD_EPN
-   IS_KERNEL(r11, r11)
+   mfspr   r10, SPRN_MD_EPN
+   IS_KERNEL(r11, r10)
mfspr   r11, SPRN_M_TW  /* Get level 1 table */
BRANCH_UNLESS_KERNEL(3f)
lis r11, (swapper_pg_dir-PAGE_OFFSET)@ha
 3:
-   mtcrr10
-   mfspr   r10, SPRN_MD_EPN
+   mtcrr3
 
/* Insert level 1 index */
rlwimi  r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 
29
@@ -453,9 +450,7 @@ DataStoreTLBMiss:
MTSPR_CPU6(SPRN_MD_RPN, r10, r3)/* Update TLB entry */
 
/* Restore registers */
-#ifdef CONFIG_8xx_CPU6
mfspr   r3, SPRN_SPRG_SCRATCH2
-#endif
mtspr   SPRN_DAR, r11   /* Tag DAR */
EXCEPTION_EPILOG_0
rfi
-- 
2.1.0

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Re: commit 9178ba294b6839eeff1a91bed95515d783f3ee6c an A-Eon Tabor Board

On 2/3/2016 6:20 PM, Alexander Graf wrote:

On 02/03/2016 11:15 PM, Julian Margetson wrote:

On 2/3/2016 4:43 PM, Alexander Graf wrote:

On 02/03/2016 10:33 AM, Julian Margetson wrote:
Resending as it was attached to and old thread relating to a
different motherboard.

On 2/2/2016 9:54 AM, Julian Margetson wrote:

Commit 9178ba294b6839eeff1a91bed95515d783f3ee6c prevents building
of kernel 4.1 branch on A-Eon Tabor Board.

CC arch/powerpc/math-emu/fsqrt.o
arch/powerpc/platforms/85xx/tabor.c:194:2: error: unknown field
‘power_off’ specified in initializer

I can't seem to find that file in Linux upstream?

Alex

It may have been discontinued as the patches used were maintained
along with patches for the (Varisys) A-Eon Cyrus board

which is officially supported from kernel 4.4.

https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=c383ee84e1d575b09d167185d15df24bde25eb15

I don't quite understand how an internal API change in Linux breaking
random external patches is a bug? Either your code is upstream or it
can break on every git commit done upstream.

Alex

Sorry I am relatively new at this.
If I manage to pinpoint a problem on my powerpc machines I report it .
Most of them so far have indeed been bugs.
The random external patches were done by person with far greater
competence than me who are no longer in the picture.

Any guidance would be greatly appreciated .

Julian

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[PATCH v5 16/23] powerpc/8xx: rewrite set_context() in C

There is no real need to have set_context() in assembly.
Now that we have mtspr() handling CPU6 ERRATA directly, we
can rewrite set_context() in C language for easier maintenance.

Signed-off-by: Christophe Leroy 
---
v2: no change
v3: no change
v4: no change
v5: no change

 arch/powerpc/kernel/head_8xx.S | 44 --
 arch/powerpc/mm/8xx_mmu.c  | 34 
 2 files changed, 34 insertions(+), 44 deletions(-)

diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index 637f8e9..bb2b657 100644
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -968,50 +968,6 @@ initial_mmu:
 
 
 /*
- * Set up to use a given MMU context.
- * r3 is context number, r4 is PGD pointer.
- *
- * We place the physical address of the new task page directory loaded
- * into the MMU base register, and set the ASID compare register with
- * the new "context."
- */
-_GLOBAL(set_context)
-
-#ifdef CONFIG_BDI_SWITCH
-   /* Context switch the PTE pointer for the Abatron BDI2000.
-* The PGDIR is passed as second argument.
-*/
-   lis r5, KERNELBASE@h
-   lwz r5, 0xf0(r5)
-   stw r4, 0x4(r5)
-#endif
-
-   /* Register M_TW will contain base address of level 1 table minus the
-* lower part of the kernel PGDIR base address, so that all accesses to
-* level 1 table are done relative to lower part of kernel PGDIR base
-* address.
-*/
-   li  r5, (swapper_pg_dir-PAGE_OFFSET)@l
-   sub r4, r4, r5
-   tophys  (r4, r4)
-#ifdef CONFIG_8xx_CPU6
-   lis r6, cpu6_errata_word@h
-   ori r6, r6, cpu6_errata_word@l
-   li  r7, 0x3f80
-   stw r7, 12(r6)
-   lwz r7, 12(r6)
-#endif
-   mtspr   SPRN_M_TW, r4   /* Update pointeur to level 1 table */
-#ifdef CONFIG_8xx_CPU6
-   li  r7, 0x3380
-   stw r7, 12(r6)
-   lwz r7, 12(r6)
-#endif
-   mtspr   SPRN_M_CASID, r3/* Update context */
-   SYNC
-   blr
-
-/*
  * We put a few things here that have to be page-aligned.
  * This stuff goes at the beginning of the data segment,
  * which is page-aligned.
diff --git a/arch/powerpc/mm/8xx_mmu.c b/arch/powerpc/mm/8xx_mmu.c
index 6965575..8701e4d 100644
--- a/arch/powerpc/mm/8xx_mmu.c
+++ b/arch/powerpc/mm/8xx_mmu.c
@@ -147,3 +147,37 @@ void setup_initial_memory_limit(phys_addr_t 
first_memblock_base,
memblock_set_current_limit(min_t(u64, first_memblock_size,
 initial_memory_size));
 }
+
+/*
+ * Set up to use a given MMU context.
+ * id is context number, pgd is PGD pointer.
+ *
+ * We place the physical address of the new task page directory loaded
+ * into the MMU base register, and set the ASID compare register with
+ * the new "context."
+ */
+void set_context(unsigned long id, pgd_t *pgd)
+{
+   s16 offset = (s16)(__pa(swapper_pg_dir));
+
+#ifdef CONFIG_BDI_SWITCH
+   pgd_t   **ptr = *(pgd_t ***)(KERNELBASE + 0xf0);
+
+   /* Context switch the PTE pointer for the Abatron BDI2000.
+* The PGDIR is passed as second argument.
+*/
+   *(ptr + 1) = pgd;
+#endif
+
+   /* Register M_TW will contain base address of level 1 table minus the
+* lower part of the kernel PGDIR base address, so that all accesses to
+* level 1 table are done relative to lower part of kernel PGDIR base
+* address.
+*/
+   mtspr(SPRN_M_TW, __pa(pgd) - offset);
+
+   /* Update context */
+   mtspr(SPRN_M_CASID, id);
+   /* sync */
+   mb();
+}
-- 
2.1.0

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[PATCH v5 22/23] powerpc32: small optimisation in flush_icache_range()

Inlining of _dcache_range() functions has shown that the compiler
does the same thing a bit better with one insn less

Signed-off-by: Christophe Leroy 
---
v2: new
v3: no change
v4: no change
v5: no change

 arch/powerpc/kernel/misc_32.S | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
index 09e1e5d..3ec5a22 100644
--- a/arch/powerpc/kernel/misc_32.S
+++ b/arch/powerpc/kernel/misc_32.S
@@ -348,10 +348,9 @@ BEGIN_FTR_SECTION
PURGE_PREFETCHED_INS
blr /* for 601, do nothing */
 END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)
-   li  r5,L1_CACHE_BYTES-1
-   andcr3,r3,r5
+   rlwinm  r3,r3,0,0,31 - L1_CACHE_SHIFT
subfr4,r3,r4
-   add r4,r4,r5
+   addir4,r4,L1_CACHE_BYTES - 1
srwi.   r4,r4,L1_CACHE_SHIFT
beqlr
mtctr   r4
-- 
2.1.0

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Re: [PATCH] powerpc/fsl-pci: Correct the comparison of the LTSSM

2016-02-03 Thread Edward L Swarthout

From: Scott Wood:
>On Mon, 2016-02-01 at 03:57 +, Zhiqiang Hou wrote:
>> Any comments?
>
> Only that it was submitted too late for the last merge window, and I have not
> yet begun processing patches for the next one.  If you meant this to be a fix
> important enough to go in outside the merge window, it's missing any statement
> of what the actual symptoms are.
>
> > -Original Message-
> > From: Zhiqiang Hou [mailto:zhiqiang@freescale.com]
> > To: linuxppc-dev@lists.ozlabs.org; b...@kernel.crashing.org;
> > Subject: [PATCH] powerpc/fsl-pci: Correct the comparison of the LTSSM
> >
> > Only the value PCIE_LTSSM_L0 stands for the link is up, instead of >=
> > PCIE_LTSSM_L0.
> >
> > diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
> > @@ -73,7 +73,7 @@ static int fsl_pcie_check_link(struct pci_controller
> > early_read_config_dword(hose, 0, 0, PCIE_LTSSM,
> > -   if (val < PCIE_LTSSM_L0)
> > +   if (val != PCIE_LTSSM_L0)
> > return 1;

This patch is incorrect as there are actually two states L0 and L0s (standby) 
that indicate an active link (a LTSSM value of 0x11 or  0x12).

The next user manual revision should contain this detail.

Ed
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[PATCH 4/6] ibmvscsi: Use of_root to access OF device tree root node

The root node of the OF device tree is exported as of_root. No need
to look up the root by path name. Instead just get a reference
directly via of_root.

Signed-off-by: Tyrel Datwyler 
---
 drivers/scsi/ibmvscsi/ibmvscsi.c | 14 ++
 1 file changed, 6 insertions(+), 8 deletions(-)

diff --git a/drivers/scsi/ibmvscsi/ibmvscsi.c b/drivers/scsi/ibmvscsi/ibmvscsi.c
index 7e51615..47cfe33 100644
--- a/drivers/scsi/ibmvscsi/ibmvscsi.c
+++ b/drivers/scsi/ibmvscsi/ibmvscsi.c
@@ -248,25 +248,23 @@ static void ibmvscsi_task(void *data)
 
 static void gather_partition_info(void)
 {
-   struct device_node *rootdn;
-
const char *ppartition_name;
const __be32 *p_number_ptr;
 
/* Retrieve information about this partition */
-   rootdn = of_find_node_by_path("/");
-   if (!rootdn) {
+   if (!of_root)
return;
-   }
 
-   ppartition_name = of_get_property(rootdn, "ibm,partition-name", NULL);
+   of_node_get(of_root);
+
+   ppartition_name = of_get_property(of_root, "ibm,partition-name", NULL);
if (ppartition_name)
strncpy(partition_name, ppartition_name,
sizeof(partition_name));
-   p_number_ptr = of_get_property(rootdn, "ibm,partition-no", NULL);
+   p_number_ptr = of_get_property(of_root, "ibm,partition-no", NULL);
if (p_number_ptr)
partition_number = of_read_number(p_number_ptr, 1);
-   of_node_put(rootdn);
+   of_node_put(of_root);
 }
 
 static void set_adapter_info(struct ibmvscsi_host_data *hostdata)
-- 
2.5.0

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[PATCH v5 02/23] powerpc/8xx: Map linear kernel RAM with 8M pages

On a live running system (VoIP gateway for Air Trafic Control), over
a 10 minutes period (with 277s idle), we get 87 millions DTLB misses
and approximatly 35 secondes are spent in DTLB handler.
This represents 5.8% of the overall time and even 10.8% of the
non-idle time.
Among those 87 millions DTLB misses, 15% are on user addresses and
85% are on kernel addresses. And within the kernel addresses, 93%
are on addresses from the linear address space and only 7% are on
addresses from the virtual address space.

MPC8xx has no BATs but it has 8Mb page size. This patch implements
mapping of kernel RAM using 8Mb pages, on the same model as what is
done on the 40x.

In 4k pages mode, each PGD entry maps a 4Mb area: we map every two
entries to the same 8Mb physical page. In each second entry, we add
4Mb to the page physical address to ease life of the FixupDAR
routine. This is just ignored by HW.

In 16k pages mode, each PGD entry maps a 64Mb area: each PGD entry
will point to the first page of the area. The DTLB handler adds
the 3 bits from EPN to map the correct page.

With this patch applied, we now get only 13 millions TLB misses
during the 10 minutes period. The idle time has increased to 313s
and the overall time spent in DTLB miss handler is 6.3s, which
represents 1% of the overall time and 2.2% of non-idle time.

Signed-off-by: Christophe Leroy 
---
v2: using bt instead of bgt and named the label explicitly
v3: no change
v4: no change
v5: removed use of pmd_val() as L-value

 arch/powerpc/kernel/head_8xx.S | 35 +-
 arch/powerpc/mm/8xx_mmu.c  | 83 ++
 arch/powerpc/mm/Makefile   |  1 +
 arch/powerpc/mm/mmu_decl.h | 15 ++--
 4 files changed, 120 insertions(+), 14 deletions(-)
 create mode 100644 arch/powerpc/mm/8xx_mmu.c

diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index a89492e..87d1f5f 100644
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -398,11 +398,13 @@ DataStoreTLBMiss:
BRANCH_UNLESS_KERNEL(3f)
lis r11, (swapper_pg_dir-PAGE_OFFSET)@ha
 3:
-   mtcrr3
 
/* Insert level 1 index */
rlwimi  r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 
29
lwz r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11)/* Get the 
level 1 entry */
+   mtcrr11
+   bt- 28,DTLBMiss8M   /* bit 28 = Large page (8M) */
+   mtcrr3
 
/* We have a pte table, so load fetch the pte from the table.
 */
@@ -455,6 +457,29 @@ DataStoreTLBMiss:
EXCEPTION_EPILOG_0
rfi
 
+DTLBMiss8M:
+   mtcrr3
+   ori r11, r11, MD_SVALID
+   MTSPR_CPU6(SPRN_MD_TWC, r11, r3)
+#ifdef CONFIG_PPC_16K_PAGES
+   /*
+* In 16k pages mode, each PGD entry defines a 64M block.
+* Here we select the 8M page within the block.
+*/
+   rlwimi  r11, r10, 0, 0x0380
+#endif
+   rlwinm  r10, r11, 0, 0xff80
+   ori r10, r10, 0xf0 | MD_SPS16K | _PAGE_SHARED | _PAGE_DIRTY | \
+ _PAGE_PRESENT
+   MTSPR_CPU6(SPRN_MD_RPN, r10, r3)/* Update TLB entry */
+
+   li  r11, RPN_PATTERN
+   mfspr   r3, SPRN_SPRG_SCRATCH2
+   mtspr   SPRN_DAR, r11   /* Tag DAR */
+   EXCEPTION_EPILOG_0
+   rfi
+
+
 /* This is an instruction TLB error on the MPC8xx.  This could be due
  * to many reasons, such as executing guarded memory or illegal instruction
  * addresses.  There is nothing to do but handle a big time error fault.
@@ -532,13 +557,15 @@ FixupDAR:/* Entry point for dcbx workaround. */
/* Insert level 1 index */
 3: rlwimi  r11, r10, 32 - ((PAGE_SHIFT - 2) << 1), (PAGE_SHIFT - 2) << 1, 
29
lwz r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11)/* Get the 
level 1 entry */
+   mtcrr11
+   bt  28,200f /* bit 28 = Large page (8M) */
rlwinm  r11, r11,0,0,19 /* Extract page descriptor page address */
/* Insert level 2 index */
rlwimi  r11, r10, 32 - (PAGE_SHIFT - 2), 32 - PAGE_SHIFT, 29
lwz r11, 0(r11) /* Get the pte */
/* concat physical page address(r11) and page offset(r10) */
rlwimi  r11, r10, 0, 32 - PAGE_SHIFT, 31
-   lwz r11,0(r11)
+201:   lwz r11,0(r11)
 /* Check if it really is a dcbx instruction. */
 /* dcbt and dcbtst does not generate DTLB Misses/Errors,
  * no need to include them here */
@@ -557,6 +584,10 @@ FixupDAR:/* Entry point for dcbx workaround. */
 141:   mfspr   r10,SPRN_SPRG_SCRATCH2
b   DARFixed/* Nope, go back to normal TLB processing */
 
+   /* concat physical page address(r11) and page offset(r10) */
+200:   rlwimi  r11, r10, 0, 32 - (PAGE_SHIFT << 1), 31
+   b   201b
+
 144:   mfspr   r10, SPRN_DSISR
rlwinm  r10, r10,0,7,5  /* Clear store bit for buggy dcbst insn */
mtspr   SPRN_DSISR, r10
diff --git

[PATCH v5 10/23] powerpc/8xx: map more RAM at startup when needed

On recent kernels, with some debug options like for instance
CONFIG_LOCKDEP, the BSS requires more than 8M memory, allthough
the kernel code fits in the first 8M.
Today, it is necessary to activate CONFIG_PIN_TLB to get more than 8M
at startup, allthough pinning TLB is not necessary for that.

This patch adds more pages (up to 24Mb) to the initial mapping if
possible/needed in order to have the necessary mappings regardless of
CONFIG_PIN_TLB.

We could have mapped 16M or 24M inconditionnally but since some
platforms only have 8M memory, we need something a bit more elaborated

Therefore, if the bootloader is compliant with ePAPR standard, we use
r7 to know how much memory was mapped by the bootloader.
Otherwise, we try to determine the required memory size by looking at
the _end symbol and the address of the device tree.

This patch does not modify the behaviour when CONFIG_PIN_TLB is
selected.

Signed-off-by: Christophe Leroy 
---
v2: no change
v3: Automatic detection of available/needed memory instead of allocating 16M 
for all.
v4: no change
v5: no change

 arch/powerpc/kernel/head_8xx.S | 56 +++---
 arch/powerpc/mm/8xx_mmu.c  | 10 +++-
 2 files changed, 56 insertions(+), 10 deletions(-)

diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index ae721a1..a268cf4 100644
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -72,6 +72,9 @@
 #define RPN_PATTERN0x00f0
 #endif
 
+/* ePAPR magic value for non BOOK III-E CPUs */
+#define EPAPR_SMAGIC   0x65504150
+
__HEAD
 _ENTRY(_stext);
 _ENTRY(_start);
@@ -101,6 +104,38 @@ _ENTRY(_start);
  */
.globl  __start
 __start:
+/*
+ * Determine initial RAM size
+ *
+ * If the Bootloader is ePAPR compliant, the size is given in r7
+ * otherwise, we have to determine how much is needed. For that, we have to
+ * check whether _end of kernel and device tree are within the first 8Mb.
+ */
+   lis r30, 0x0080@h   /* 8Mb by default */
+
+   lis r8, EPAPR_SMAGIC@h
+   ori r8, r8, EPAPR_SMAGIC@l
+   cmplw   cr0, r8, r6
+   bne 1f
+   lis r30, 0x0180@h   /* 24Mb max */
+   cmplw   cr0, r7, r30
+   bgt 2f
+   mr  r30, r7 /* save initial ram size */
+   b   2f
+1:
+   /* is kernel _end or DTB in the first 8M ? if not map 16M */
+   lis r8, (_end - PAGE_OFFSET)@h
+   ori r8, r8, (_end - PAGE_OFFSET)@l
+   addir8, r8, -1
+   or  r8, r8, r3
+   cmplw   cr0, r8, r30
+   blt 2f
+   lis r30, 0x0100@h   /* 16Mb */
+   /* is kernel _end or DTB in the first 16M ? if not map 24M */
+   cmplw   cr0, r8, r30
+   blt 2f
+   lis r30, 0x0180@h   /* 24Mb */
+2:
mr  r31,r3  /* save device tree ptr */
 
/* We have to turn on the MMU right away so we get cache modes
@@ -737,6 +772,8 @@ start_here:
 /*
  * Decide what sort of machine this is and initialize the MMU.
  */
+   lis r3, initial_memory_size@ha
+   stw r30, initial_memory_size@l(r3)
li  r3,0
mr  r4,r31
bl  machine_init
@@ -868,10 +905,15 @@ initial_mmu:
mtspr   SPRN_MD_RPN, r8
 
 #ifdef CONFIG_PIN_TLB
-   /* Map two more 8M kernel data pages.
-   */
+   /* Map one more 8M kernel data page. */
addir10, r10, 0x0100
mtspr   SPRN_MD_CTR, r10
+#else
+   /* Map one more 8M kernel data page if needed */
+   lis r10, 0x0080@h
+   cmplw   cr0, r30, r10
+   ble 1f
+#endif
 
lis r8, KERNELBASE@h/* Create vaddr for TLB */
addis   r8, r8, 0x0080  /* Add 8M */
@@ -884,20 +926,28 @@ initial_mmu:
addis   r11, r11, 0x0080/* Add 8M */
mtspr   SPRN_MD_RPN, r11
 
+#ifdef CONFIG_PIN_TLB
+   /* Map one more 8M kernel data page. */
addir10, r10, 0x0100
mtspr   SPRN_MD_CTR, r10
+#else
+   /* Map one more 8M kernel data page if needed */
+   lis r10, 0x0100@h
+   cmplw   cr0, r30, r10
+   ble 1f
+#endif
 
addis   r8, r8, 0x0080  /* Add 8M */
mtspr   SPRN_MD_EPN, r8
mtspr   SPRN_MD_TWC, r9
addis   r11, r11, 0x0080/* Add 8M */
mtspr   SPRN_MD_RPN, r11
-#endif
 
/* Since the cache is enabled according to the information we
 * just loaded into the TLB, invalidate and enable the caches here.
 * We should probably check/set other modeslater.
 */
+1:
lis r8, IDC_INVALL@h
mtspr   SPRN_IC_CST, r8
mtspr   SPRN_DC_CST, r8
diff --git a/arch/powerpc/mm/8xx_mmu.c b/arch/powerpc/mm/8xx_mmu.c
index 4de93b2..6965575 100644
--- a/arch/powerpc/mm/8xx_mmu.c
+++ b/arch/powerpc/mm/8xx_mmu.c
@@ -20,6 +20,7 @@
 #define IMMR_SIZE (__fix_to_virt(FIX_IMMR_TOP) + PAGE_SIZE -

[PATCH v5 11/23] powerpc32: Remove useless/wrong MMU:setio progress message

Commit 771168494719 ("[POWERPC] Remove unused machine call outs")
removed the call to setup_io_mappings(), so remove the associated
progress line message

Signed-off-by: Christophe Leroy 
---
v2: no change
v3: no change
v4: no change
v5: no change

 arch/powerpc/mm/init_32.c | 4 
 1 file changed, 4 deletions(-)

diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
index 1a18e4b..4eb1b8f 100644
--- a/arch/powerpc/mm/init_32.c
+++ b/arch/powerpc/mm/init_32.c
@@ -178,10 +178,6 @@ void __init MMU_init(void)
/* Initialize early top-down ioremap allocator */
ioremap_bot = IOREMAP_TOP;
 
-   /* Map in I/O resources */
-   if (ppc_md.progress)
-   ppc_md.progress("MMU:setio", 0x302);
-
if (ppc_md.progress)
ppc_md.progress("MMU:exit", 0x211);
 
-- 
2.1.0

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[PATCH v5 13/23] powerpc/8xx: Add missing SPRN defines into reg_8xx.h

Add missing SPRN defines into reg_8xx.h
Some of them are defined in mmu-8xx.h, so we include mmu-8xx.h in
reg_8xx.h, for that we remove references to PAGE_SHIFT in mmu-8xx.h
to have it self sufficient, as includers of reg_8xx.h don't all
include asm/page.h

Signed-off-by: Christophe Leroy 
---
v2: no change
v3: We just add missing ones, don't move anymore the ones from mmu-8xx.h
v4: no change
v5: no change

 arch/powerpc/include/asm/mmu-8xx.h |  4 ++--
 arch/powerpc/include/asm/reg_8xx.h | 11 +++
 2 files changed, 13 insertions(+), 2 deletions(-)

diff --git a/arch/powerpc/include/asm/mmu-8xx.h 
b/arch/powerpc/include/asm/mmu-8xx.h
index f05500a..0a566f1 100644
--- a/arch/powerpc/include/asm/mmu-8xx.h
+++ b/arch/powerpc/include/asm/mmu-8xx.h
@@ -171,9 +171,9 @@ typedef struct {
 } mm_context_t;
 #endif /* !__ASSEMBLY__ */
 
-#if (PAGE_SHIFT == 12)
+#if defined(CONFIG_PPC_4K_PAGES)
 #define mmu_virtual_psize  MMU_PAGE_4K
-#elif (PAGE_SHIFT == 14)
+#elif defined(CONFIG_PPC_16K_PAGES)
 #define mmu_virtual_psize  MMU_PAGE_16K
 #else
 #error "Unsupported PAGE_SIZE"
diff --git a/arch/powerpc/include/asm/reg_8xx.h 
b/arch/powerpc/include/asm/reg_8xx.h
index e8ea346..0f71c81 100644
--- a/arch/powerpc/include/asm/reg_8xx.h
+++ b/arch/powerpc/include/asm/reg_8xx.h
@@ -4,6 +4,8 @@
 #ifndef _ASM_POWERPC_REG_8xx_H
 #define _ASM_POWERPC_REG_8xx_H
 
+#include 
+
 /* Cache control on the MPC8xx is provided through some additional
  * special purpose registers.
  */
@@ -14,6 +16,15 @@
 #define SPRN_DC_ADR569 /* Address needed for some commands */
 #define SPRN_DC_DAT570 /* Read-only data register */
 
+/* Misc Debug */
+#define SPRN_DPDR  630
+#define SPRN_MI_CAM816
+#define SPRN_MI_RAM0   817
+#define SPRN_MI_RAM1   818
+#define SPRN_MD_CAM824
+#define SPRN_MD_RAM0   825
+#define SPRN_MD_RAM1   826
+
 /* Commands.  Only the first few are available to the instruction cache.
 */
 #defineIDC_ENABLE  0x0200  /* Cache enable */
-- 
2.1.0

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[PATCH v5 15/23] powerpc/8xx: remove special handling of CPU6 errata in set_dec()

CPU6 ERRATA is now handled directly in mtspr(), so we can use the
standard set_dec() fonction in all cases.

Signed-off-by: Christophe Leroy 
---
v2: no change
v3: no change
v4: no change
v5: no change

 arch/powerpc/include/asm/time.h |  6 +-
 arch/powerpc/kernel/head_8xx.S  | 18 --
 2 files changed, 1 insertion(+), 23 deletions(-)

diff --git a/arch/powerpc/include/asm/time.h b/arch/powerpc/include/asm/time.h
index 2d7109a..1092fdd 100644
--- a/arch/powerpc/include/asm/time.h
+++ b/arch/powerpc/include/asm/time.h
@@ -31,8 +31,6 @@ extern void tick_broadcast_ipi_handler(void);
 
 extern void generic_calibrate_decr(void);
 
-extern void set_dec_cpu6(unsigned int val);
-
 /* Some sane defaults: 125 MHz timebase, 1GHz processor */
 extern unsigned long ppc_proc_freq;
 #define DEFAULT_PROC_FREQ  (DEFAULT_TB_FREQ * 8)
@@ -166,14 +164,12 @@ static inline void set_dec(int val)
 {
 #if defined(CONFIG_40x)
mtspr(SPRN_PIT, val);
-#elif defined(CONFIG_8xx_CPU6)
-   set_dec_cpu6(val - 1);
 #else
 #ifndef CONFIG_BOOKE
--val;
 #endif
mtspr(SPRN_DEC, val);
-#endif /* not 40x or 8xx_CPU6 */
+#endif /* not 40x */
 }
 
 static inline unsigned long tb_ticks_since(unsigned long tstamp)
diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index a268cf4..637f8e9 100644
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -1011,24 +1011,6 @@ _GLOBAL(set_context)
SYNC
blr
 
-#ifdef CONFIG_8xx_CPU6
-/* It's here because it is unique to the 8xx.
- * It is important we get called with interrupts disabled.  I used to
- * do that, but it appears that all code that calls this already had
- * interrupt disabled.
- */
-   .globl  set_dec_cpu6
-set_dec_cpu6:
-   lis r7, cpu6_errata_word@h
-   ori r7, r7, cpu6_errata_word@l
-   li  r4, 0x2c00
-   stw r4, 8(r7)
-   lwz r4, 8(r7)
-mtspr   22, r3 /* Update Decrementer */
-   SYNC
-   blr
-#endif
-
 /*
  * We put a few things here that have to be page-aligned.
  * This stuff goes at the beginning of the data segment,
-- 
2.1.0

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[PATCH v5 20/23] powerpc32: move xxxxx_dcache_range() functions inline

flush/clean/invalidate _dcache_range() functions are all very
similar and are quite short. They are mainly used in __dma_sync()
perf_event locate them in the top 3 consumming functions during
heavy ethernet activity

They are good candidate for inlining, as __dma_sync() does
almost nothing but calling them

Signed-off-by: Christophe Leroy 
---
v2: new
v3: no change
v4: no change
v5: no change

 arch/powerpc/include/asm/cacheflush.h | 52 ++--
 arch/powerpc/kernel/misc_32.S | 65 ---
 arch/powerpc/kernel/ppc_ksyms.c   |  2 ++
 3 files changed, 51 insertions(+), 68 deletions(-)

diff --git a/arch/powerpc/include/asm/cacheflush.h 
b/arch/powerpc/include/asm/cacheflush.h
index 6229e6b..97c9978 100644
--- a/arch/powerpc/include/asm/cacheflush.h
+++ b/arch/powerpc/include/asm/cacheflush.h
@@ -47,12 +47,58 @@ static inline void __flush_dcache_icache_phys(unsigned long 
physaddr)
 }
 #endif
 
-extern void flush_dcache_range(unsigned long start, unsigned long stop);
 #ifdef CONFIG_PPC32
-extern void clean_dcache_range(unsigned long start, unsigned long stop);
-extern void invalidate_dcache_range(unsigned long start, unsigned long stop);
+/*
+ * Write any modified data cache blocks out to memory and invalidate them.
+ * Does not invalidate the corresponding instruction cache blocks.
+ */
+static inline void flush_dcache_range(unsigned long start, unsigned long stop)
+{
+   void *addr = (void *)(start & ~(L1_CACHE_BYTES - 1));
+   unsigned long size = stop - (unsigned long)addr + (L1_CACHE_BYTES - 1);
+   unsigned long i;
+
+   for (i = 0; i < size >> L1_CACHE_SHIFT; i++, addr += L1_CACHE_BYTES)
+   dcbf(addr);
+   mb();   /* sync */
+}
+
+/*
+ * Write any modified data cache blocks out to memory.
+ * Does not invalidate the corresponding cache lines (especially for
+ * any corresponding instruction cache).
+ */
+static inline void clean_dcache_range(unsigned long start, unsigned long stop)
+{
+   void *addr = (void *)(start & ~(L1_CACHE_BYTES - 1));
+   unsigned long size = stop - (unsigned long)addr + (L1_CACHE_BYTES - 1);
+   unsigned long i;
+
+   for (i = 0; i < size >> L1_CACHE_SHIFT; i++, addr += L1_CACHE_BYTES)
+   dcbst(addr);
+   mb();   /* sync */
+}
+
+/*
+ * Like above, but invalidate the D-cache.  This is used by the 8xx
+ * to invalidate the cache so the PPC core doesn't get stale data
+ * from the CPM (no cache snooping here :-).
+ */
+static inline void invalidate_dcache_range(unsigned long start,
+  unsigned long stop)
+{
+   void *addr = (void *)(start & ~(L1_CACHE_BYTES - 1));
+   unsigned long size = stop - (unsigned long)addr + (L1_CACHE_BYTES - 1);
+   unsigned long i;
+
+   for (i = 0; i < size >> L1_CACHE_SHIFT; i++, addr += L1_CACHE_BYTES)
+   dcbi(addr);
+   mb();   /* sync */
+}
+
 #endif /* CONFIG_PPC32 */
 #ifdef CONFIG_PPC64
+extern void flush_dcache_range(unsigned long start, unsigned long stop);
 extern void flush_inval_dcache_range(unsigned long start, unsigned long stop);
 extern void flush_dcache_phys_range(unsigned long start, unsigned long stop);
 #endif
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
index 181afc1..09e1e5d 100644
--- a/arch/powerpc/kernel/misc_32.S
+++ b/arch/powerpc/kernel/misc_32.S
@@ -375,71 +375,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)
isync
blr
 /*
- * Write any modified data cache blocks out to memory.
- * Does not invalidate the corresponding cache lines (especially for
- * any corresponding instruction cache).
- *
- * clean_dcache_range(unsigned long start, unsigned long stop)
- */
-_GLOBAL(clean_dcache_range)
-   li  r5,L1_CACHE_BYTES-1
-   andcr3,r3,r5
-   subfr4,r3,r4
-   add r4,r4,r5
-   srwi.   r4,r4,L1_CACHE_SHIFT
-   beqlr
-   mtctr   r4
-
-1: dcbst   0,r3
-   addir3,r3,L1_CACHE_BYTES
-   bdnz1b
-   sync/* wait for dcbst's to get to ram */
-   blr
-
-/*
- * Write any modified data cache blocks out to memory and invalidate them.
- * Does not invalidate the corresponding instruction cache blocks.
- *
- * flush_dcache_range(unsigned long start, unsigned long stop)
- */
-_GLOBAL(flush_dcache_range)
-   li  r5,L1_CACHE_BYTES-1
-   andcr3,r3,r5
-   subfr4,r3,r4
-   add r4,r4,r5
-   srwi.   r4,r4,L1_CACHE_SHIFT
-   beqlr
-   mtctr   r4
-
-1: dcbf0,r3
-   addir3,r3,L1_CACHE_BYTES
-   bdnz1b
-   sync/* wait for dcbst's to get to ram */
-   blr
-
-/*
- * Like above, but invalidate the D-cache.  This is used by the 8xx
- * to invalidate the cache so the PPC core doesn't get stale data
- * from the CPM (no cache snooping here :-).
- *
- * invalidate_dcache_range(unsigned long start,

[PATCH 5/6] ibmvscsi: Remove unsupported host config MAD and sysfs interface

A VIOSRP_HOST_CONFIG_TYPE management datagram (MAD) has existed in
the code for some time. From what information I've gathered from
Brian King this was likely implemented on the host side in a SLES 9
based VIOS, which is no longer supported anywhere. Further, it is
not defined in PAPR or supported by any AIX based VIOS.

Treating as bit rot and removing the sysfs interface and associated
host config code accordingly.

Signed-off-by: Tyrel Datwyler 
---
 drivers/scsi/ibmvscsi/ibmvscsi.c | 78 
 drivers/scsi/ibmvscsi/viosrp.h   |  7 
 2 files changed, 85 deletions(-)

diff --git a/drivers/scsi/ibmvscsi/ibmvscsi.c b/drivers/scsi/ibmvscsi/ibmvscsi.c
index 47cfe33..a2b8db1 100644
--- a/drivers/scsi/ibmvscsi/ibmvscsi.c
+++ b/drivers/scsi/ibmvscsi/ibmvscsi.c
@@ -1853,62 +1853,6 @@ static void ibmvscsi_handle_crq(struct viosrp_crq *crq,
 }
 
 /**
- * ibmvscsi_get_host_config: Send the command to the server to get host
- * configuration data.  The data is opaque to us.
- */
-static int ibmvscsi_do_host_config(struct ibmvscsi_host_data *hostdata,
-  unsigned char *buffer, int length)
-{
-   struct viosrp_host_config *host_config;
-   struct srp_event_struct *evt_struct;
-   unsigned long flags;
-   dma_addr_t addr;
-   int rc;
-
-   evt_struct = get_event_struct(>pool);
-   if (!evt_struct) {
-   dev_err(hostdata->dev, "couldn't allocate event for 
HOST_CONFIG!\n");
-   return -1;
-   }
-
-   init_event_struct(evt_struct,
- sync_completion,
- VIOSRP_MAD_FORMAT,
- info_timeout);
-
-   host_config = _struct->iu.mad.host_config;
-
-   /* The transport length field is only 16-bit */
-   length = min(0x, length);
-
-   /* Set up a lun reset SRP command */
-   memset(host_config, 0x00, sizeof(*host_config));
-   host_config->common.type = cpu_to_be32(VIOSRP_HOST_CONFIG_TYPE);
-   host_config->common.length = cpu_to_be16(length);
-   addr = dma_map_single(hostdata->dev, buffer, length, DMA_BIDIRECTIONAL);
-
-   if (dma_mapping_error(hostdata->dev, addr)) {
-   if (!firmware_has_feature(FW_FEATURE_CMO))
-   dev_err(hostdata->dev,
-   "dma_mapping error getting host config\n");
-   free_event_struct(>pool, evt_struct);
-   return -1;
-   }
-
-   host_config->buffer = cpu_to_be64(addr);
-
-   init_completion(_struct->comp);
-   spin_lock_irqsave(hostdata->host->host_lock, flags);
-   rc = ibmvscsi_send_srp_event(evt_struct, hostdata, info_timeout * 2);
-   spin_unlock_irqrestore(hostdata->host->host_lock, flags);
-   if (rc == 0)
-   wait_for_completion(_struct->comp);
-   dma_unmap_single(hostdata->dev, addr, length, DMA_BIDIRECTIONAL);
-
-   return rc;
-}
-
-/**
  * ibmvscsi_slave_configure: Set the "allow_restart" flag for each disk.
  * @sdev:  struct scsi_device device to configure
  *
@@ -2090,27 +2034,6 @@ static struct device_attribute ibmvscsi_host_os_type = {
.show = show_host_os_type,
 };
 
-static ssize_t show_host_config(struct device *dev,
-   struct device_attribute *attr, char *buf)
-{
-   struct Scsi_Host *shost = class_to_shost(dev);
-   struct ibmvscsi_host_data *hostdata = shost_priv(shost);
-
-   /* returns null-terminated host config data */
-   if (ibmvscsi_do_host_config(hostdata, buf, PAGE_SIZE) == 0)
-   return strlen(buf);
-   else
-   return 0;
-}
-
-static struct device_attribute ibmvscsi_host_config = {
-   .attr = {
-.name = "config",
-.mode = S_IRUGO,
-},
-   .show = show_host_config,
-};
-
 static struct device_attribute *ibmvscsi_attrs[] = {
_host_vhost_loc,
_host_vhost_name,
@@ -2119,7 +2042,6 @@ static struct device_attribute *ibmvscsi_attrs[] = {
_host_partition_number,
_host_mad_version,
_host_os_type,
-   _host_config,
NULL
 };
 
diff --git a/drivers/scsi/ibmvscsi/viosrp.h b/drivers/scsi/ibmvscsi/viosrp.h
index da9bb29..04bae63 100644
--- a/drivers/scsi/ibmvscsi/viosrp.h
+++ b/drivers/scsi/ibmvscsi/viosrp.h
@@ -96,7 +96,6 @@ enum viosrp_mad_types {
VIOSRP_EMPTY_IU_TYPE = 0x01,
VIOSRP_ERROR_LOG_TYPE = 0x02,
VIOSRP_ADAPTER_INFO_TYPE = 0x03,
-   VIOSRP_HOST_CONFIG_TYPE = 0x04,
VIOSRP_CAPABILITIES_TYPE = 0x05,
VIOSRP_ENABLE_FAST_FAIL = 0x08,
 };
@@ -162,11 +161,6 @@ struct viosrp_adapter_info {
__be64 buffer;
 };
 
-struct viosrp_host_config {
-   struct mad_common common;
-   __be64 buffer;
-};
-
 struct viosrp_fast_fail {
struct mad_common common;
 };
@@ -204,7 +198,6 @@ union mad_iu {
struct viosrp_empty_iu empty_iu;

[PATCH v5 00/23] powerpc/8xx: Use large pages for RAM and IMMR and other improvments

The main purpose of this patchset is to dramatically reduce the time
spent in DTLB miss handler. This is achieved by:
1/ Mapping RAM with 8M pages
2/ Mapping IMMR with a fixed 512K page

On a live running system (VoIP gateway for Air Trafic Control), over
a 10 minutes period (with 277s idle), we get 87 millions DTLB misses
and approximatly 35 secondes are spent in DTLB handler.
This represents 5.8% of the overall time and even 10.8% of the
non-idle time.
Among those 87 millions DTLB misses, 15% are on user addresses and
85% are on kernel addresses. And within the kernel addresses, 93%
are on addresses from the linear address space and only 7% are on
addresses from the virtual address space.

Once the full patchset applied, the number of DTLB misses during the
period is reduced to 11.8 millions for a duration of 5.8s, which
represents 2% of the non-idle time.

This patch also includes other miscellaneous improvements:
1/ Handling of CPU6 ERRATA directly in mtspr() C macro to reduce code
specific to PPC8xx
2/ Rewrite of a few non critical ASM functions in C
3/ Removal of some unused items

See related patches for details

Main changes in v3:
* Using fixmap instead of fix address for mapping IMMR

Change in v4:
* Fix of a wrong #if notified by kbuild robot in 07/23

Change in v5:
* Removed use of pmd_val() as L-value
* Adapted to match the new include files layout in Linux 4.5

Christophe Leroy (23):
  powerpc/8xx: Save r3 all the time in DTLB miss handler
  powerpc/8xx: Map linear kernel RAM with 8M pages
  powerpc: Update documentation for noltlbs kernel parameter
  powerpc/8xx: move setup_initial_memory_limit() into 8xx_mmu.c
  powerpc32: Fix pte_offset_kernel() to return NULL for bad pages
  powerpc32: refactor x_mapped_by_bats() and x_mapped_by_tlbcam()
together
  powerpc/8xx: Fix vaddr for IMMR early remap
  powerpc/8xx: Map IMMR area with 512k page at a fixed address
  powerpc/8xx: CONFIG_PIN_TLB unneeded for CONFIG_PPC_EARLY_DEBUG_CPM
  powerpc/8xx: map more RAM at startup when needed
  powerpc32: Remove useless/wrong MMU:setio progress message
  powerpc32: remove ioremap_base
  powerpc/8xx: Add missing SPRN defines into reg_8xx.h
  powerpc/8xx: Handle CPU6 ERRATA directly in mtspr() macro
  powerpc/8xx: remove special handling of CPU6 errata in set_dec()
  powerpc/8xx: rewrite set_context() in C
  powerpc/8xx: rewrite flush_instruction_cache() in C
  powerpc: add inline functions for cache related instructions
  powerpc32: Remove clear_pages() and define clear_page() inline
  powerpc32: move x_dcache_range() functions inline
  powerpc: Simplify test in __dma_sync()
  powerpc32: small optimisation in flush_icache_range()
  powerpc32: Remove one insn in mulhdu

 Documentation/kernel-parameters.txt  |   2 +-
 arch/powerpc/Kconfig.debug   |   1 -
 arch/powerpc/include/asm/cache.h |  19 +++
 arch/powerpc/include/asm/cacheflush.h|  52 ++-
 arch/powerpc/include/asm/fixmap.h|  14 ++
 arch/powerpc/include/asm/mmu-8xx.h   |   4 +-
 arch/powerpc/include/asm/nohash/32/pgtable.h |   5 +-
 arch/powerpc/include/asm/page_32.h   |  17 ++-
 arch/powerpc/include/asm/reg.h   |   2 +
 arch/powerpc/include/asm/reg_8xx.h   |  93 
 arch/powerpc/include/asm/time.h  |   6 +-
 arch/powerpc/kernel/asm-offsets.c|   8 ++
 arch/powerpc/kernel/head_8xx.S   | 207 +--
 arch/powerpc/kernel/misc_32.S| 107 ++
 arch/powerpc/kernel/ppc_ksyms.c  |   2 +
 arch/powerpc/kernel/ppc_ksyms_32.c   |   1 -
 arch/powerpc/mm/8xx_mmu.c| 190 
 arch/powerpc/mm/Makefile |   1 +
 arch/powerpc/mm/dma-noncoherent.c|   2 +-
 arch/powerpc/mm/fsl_booke_mmu.c  |   4 +-
 arch/powerpc/mm/init_32.c|  23 ---
 arch/powerpc/mm/mmu_decl.h   |  34 +++--
 arch/powerpc/mm/pgtable_32.c |  47 +-
 arch/powerpc/mm/ppc_mmu_32.c |   4 +-
 arch/powerpc/platforms/embedded6xx/mpc10x.h  |  10 --
 arch/powerpc/sysdev/cpm_common.c |  15 +-
 26 files changed, 583 insertions(+), 287 deletions(-)
 create mode 100644 arch/powerpc/mm/8xx_mmu.c

-- 
2.1.0

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[PATCH v5 05/23] powerpc32: Fix pte_offset_kernel() to return NULL for bad pages

The fixmap related functions try to map kernel pages that are
already mapped through Large TLBs. pte_offset_kernel() has to
return NULL for LTLBs, otherwise the caller will try to access
level 2 table which doesn't exist

Signed-off-by: Christophe Leroy 
---
v3: new
v4: no change
v5: no change

 arch/powerpc/include/asm/nohash/32/pgtable.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/arch/powerpc/include/asm/nohash/32/pgtable.h 
b/arch/powerpc/include/asm/nohash/32/pgtable.h
index c82cbf5..e201600 100644
--- a/arch/powerpc/include/asm/nohash/32/pgtable.h
+++ b/arch/powerpc/include/asm/nohash/32/pgtable.h
@@ -309,7 +309,8 @@ static inline void __ptep_set_access_flags(pte_t *ptep, 
pte_t entry)
 #define pte_index(address) \
(((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
 #define pte_offset_kernel(dir, addr)   \
-   ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(addr))
+   (pmd_bad(*(dir)) ? NULL : (pte_t *)pmd_page_vaddr(*(dir)) + \
+ pte_index(addr))
 #define pte_offset_map(dir, addr)  \
((pte_t *) kmap_atomic(pmd_page(*(dir))) + pte_index(addr))
 #define pte_unmap(pte) kunmap_atomic(pte)
-- 
2.1.0

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[PATCH v5 08/23] powerpc/8xx: Map IMMR area with 512k page at a fixed address

Once the linear memory space has been mapped with 8Mb pages, as
seen in the related commit, we get 11 millions DTLB missed during
the reference 600s period. 77% of the misses are on user addresses
and 23% are on kernel addresses (1 fourth for linear address space
and 3 fourth for virtual address space)

Traditionaly, each driver manages one computer board which has its
own components with its own memory maps.
But on embedded chips like the MPC8xx, the SOC has all registers
located in the same IO area.

When looking at ioremaps done during startup, we see that
many drivers are re-mapping small parts of the IMMR for their own use
and all those small pieces gets their own 4k page, amplifying the
number of TLB misses: in our system we get 0xff00 mapped 31 times
and 0xff003000 mapped 9 times.

Even if each part of IMMR was mapped only once with 4k pages, it would
still be several small mappings towards linear area.

With the patch, on the same principle as what was done for the RAM,
the IMMR gets mapped by a 512k page.

In 4k pages mode, we reserve a 4Mb area for mapping IMMR. The TLB
miss handler checks that we are within the first 512k and bail out
with page not marked valid if we are outside

In 16k pages mode, it is not realistic to reserve a 64Mb area, so
we do a standard mapping of the 512k area using 32 pages of 16k.
The CPM will be mapped via the first two pages, and the SEC engine
will be mapped via the 16th and 17th pages. As the pages are marked
guarded, there will be no speculative accesses.

With this patch applied, the number of DTLB misses during the 10 min
period is reduced to 11.8 millions for a duration of 5.8s, which
represents 2% of the non-idle time hence yet another 10% reduction.

Signed-off-by: Christophe Leroy 
---
v2:
- using bt instead of blt/bgt
- reorganised in order to have only one taken branch for both 512k
and 8M instead of a first branch for both 8M and 512k then a second
branch for 512k

v3:
- using fixmap
- using the new x_block_mapped() functions

v4: no change
v5: no change

 arch/powerpc/include/asm/fixmap.h |  9 ++-
 arch/powerpc/kernel/head_8xx.S| 36 +-
 arch/powerpc/mm/8xx_mmu.c | 53 +++
 arch/powerpc/mm/mmu_decl.h|  3 ++-
 4 files changed, 98 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/include/asm/fixmap.h 
b/arch/powerpc/include/asm/fixmap.h
index d7dd8fb..b954dc3 100644
--- a/arch/powerpc/include/asm/fixmap.h
+++ b/arch/powerpc/include/asm/fixmap.h
@@ -52,12 +52,19 @@ enum fixed_addresses {
FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1,
 #endif
 #ifdef CONFIG_PPC_8xx
-   /* For IMMR we need an aligned 512K area */
FIX_IMMR_START,
+#ifdef CONFIG_PPC_4K_PAGES
+   /* For IMMR we need an aligned 4M area (full PGD entry) */
+   FIX_IMMR_TOP = (FIX_IMMR_START - 1 + ((4 * 1024 * 1024) / PAGE_SIZE)) &
+  ~(((4 * 1024 * 1024) / PAGE_SIZE) - 1),
+   FIX_IMMR_BASE = FIX_IMMR_TOP - 1 + ((4 * 1024 * 1024) / PAGE_SIZE),
+#else
+   /* For IMMR we need an aligned 512K area */
FIX_IMMR_TOP = (FIX_IMMR_START - 1 + ((512 * 1024) / PAGE_SIZE)) &
   ~(((512 * 1024) / PAGE_SIZE) - 1),
FIX_IMMR_BASE = FIX_IMMR_TOP - 1 + ((512 * 1024) / PAGE_SIZE),
 #endif
+#endif
/* FIX_PCIE_MCFG, */
__end_of_fixed_addresses
 };
diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index 09173ae..ae721a1 100644
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -254,6 +254,37 @@ DataAccess:
. = 0x400
 InstructionAccess:
 
+/*
+ * Bottom part of DTLBMiss handler for 512k pages
+ * not enough space in the primary location
+ */
+#ifdef CONFIG_PPC_4K_PAGES
+/*
+ * 512k pages are only used for mapping IMMR area in 4K pages mode.
+ * Only map the first 512k page of the 4M area covered by the PGD entry.
+ * This should not happen, but if we are called for another page of that
+ * area, don't mark it valid
+ *
+ * In 16k pages mode, IMMR is directly mapped with 16k pages
+ */
+DTLBMiss512k:
+   rlwinm. r10, r10, 0, 0x0038
+   bne-1f
+   ori r11, r11, MD_SVALID
+1: mtcrr3
+   MTSPR_CPU6(SPRN_MD_TWC, r11, r3)
+   rlwinm  r10, r11, 0, 0xffc0
+   ori r10, r10, 0xf0 | MD_SPS16K | _PAGE_SHARED | _PAGE_DIRTY | \
+ _PAGE_PRESENT | _PAGE_NO_CACHE
+   MTSPR_CPU6(SPRN_MD_RPN, r10, r3)/* Update TLB entry */
+
+   li  r11, RPN_PATTERN
+   mfspr   r3, SPRN_SPRG_SCRATCH2
+   mtspr   SPRN_DAR, r11   /* Tag DAR */
+   EXCEPTION_EPILOG_0
+   rfi
+#endif
+
 /* External interrupt */
EXCEPTION(0x500, HardwareInterrupt, do_IRQ, EXC_XFER_LITE)
 
@@ -405,6 +436,9 @@ DataStoreTLBMiss:
lwz r11, (swapper_pg_dir-PAGE_OFFSET)@l(r11)/* Get the 
level 1 entry */
mtcrr11
bt- 28,DTLBMiss8M

[PATCH v5 14/23] powerpc/8xx: Handle CPU6 ERRATA directly in mtspr() macro

MPC8xx has an ERRATA on the use of mtspr() for some registers
This patch includes the ERRATA handling directly into mtspr() macro
so that mtspr() users don't need to bother about that errata

Signed-off-by: Christophe Leroy 
---
v2: no change
v3: no change
v4: no change
v5: no change

 arch/powerpc/include/asm/reg.h |  2 +
 arch/powerpc/include/asm/reg_8xx.h | 82 ++
 2 files changed, 84 insertions(+)

diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index c4cb2ff..7b5d97f 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -1211,9 +1211,11 @@ static inline void mtmsr_isync(unsigned long val)
 #define mfspr(rn)  ({unsigned long rval; \
asm volatile("mfspr %0," __stringify(rn) \
: "=r" (rval)); rval;})
+#ifndef mtspr
 #define mtspr(rn, v)   asm volatile("mtspr " __stringify(rn) ",%0" : \
 : "r" ((unsigned long)(v)) \
 : "memory")
+#endif
 
 extern void msr_check_and_set(unsigned long bits);
 extern bool strict_msr_control;
diff --git a/arch/powerpc/include/asm/reg_8xx.h 
b/arch/powerpc/include/asm/reg_8xx.h
index 0f71c81..d41412c 100644
--- a/arch/powerpc/include/asm/reg_8xx.h
+++ b/arch/powerpc/include/asm/reg_8xx.h
@@ -50,4 +50,86 @@
 #define DC_DFWT0x4000  /* Data cache is forced write 
through */
 #define DC_LES 0x2000  /* Caches are little endian mode */
 
+#ifdef CONFIG_8xx_CPU6
+#define do_mtspr_cpu6(rn, rn_addr, v)  \
+   do {\
+   int _reg_cpu6 = rn_addr, _tmp_cpu6[1];  \
+   asm volatile("stw %0, %1;"  \
+"lwz %0, %1;"  \
+"mtspr " __stringify(rn) ",%2" :   \
+: "r" (_reg_cpu6), "m"(_tmp_cpu6), \
+  "r" ((unsigned long)(v)) \
+: "memory");   \
+   } while (0)
+
+#define do_mtspr(rn, v)asm volatile("mtspr " __stringify(rn) ",%0" :   
\
+: "r" ((unsigned long)(v)) \
+: "memory")
+#define mtspr(rn, v) \
+   do {\
+   if (rn == SPRN_IMMR)\
+   do_mtspr_cpu6(rn, 0x3d30, v);   \
+   else if (rn == SPRN_IC_CST) \
+   do_mtspr_cpu6(rn, 0x2110, v);   \
+   else if (rn == SPRN_IC_ADR) \
+   do_mtspr_cpu6(rn, 0x2310, v);   \
+   else if (rn == SPRN_IC_DAT) \
+   do_mtspr_cpu6(rn, 0x2510, v);   \
+   else if (rn == SPRN_DC_CST) \
+   do_mtspr_cpu6(rn, 0x3110, v);   \
+   else if (rn == SPRN_DC_ADR) \
+   do_mtspr_cpu6(rn, 0x3310, v);   \
+   else if (rn == SPRN_DC_DAT) \
+   do_mtspr_cpu6(rn, 0x3510, v);   \
+   else if (rn == SPRN_MI_CTR) \
+   do_mtspr_cpu6(rn, 0x2180, v);   \
+   else if (rn == SPRN_MI_AP)  \
+   do_mtspr_cpu6(rn, 0x2580, v);   \
+   else if (rn == SPRN_MI_EPN) \
+   do_mtspr_cpu6(rn, 0x2780, v);   \
+   else if (rn == SPRN_MI_TWC) \
+   do_mtspr_cpu6(rn, 0x2b80, v);   \
+   else if (rn == SPRN_MI_RPN) \
+   do_mtspr_cpu6(rn, 0x2d80, v);   \
+   else if (rn == SPRN_MI_CAM) \
+   do_mtspr_cpu6(rn, 0x2190, v);   \
+   else if (rn == SPRN_MI_RAM0)\
+   do_mtspr_cpu6(rn, 0x2390, v);   \
+   else if (rn == SPRN_MI_RAM1)\
+   do_mtspr_cpu6(rn, 0x2590, v);   \
+   else if (rn == SPRN_MD_CTR) \
+   do_mtspr_cpu6(rn, 0x3180, v);   \
+   else if (rn == SPRN_M_CASID)\
+

Re: commit 9178ba294b6839eeff1a91bed95515d783f3ee6c an A-Eon Tabor Board

2016-02-03 Thread Alexander Graf

On 02/03/2016 11:54 PM, Julian Margetson wrote:

On 2/3/2016 6:20 PM, Alexander Graf wrote:

On 02/03/2016 11:15 PM, Julian Margetson wrote:

On 2/3/2016 4:43 PM, Alexander Graf wrote:

On 02/03/2016 10:33 AM, Julian Margetson wrote:
Resending as it was attached to and old thread relating to a
different motherboard.

On 2/2/2016 9:54 AM, Julian Margetson wrote:

Commit 9178ba294b6839eeff1a91bed95515d783f3ee6c prevents building
of kernel 4.1 branch on A-Eon Tabor Board.

CC arch/powerpc/math-emu/fsqrt.o
arch/powerpc/platforms/85xx/tabor.c:194:2: error: unknown field
‘power_off’ specified in initializer

I can't seem to find that file in Linux upstream?

Alex

It may have been discontinued as the patches used were maintained
along with patches for the (Varisys) A-Eon Cyrus board

which is officially supported from kernel 4.4.

https://git.kernel.org/cgit/linux/kernel/git/torvalds/linux.git/commit/?id=c383ee84e1d575b09d167185d15df24bde25eb15

I don't quite understand how an internal API change in Linux breaking
random external patches is a bug? Either your code is upstream or it
can break on every git commit done upstream.

Alex

Sorry I am relatively new at this.
If I manage to pinpoint a problem on my powerpc machines I report it .
Most of them so far have indeed been bugs.
The random external patches were done by person with far greater
competence than me who are no longer in the picture.

Any guidance would be greatly appreciated.

I think the most important step really is to upstream board support,
otherwise things will continue to fall apart for sure.

As for the exact breakage you saw, just remove the line and put a line like

pm_power_off = tabor_power_off;

in your board probe function in tabor.c.

Alex

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[PATCH 3/6] ibmvscsi: Replace magic values in set_adpater_info() with defines

Add defines for mad version and mad os_type, and replace the magic
numbers in set_adapter_info() accordingly.

Signed-off-by: Tyrel Datwyler 
---
 drivers/scsi/ibmvscsi/ibmvscsi.c | 4 ++--
 drivers/scsi/ibmvscsi/viosrp.h   | 2 ++
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/scsi/ibmvscsi/ibmvscsi.c b/drivers/scsi/ibmvscsi/ibmvscsi.c
index 176260d..7e51615 100644
--- a/drivers/scsi/ibmvscsi/ibmvscsi.c
+++ b/drivers/scsi/ibmvscsi/ibmvscsi.c
@@ -283,8 +283,8 @@ static void set_adapter_info(struct ibmvscsi_host_data 
*hostdata)
hostdata->madapter_info.partition_number =
cpu_to_be32(partition_number);
 
-   hostdata->madapter_info.mad_version = cpu_to_be32(1);
-   hostdata->madapter_info.os_type = cpu_to_be32(2);
+   hostdata->madapter_info.mad_version = cpu_to_be32(SRP_MAD_VERSION_1);
+   hostdata->madapter_info.os_type = cpu_to_be32(SRP_MAD_OS_LINUX);
 }
 
 /**
diff --git a/drivers/scsi/ibmvscsi/viosrp.h b/drivers/scsi/ibmvscsi/viosrp.h
index 17f2de0..da9bb29 100644
--- a/drivers/scsi/ibmvscsi/viosrp.h
+++ b/drivers/scsi/ibmvscsi/viosrp.h
@@ -38,6 +38,8 @@
 #define SRP_VERSION "16.a"
 #define SRP_MAX_IU_LEN 256
 #define SRP_MAX_LOC_LEN 32
+#define SRP_MAD_VERSION_1 1
+#define SRP_MAD_OS_LINUX 2
 
 union srp_iu {
struct srp_login_req login_req;
-- 
2.5.0

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[PATCH 6/6] ibmvscsi: Add endian conversions to sysfs attribute show functions

The values returned by the show functions for the host os_type,
mad_version, and partition_number attributes get their values
directly from the madapter_info struct whose associated fields are
__be32 typed. Added endian conversion to ensure these values are
sane on LE platforms.

Signed-off-by: Tyrel Datwyler 
---
 drivers/scsi/ibmvscsi/ibmvscsi.c | 7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/scsi/ibmvscsi/ibmvscsi.c b/drivers/scsi/ibmvscsi/ibmvscsi.c
index a2b8db1..3621ac5 100644
--- a/drivers/scsi/ibmvscsi/ibmvscsi.c
+++ b/drivers/scsi/ibmvscsi/ibmvscsi.c
@@ -1983,7 +1983,7 @@ static ssize_t show_host_partition_number(struct device 
*dev,
int len;
 
len = snprintf(buf, PAGE_SIZE, "%d\n",
-  hostdata->madapter_info.partition_number);
+  be32_to_cpu(hostdata->madapter_info.partition_number));
return len;
 }
 
@@ -2003,7 +2003,7 @@ static ssize_t show_host_mad_version(struct device *dev,
int len;
 
len = snprintf(buf, PAGE_SIZE, "%d\n",
-  hostdata->madapter_info.mad_version);
+  be32_to_cpu(hostdata->madapter_info.mad_version));
return len;
 }
 
@@ -2022,7 +2022,8 @@ static ssize_t show_host_os_type(struct device *dev,
struct ibmvscsi_host_data *hostdata = shost_priv(shost);
int len;
 
-   len = snprintf(buf, PAGE_SIZE, "%d\n", hostdata->madapter_info.os_type);
+   len = snprintf(buf, PAGE_SIZE, "%d\n",
+  be32_to_cpu(hostdata->madapter_info.os_type));
return len;
 }
 
-- 
2.5.0

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Re: [PATCH v8 6/6] cpufreq: powernv: Add sysfs attributes to show throttle stats

On 03-02-16, 21:54, Shilpasri G Bhat wrote:
> 
> > 
> > And now that you have mentioned that to me, why shouldn't this stats
> > directory be moved to debugfs ? :)
> > 
> > We are never going to perform a store here, isn't it ? And is just for
> > information, nothing more.
> > 
> 
> I would very much like to keep the throttle stats either in cpuX/cpufreq or
> global cpufreq directory as these are populated by the platform cpufreq 
> driver.
> 
> Today we don't have a requirement to a perform a store operation on these 
> files
> but we can have it in the future.

No issues.

-- 
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[PATCH] powerpc/85xx: disable IDE subsystem in stx_gp3_defconfig

This patch disables deprecated IDE subsystem in stx_gp3_defconfig
(no IDE host drivers are selected in this config so there is no valid
reason to enable IDE subsystem itself).

Cc: Scott Wood 
Cc: Kumar Gala 
Signed-off-by: Bartlomiej Zolnierkiewicz 
---
 arch/powerpc/configs/85xx/stx_gp3_defconfig | 2 --
 1 file changed, 2 deletions(-)

diff --git a/arch/powerpc/configs/85xx/stx_gp3_defconfig 
b/arch/powerpc/configs/85xx/stx_gp3_defconfig
index f66d16b..b451905 100644
--- a/arch/powerpc/configs/85xx/stx_gp3_defconfig
+++ b/arch/powerpc/configs/85xx/stx_gp3_defconfig
@@ -31,8 +31,6 @@ CONFIG_BLK_DEV_LOOP=m
 CONFIG_BLK_DEV_NBD=m
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=32768
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDECD=m
 CONFIG_SCSI=m
 CONFIG_BLK_DEV_SD=m
 CONFIG_CHR_DEV_ST=m
-- 
1.9.1

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[RFT PATCH] powerpc: convert maple_defconfig to use libata PATA drivers

IDE subsystem has been deprecated since 2009 and the majority
(if not all) of Linux distributions have switched to use
libata for ATA support exclusively.  However there are still
some users (mostly old or/and embedded non-x86 systems) that
have not converted from using IDE subsystem to libata PATA
drivers.  This doesn't seem to be good thing in the long-term
for Linux as while there is less and less PATA systems left
in use:

* testing efforts are divided between two subsystems

* having duplicate drivers for same hardware confuses users

This patch converts maple_defconfig to use libata PATA
drivers.

Signed-off-by: Bartlomiej Zolnierkiewicz 
---
Build tested only.
If you have affected hardware please test.  Thank you.

 arch/powerpc/configs/maple_defconfig | 9 -
 1 file changed, 4 insertions(+), 5 deletions(-)

diff --git a/arch/powerpc/configs/maple_defconfig 
b/arch/powerpc/configs/maple_defconfig
index ac9666f..75b5a4e 100644
--- a/arch/powerpc/configs/maple_defconfig
+++ b/arch/powerpc/configs/maple_defconfig
@@ -40,16 +40,15 @@ CONFIG_IP_PNP_DHCP=y
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=8192
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDECD=y
-CONFIG_IDE_TASK_IOCTL=y
-CONFIG_BLK_DEV_GENERIC=y
-CONFIG_BLK_DEV_AMD74XX=y
 # CONFIG_SCSI_PROC_FS is not set
 CONFIG_BLK_DEV_SD=y
+CONFIG_BLK_DEV_SR=y
+CONFIG_BLK_DEV_SR_VENDOR=y
 CONFIG_CHR_DEV_SG=y
 CONFIG_SCSI_IPR=y
 CONFIG_ATA=y
+CONFIG_PATA_AMD=y
+CONFIG_ATA_GENERIC=y
 CONFIG_NETDEVICES=y
 CONFIG_AMD8111_ETH=y
 CONFIG_TIGON3=y
-- 
1.9.1

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[PATCH] powerpc: disable IDE subsystem in pasemi_defconfig

This patch disables deprecated IDE subsystem in pasemi_defconfig
(no IDE host drivers are selected in this config so there is no valid
reason to enable IDE subsystem itself).

Cc: Olof Johansson 
Signed-off-by: Bartlomiej Zolnierkiewicz 
---
 arch/powerpc/configs/pasemi_defconfig | 3 ---
 1 file changed, 3 deletions(-)

diff --git a/arch/powerpc/configs/pasemi_defconfig 
b/arch/powerpc/configs/pasemi_defconfig
index 8f94782..d7654e4 100644
--- a/arch/powerpc/configs/pasemi_defconfig
+++ b/arch/powerpc/configs/pasemi_defconfig
@@ -58,9 +58,6 @@ CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=16384
 CONFIG_EEPROM_LEGACY=y
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDECD=y
-CONFIG_IDE_TASK_IOCTL=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_CHR_DEV_ST=y
 CONFIG_CHR_DEV_OSST=y
-- 
1.9.1

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[RFT PATCH] powerpc: convert ppc64e_defconfig to use libata PATA drivers

IDE subsystem has been deprecated since 2009 and the majority
(if not all) of Linux distributions have switched to use
libata for ATA support exclusively.  However there are still
some users (mostly old or/and embedded non-x86 systems) that
have not converted from using IDE subsystem to libata PATA
drivers.  This doesn't seem to be good thing in the long-term
for Linux as while there is less and less PATA systems left
in use:

* testing efforts are divided between two subsystems

* having duplicate drivers for same hardware confuses users

This patch converts ppc64e_defconfig to use libata PATA
drivers.

Signed-off-by: Bartlomiej Zolnierkiewicz 
---
Build tested only.
If you have affected hardware please test.  Thank you.

 arch/powerpc/configs/ppc64e_defconfig | 6 ++
 1 file changed, 2 insertions(+), 4 deletions(-)

diff --git a/arch/powerpc/configs/ppc64e_defconfig 
b/arch/powerpc/configs/ppc64e_defconfig
index ddf9773..ec795e2 100644
--- a/arch/powerpc/configs/ppc64e_defconfig
+++ b/arch/powerpc/configs/ppc64e_defconfig
@@ -59,10 +59,6 @@ CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_NBD=m
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=65536
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDECD=y
-CONFIG_BLK_DEV_GENERIC=y
-CONFIG_BLK_DEV_AMD74XX=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_CHR_DEV_ST=y
 CONFIG_BLK_DEV_SR=y
@@ -79,6 +75,8 @@ CONFIG_SCSI_DEBUG=m
 CONFIG_ATA=y
 CONFIG_SATA_SIL24=y
 CONFIG_SATA_SVW=y
+CONFIG_PATA_AMD=y
+CONFIG_ATA_GENERIC=y
 CONFIG_MD=y
 CONFIG_BLK_DEV_MD=y
 CONFIG_MD_LINEAR=y
-- 
1.9.1

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[PATCH] powerpc: disable IDE subsystem in pq2fads_defconfig

This patch disables deprecated IDE subsystem in pq2fads_defconfig
(no IDE host drivers are selected in this config so there is no valid
reason to enable IDE subsystem itself).

Signed-off-by: Bartlomiej Zolnierkiewicz 
---
 arch/powerpc/configs/pq2fads_defconfig | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/powerpc/configs/pq2fads_defconfig 
b/arch/powerpc/configs/pq2fads_defconfig
index 3e336ee..1e77d45 100644
--- a/arch/powerpc/configs/pq2fads_defconfig
+++ b/arch/powerpc/configs/pq2fads_defconfig
@@ -40,7 +40,6 @@ CONFIG_MTD_CFI_I4=y
 CONFIG_MTD_CFI_INTELEXT=y
 CONFIG_MTD_PHYSMAP_OF=y
 CONFIG_BLK_DEV_LOOP=y
-CONFIG_IDE=y
 CONFIG_NETDEVICES=y
 CONFIG_TUN=y
 CONFIG_FS_ENET=y
-- 
1.9.1

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Re: [PATCH v8 6/6] cpufreq: powernv: Add sysfs attributes to show throttle stats

2016-02-03 Thread Shilpasri G Bhat


> 
> And now that you have mentioned that to me, why shouldn't this stats
> directory be moved to debugfs ? :)
> 
> We are never going to perform a store here, isn't it ? And is just for
> information, nothing more.
> 

I would very much like to keep the throttle stats either in cpuX/cpufreq or
global cpufreq directory as these are populated by the platform cpufreq driver.

Today we don't have a requirement to a perform a store operation on these files
but we can have it in the future.

Thanks and Regards,
Shilpa

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[PATCH] powerpc/85xx: disable IDE subsystem in ksi8560_defconfig

This patch disables deprecated IDE subsystem in ksi8560_defconfig
(no IDE host drivers are selected in this config so there is no valid
reason to enable IDE subsystem itself).

Cc: Scott Wood 
Cc: Kumar Gala 
Signed-off-by: Bartlomiej Zolnierkiewicz 
---
 arch/powerpc/configs/85xx/ksi8560_defconfig | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/powerpc/configs/85xx/ksi8560_defconfig 
b/arch/powerpc/configs/85xx/ksi8560_defconfig
index 3be85c5..6f753a7 100644
--- a/arch/powerpc/configs/85xx/ksi8560_defconfig
+++ b/arch/powerpc/configs/85xx/ksi8560_defconfig
@@ -34,7 +34,6 @@ CONFIG_MTD_PHYSMAP_OF=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=32768
-CONFIG_IDE=y
 CONFIG_NETDEVICES=y
 CONFIG_FS_ENET=y
 # CONFIG_FS_ENET_HAS_SCC is not set
-- 
1.9.1

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[RFT PATCH] powerpc/85xx: convert tqm8540_defconfig to use libata PATA drivers

IDE subsystem has been deprecated since 2009 and the majority
(if not all) of Linux distributions have switched to use
libata for ATA support exclusively.  However there are still
some users (mostly old or/and embedded non-x86 systems) that
have not converted from using IDE subsystem to libata PATA
drivers.  This doesn't seem to be good thing in the long-term
for Linux as while there is less and less PATA systems left
in use:

* testing efforts are divided between two subsystems

* having duplicate drivers for same hardware confuses users

This patch converts tqm8540_defconfig to use libata PATA
drivers.

Cc: Scott Wood 
Cc: Kumar Gala 
Signed-off-by: Bartlomiej Zolnierkiewicz 
---
Build tested only.
If you have affected hardware please test.  Thank you.

 arch/powerpc/configs/85xx/tqm8540_defconfig | 7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/configs/85xx/tqm8540_defconfig 
b/arch/powerpc/configs/85xx/tqm8540_defconfig
index 4daaf29..358d068 100644
--- a/arch/powerpc/configs/85xx/tqm8540_defconfig
+++ b/arch/powerpc/configs/85xx/tqm8540_defconfig
@@ -30,9 +30,10 @@ CONFIG_MTD_CFI_AMDSTD=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=32768
-CONFIG_IDE=y
-CONFIG_BLK_DEV_GENERIC=y
-CONFIG_BLK_DEV_VIA82CXXX=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_ATA=y
+CONFIG_PATA_VIA=y
+CONFIG_ATA_GENERIC=y
 CONFIG_NETDEVICES=y
 CONFIG_GIANFAR=y
 CONFIG_E100=y
-- 
1.9.1

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[RFT PATCH] powerpc/86xx: convert gef_ppc9a_defconfig to use libata PATA drivers

IDE subsystem has been deprecated since 2009 and the majority
(if not all) of Linux distributions have switched to use
libata for ATA support exclusively.  However there are still
some users (mostly old or/and embedded non-x86 systems) that
have not converted from using IDE subsystem to libata PATA
drivers.  This doesn't seem to be good thing in the long-term
for Linux as while there is less and less PATA systems left
in use:

* testing efforts are divided between two subsystems

* having duplicate drivers for same hardware confuses users

This patch converts gef_ppc9a_defconfig to use libata PATA
drivers.

Signed-off-by: Bartlomiej Zolnierkiewicz 
---
Build tested only.
If you have affected hardware please test.  Thank you.

 arch/powerpc/configs/86xx/gef_ppc9a_defconfig | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/arch/powerpc/configs/86xx/gef_ppc9a_defconfig 
b/arch/powerpc/configs/86xx/gef_ppc9a_defconfig
index 9792a2c..ca06080 100644
--- a/arch/powerpc/configs/86xx/gef_ppc9a_defconfig
+++ b/arch/powerpc/configs/86xx/gef_ppc9a_defconfig
@@ -76,13 +76,12 @@ CONFIG_BLK_DEV_NBD=m
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=131072
 CONFIG_DS1682=y
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDECS=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_CHR_DEV_ST=y
 CONFIG_BLK_DEV_SR=y
 CONFIG_ATA=y
 CONFIG_SATA_SIL=y
+CONFIG_PATA_PCMCIA=y
 CONFIG_NETDEVICES=y
 CONFIG_BONDING=m
 CONFIG_DUMMY=m
-- 
1.9.1

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[RFT PATCH] powerpc: convert chrp32_defconfig to use libata PATA drivers

IDE subsystem has been deprecated since 2009 and the majority
(if not all) of Linux distributions have switched to use
libata for ATA support exclusively.  However there are still
some users (mostly old or/and embedded non-x86 systems) that
have not converted from using IDE subsystem to libata PATA
drivers.  This doesn't seem to be good thing in the long-term
for Linux as while there is less and less PATA systems left
in use:

* testing efforts are divided between two subsystems

* having duplicate drivers for same hardware confuses users

This patch converts chrp32_defconfig to use libata PATA
drivers.

Signed-off-by: Bartlomiej Zolnierkiewicz 
---
Build tested only.
If you have affected hardware please test.  Thank you.

 arch/powerpc/configs/chrp32_defconfig | 10 --
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/arch/powerpc/configs/chrp32_defconfig 
b/arch/powerpc/configs/chrp32_defconfig
index 253a9f2..9eb8080 100644
--- a/arch/powerpc/configs/chrp32_defconfig
+++ b/arch/powerpc/configs/chrp32_defconfig
@@ -42,12 +42,6 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_BLK_DEV_FD=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDECD=y
-CONFIG_BLK_DEV_GENERIC=y
-CONFIG_BLK_DEV_SL82C105=y
-CONFIG_BLK_DEV_VIA82CXXX=y
-CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_CHR_DEV_ST=y
 CONFIG_BLK_DEV_SR=y
@@ -56,6 +50,10 @@ CONFIG_CHR_DEV_SG=y
 CONFIG_SCSI_CONSTANTS=y
 CONFIG_SCSI_SYM53C8XX_2=y
 CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=0
+CONFIG_ATA=y
+CONFIG_PATA_VIA=y
+CONFIG_PATA_WINBOND=y
+CONFIG_ATA_GENERIC=y
 CONFIG_NETDEVICES=y
 CONFIG_PCNET32=y
 CONFIG_NET_TULIP=y
-- 
1.9.1

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[RFT PATCH] powerpc: convert pmac32_defconfig to use libata PATA drivers

IDE subsystem has been deprecated since 2009 and the majority
(if not all) of Linux distributions have switched to use
libata for ATA support exclusively.  However there are still
some users (mostly old or/and embedded non-x86 systems) that
have not converted from using IDE subsystem to libata PATA
drivers.  This doesn't seem to be good thing in the long-term
for Linux as while there is less and less PATA systems left
in use:

* testing efforts are divided between two subsystems

* having duplicate drivers for same hardware confuses users

This patch converts pmac32_defconfig to use libata PATA
drivers.

Signed-off-by: Bartlomiej Zolnierkiewicz 
---
Build tested only.
If you have affected hardware please test.  Thank you.

 arch/powerpc/configs/pmac32_defconfig | 15 ++-
 1 file changed, 6 insertions(+), 9 deletions(-)

diff --git a/arch/powerpc/configs/pmac32_defconfig 
b/arch/powerpc/configs/pmac32_defconfig
index ea8705f..c4efc5d 100644
--- a/arch/powerpc/configs/pmac32_defconfig
+++ b/arch/powerpc/configs/pmac32_defconfig
@@ -118,15 +118,6 @@ CONFIG_CONNECTOR=y
 CONFIG_MAC_FLOPPY=m
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDECS=m
-CONFIG_BLK_DEV_IDECD=y
-CONFIG_BLK_DEV_GENERIC=y
-CONFIG_BLK_DEV_PDC202XX_NEW=y
-CONFIG_BLK_DEV_SL82C105=y
-CONFIG_BLK_DEV_IDE_PMAC=y
-CONFIG_BLK_DEV_IDE_PMAC_ATA100FIRST=y
-CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_CHR_DEV_ST=y
 CONFIG_BLK_DEV_SR=y
@@ -141,6 +132,12 @@ CONFIG_SCSI_SYM53C8XX_2=y
 CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=0
 CONFIG_SCSI_MESH=y
 CONFIG_SCSI_MAC53C94=y
+CONFIG_ATA=y
+CONFIG_PATA_MACIO=y
+CONFIG_PATA_PDC2027X=y
+CONFIG_PATA_WINBOND=y
+CONFIG_PATA_PCMCIA=m
+CONFIG_ATA_GENERIC=y
 CONFIG_MD=y
 CONFIG_BLK_DEV_MD=m
 CONFIG_MD_LINEAR=m
-- 
1.9.1

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[RFT PATCH] powerpc/85xx: convert mpc85xx_cds_defconfig to use libata PATA drivers

IDE subsystem has been deprecated since 2009 and the majority
(if not all) of Linux distributions have switched to use
libata for ATA support exclusively.  However there are still
some users (mostly old or/and embedded non-x86 systems) that
have not converted from using IDE subsystem to libata PATA
drivers.  This doesn't seem to be good thing in the long-term
for Linux as while there is less and less PATA systems left
in use:

* testing efforts are divided between two subsystems

* having duplicate drivers for same hardware confuses users

This patch converts mpc85xx_cds_defconfig to use libata PATA
drivers.

Cc: Scott Wood 
Cc: Kumar Gala 
Signed-off-by: Bartlomiej Zolnierkiewicz 
---
Build tested only.
If you have affected hardware please test.  Thank you.

 arch/powerpc/configs/85xx/mpc85xx_cds_defconfig | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/configs/85xx/mpc85xx_cds_defconfig 
b/arch/powerpc/configs/85xx/mpc85xx_cds_defconfig
index ecb0c3b..acc5342 100644
--- a/arch/powerpc/configs/85xx/mpc85xx_cds_defconfig
+++ b/arch/powerpc/configs/85xx/mpc85xx_cds_defconfig
@@ -30,9 +30,9 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=32768
-CONFIG_IDE=y
-CONFIG_BLK_DEV_GENERIC=y
-CONFIG_BLK_DEV_VIA82CXXX=y
+CONFIG_ATA=y
+CONFIG_PATA_VIA=y
+CONFIG_ATA_GENERIC=y
 CONFIG_NETDEVICES=y
 CONFIG_GIANFAR=y
 CONFIG_E1000=y
-- 
1.9.1

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[RFT PATCH] powerpc/85xx: convert tqm8555_defconfig to use libata PATA drivers

IDE subsystem has been deprecated since 2009 and the majority
(if not all) of Linux distributions have switched to use
libata for ATA support exclusively.  However there are still
some users (mostly old or/and embedded non-x86 systems) that
have not converted from using IDE subsystem to libata PATA
drivers.  This doesn't seem to be good thing in the long-term
for Linux as while there is less and less PATA systems left
in use:

* testing efforts are divided between two subsystems

* having duplicate drivers for same hardware confuses users

This patch converts tqm8555_defconfig to use libata PATA
drivers.

Cc: Scott Wood 
Cc: Kumar Gala 
Signed-off-by: Bartlomiej Zolnierkiewicz 
---
Build tested only.
If you have affected hardware please test.  Thank you.

 arch/powerpc/configs/85xx/tqm8555_defconfig | 7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/configs/85xx/tqm8555_defconfig 
b/arch/powerpc/configs/85xx/tqm8555_defconfig
index 02a931d..3d9c1c0d 100644
--- a/arch/powerpc/configs/85xx/tqm8555_defconfig
+++ b/arch/powerpc/configs/85xx/tqm8555_defconfig
@@ -30,9 +30,10 @@ CONFIG_MTD_CFI_AMDSTD=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=32768
-CONFIG_IDE=y
-CONFIG_BLK_DEV_GENERIC=y
-CONFIG_BLK_DEV_VIA82CXXX=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_ATA=y
+CONFIG_PATA_VIA=y
+CONFIG_ATA_GENERIC=y
 CONFIG_NETDEVICES=y
 CONFIG_GIANFAR=y
 CONFIG_E100=y
-- 
1.9.1

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[RFT PATCH] powerpc/86xx: convert gef_sbc310_defconfig to use libata PATA drivers

IDE subsystem has been deprecated since 2009 and the majority
(if not all) of Linux distributions have switched to use
libata for ATA support exclusively.  However there are still
some users (mostly old or/and embedded non-x86 systems) that
have not converted from using IDE subsystem to libata PATA
drivers.  This doesn't seem to be good thing in the long-term
for Linux as while there is less and less PATA systems left
in use:

* testing efforts are divided between two subsystems

* having duplicate drivers for same hardware confuses users

This patch converts gef_sbc310_defconfig to use libata PATA
drivers.

Signed-off-by: Bartlomiej Zolnierkiewicz 
---
Build tested only.
If you have affected hardware please test.  Thank you.

 arch/powerpc/configs/86xx/gef_sbc310_defconfig | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/arch/powerpc/configs/86xx/gef_sbc310_defconfig 
b/arch/powerpc/configs/86xx/gef_sbc310_defconfig
index cadc366..2efd871 100644
--- a/arch/powerpc/configs/86xx/gef_sbc310_defconfig
+++ b/arch/powerpc/configs/86xx/gef_sbc310_defconfig
@@ -76,14 +76,12 @@ CONFIG_BLK_DEV_NBD=m
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=131072
 CONFIG_DS1682=y
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDECS=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_CHR_DEV_ST=y
 CONFIG_BLK_DEV_SR=y
 CONFIG_ATA=y
 CONFIG_SATA_SIL24=y
-# CONFIG_ATA_SFF is not set
+CONFIG_PATA_PCMCIA=y
 CONFIG_NETDEVICES=y
 CONFIG_BONDING=m
 CONFIG_DUMMY=m
-- 
1.9.1

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[PATCH] powerpc/86xx: disable IDE subsystem in mpc8610_hpcd_defconfig

This patch disables deprecated IDE subsystem in mpc8610_hpcd_defconfig
(no IDE host drivers are selected in this config so there is no valid
reason to enable IDE subsystem itself).

Signed-off-by: Bartlomiej Zolnierkiewicz 
---
 arch/powerpc/configs/86xx/mpc8610_hpcd_defconfig | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/powerpc/configs/86xx/mpc8610_hpcd_defconfig 
b/arch/powerpc/configs/86xx/mpc8610_hpcd_defconfig
index e32207d..1ef927f 100644
--- a/arch/powerpc/configs/86xx/mpc8610_hpcd_defconfig
+++ b/arch/powerpc/configs/86xx/mpc8610_hpcd_defconfig
@@ -49,7 +49,6 @@ CONFIG_MTD_NAND_FSL_ELBC=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=131072
-CONFIG_IDE=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_CHR_DEV_SG=y
 CONFIG_ATA=y
-- 
1.9.1

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[RFT PATCH] powerpc: convert ppc64_defconfig to use libata PATA drivers

IDE subsystem has been deprecated since 2009 and the majority
(if not all) of Linux distributions have switched to use
libata for ATA support exclusively.  However there are still
some users (mostly old or/and embedded non-x86 systems) that
have not converted from using IDE subsystem to libata PATA
drivers.  This doesn't seem to be good thing in the long-term
for Linux as while there is less and less PATA systems left
in use:

* testing efforts are divided between two subsystems

* having duplicate drivers for same hardware confuses users

This patch converts ppc64_defconfig to use libata PATA
drivers.

Signed-off-by: Bartlomiej Zolnierkiewicz 
---
Build tested only.
If you have affected hardware please test.  Thank you.

 arch/powerpc/configs/ppc64_defconfig | 9 +++--
 1 file changed, 3 insertions(+), 6 deletions(-)

diff --git a/arch/powerpc/configs/ppc64_defconfig 
b/arch/powerpc/configs/ppc64_defconfig
index b041fb6..0fcab20 100644
--- a/arch/powerpc/configs/ppc64_defconfig
+++ b/arch/powerpc/configs/ppc64_defconfig
@@ -83,12 +83,6 @@ CONFIG_BLK_DEV_NBD=m
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=65536
 CONFIG_VIRTIO_BLK=m
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDECD=y
-CONFIG_BLK_DEV_GENERIC=y
-CONFIG_BLK_DEV_AMD74XX=y
-CONFIG_BLK_DEV_IDE_PMAC=y
-CONFIG_BLK_DEV_IDE_PMAC_ATA100FIRST=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_CHR_DEV_ST=y
 CONFIG_BLK_DEV_SR=y
@@ -118,6 +112,9 @@ CONFIG_SATA_AHCI=y
 CONFIG_SATA_SIL24=y
 CONFIG_SATA_MV=y
 CONFIG_SATA_SVW=y
+CONFIG_PATA_AMD=y
+CONFIG_PATA_MACIO=y
+CONFIG_ATA_GENERIC=y
 CONFIG_MD=y
 CONFIG_BLK_DEV_MD=y
 CONFIG_MD_LINEAR=y
-- 
1.9.1

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[RFT PATCH] powerpc: convert ppc6xx_defconfig to use libata PATA drivers

IDE subsystem has been deprecated since 2009 and the majority
(if not all) of Linux distributions have switched to use
libata for ATA support exclusively.  However there are still
some users (mostly old or/and embedded non-x86 systems) that
have not converted from using IDE subsystem to libata PATA
drivers.  This doesn't seem to be good thing in the long-term
for Linux as while there is less and less PATA systems left
in use:

* testing efforts are divided between two subsystems

* having duplicate drivers for same hardware confuses users

This patch converts ppc6xx_defconfig to use libata PATA
drivers.

Signed-off-by: Bartlomiej Zolnierkiewicz 
---
Build tested only.
If you have affected hardware please test.  Thank you.

 arch/powerpc/configs/ppc6xx_defconfig | 10 ++
 1 file changed, 2 insertions(+), 8 deletions(-)

diff --git a/arch/powerpc/configs/ppc6xx_defconfig 
b/arch/powerpc/configs/ppc6xx_defconfig
index e5d2c3d..0d93067 100644
--- a/arch/powerpc/configs/ppc6xx_defconfig
+++ b/arch/powerpc/configs/ppc6xx_defconfig
@@ -378,13 +378,6 @@ CONFIG_EEPROM_AT24=m
 CONFIG_EEPROM_LEGACY=m
 CONFIG_EEPROM_MAX6875=m
 CONFIG_EEPROM_93CX6=m
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDECD=m
-CONFIG_IDE_TASK_IOCTL=y
-# CONFIG_IDEPCI_PCIBUS_ORDER is not set
-CONFIG_BLK_DEV_GENERIC=y
-CONFIG_BLK_DEV_IDE_PMAC=y
-CONFIG_BLK_DEV_IDE_PMAC_ATA100FIRST=y
 CONFIG_RAID_ATTRS=m
 CONFIG_BLK_DEV_SD=y
 CONFIG_CHR_DEV_ST=m
@@ -411,13 +404,14 @@ CONFIG_ATA=y
 CONFIG_SATA_FSL=m
 CONFIG_PDC_ADMA=m
 CONFIG_ATA_PIIX=m
+CONFIG_PATA_MACIO=y
 CONFIG_PATA_MPC52xx=m
 CONFIG_PATA_OPTIDMA=m
 CONFIG_PATA_SCH=m
 CONFIG_PATA_VIA=m
 CONFIG_PATA_PLATFORM=m
 CONFIG_PATA_OF_PLATFORM=m
-CONFIG_ATA_GENERIC=m
+CONFIG_ATA_GENERIC=y
 CONFIG_MD=y
 CONFIG_BLK_DEV_MD=y
 CONFIG_MD_LINEAR=m
-- 
1.9.1

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[RFT PATCH] powerpc/85xx: convert tqm8560_defconfig to use libata PATA drivers

IDE subsystem has been deprecated since 2009 and the majority
(if not all) of Linux distributions have switched to use
libata for ATA support exclusively.  However there are still
some users (mostly old or/and embedded non-x86 systems) that
have not converted from using IDE subsystem to libata PATA
drivers.  This doesn't seem to be good thing in the long-term
for Linux as while there is less and less PATA systems left
in use:

* testing efforts are divided between two subsystems

* having duplicate drivers for same hardware confuses users

This patch converts tqm8560_defconfig to use libata PATA
drivers.

Cc: Scott Wood 
Cc: Kumar Gala 
Signed-off-by: Bartlomiej Zolnierkiewicz 
---
Build tested only.
If you have affected hardware please test.  Thank you.

 arch/powerpc/configs/85xx/tqm8560_defconfig | 7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/configs/85xx/tqm8560_defconfig 
b/arch/powerpc/configs/85xx/tqm8560_defconfig
index 633d5b7..daa6842 100644
--- a/arch/powerpc/configs/85xx/tqm8560_defconfig
+++ b/arch/powerpc/configs/85xx/tqm8560_defconfig
@@ -30,9 +30,10 @@ CONFIG_MTD_CFI_AMDSTD=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=32768
-CONFIG_IDE=y
-CONFIG_BLK_DEV_GENERIC=y
-CONFIG_BLK_DEV_VIA82CXXX=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_ATA=y
+CONFIG_PATA_VIA=y
+CONFIG_ATA_GENERIC=y
 CONFIG_NETDEVICES=y
 CONFIG_GIANFAR=y
 CONFIG_E100=y
-- 
1.9.1

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[RFT PATCH] powerpc: convert cell_defconfig to use libata PATA drivers

IDE subsystem has been deprecated since 2009 and the majority
(if not all) of Linux distributions have switched to use
libata for ATA support exclusively.  However there are still
some users (mostly old or/and embedded non-x86 systems) that
have not converted from using IDE subsystem to libata PATA
drivers.  This doesn't seem to be good thing in the long-term
for Linux as while there is less and less PATA systems left
in use:

* testing efforts are divided between two subsystems

* having duplicate drivers for same hardware confuses users

This patch converts cell_defconfig to use libata PATA drivers.

Signed-off-by: Bartlomiej Zolnierkiewicz 
---
Build tested only.
If you have affected hardware please test.  Thank you.

 arch/powerpc/configs/cell_defconfig | 7 +++
 1 file changed, 3 insertions(+), 4 deletions(-)

diff --git a/arch/powerpc/configs/cell_defconfig 
b/arch/powerpc/configs/cell_defconfig
index db328e6..679edaa 100644
--- a/arch/powerpc/configs/cell_defconfig
+++ b/arch/powerpc/configs/cell_defconfig
@@ -108,16 +108,15 @@ CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=131072
-CONFIG_IDE=y
-CONFIG_BLK_DEV_GENERIC=y
-CONFIG_BLK_DEV_AEC62XX=y
-CONFIG_BLK_DEV_SIIMAGE=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_BLK_DEV_SR=m
 CONFIG_CHR_DEV_SG=y
 CONFIG_ATA=y
 CONFIG_SATA_PROMISE=y
+CONFIG_PATA_ARTOP=y
 CONFIG_PATA_PDC2027X=m
+CONFIG_PATA_SIL680=y
+CONFIG_ATA_GENERIC=y
 CONFIG_MD=y
 CONFIG_BLK_DEV_MD=m
 CONFIG_MD_LINEAR=m
-- 
1.9.1

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Re: [PATCH v8 0/6] cpufreq: powernv: Redesign the presentation of throttle notification and solve bug-fixes in the driver

2016-02-03 Thread Shilpasri G Bhat

Hi Rafael,

On 02/03/2016 07:10 PM, Rafael J. Wysocki wrote:
> Hi,
> 
> On Tue, Feb 2, 2016 at 8:41 PM, Shilpasri G Bhat
>  wrote:
>> In POWER8, OCC(On-Chip-Controller) can throttle the frequency of the
>> CPU when the chip crosses its thermal and power limits. Currently,
>> powernv-cpufreq driver detects and reports this event as a console
>> message. Some machines may not sustain the max turbo frequency in all
>> conditions and can be throttled frequently. This can lead to the
>> flooding of console with throttle messages. So this patchset aims to
>> redesign the presentation of this event via sysfs counters and
>> tracepoints. And it also fixes couple of bugs reported in the driver.
>>
>> - Patch [1] fixes a memory leak bug
>> - Patch [2] fixes the cpu hot-plug bug in powernv_cpufreq_work_fn().
>> - Patch [3] solves a bug in powernv_cpufreq_throttle_check(), which
>>   calls in to cpu_to_chip_id() in hot path which reads DT every time
>>   to find the chip id.
>> - Patches [4] to [6] will add a perf trace point
>>   "power:powernv_throttle" and sysfs throttle counter stats in
>>   /sys/devices/system/cpu/cpufreq/chipN.
>>
>> Changes from v7:
>> - Changes in patch[6] involves adding a table to represent the
>>   throtle stats in frequency X reason layout. Detailed version log
>>   in the patch.
>>
>> Changes from v6:
>> - Changes wrt comments from Balbir Singh and Viresh Kumar. Details in
>>   the version log of the patches.
>>
>> Changes from v5:
>> - Fix kbuild error:
>> drivers/cpufreq/powernv-cpufreq.c:428:2: error: implicit declaration of
>> function 'get_online_cpus' [-Werror=implicit-function-declaration]
>>
>> Changes from v4:
>> - Fix a hot-plug bug in powernv_cpufreq_work_fn()
>> - Changes wrt Gautham's and Shreyas's comments
>>
>> Changes from v3:
>> - Add a fix to replace cpu_to_chip_id() with simpler PIR shift to
>>   obtain the chip id.
>> - Break patch2 in to two patches separating the tracepoint and sysfs
>>   attribute changes.
>>
>> Changes from v2:
>> - Fixed kbuild test warning.
>> drivers/cpufreq/powernv-cpufreq.c:609:2: warning: ignoring return
>> value of 'kstrtoint', declared with attribute warn_unused_result
>> [-Wunused-result]
>> Shilpasri G Bhat (6):
>>   cpufre: powernv: Free 'chips' on module exit
>>   cpufreq: powernv: Hot-plug safe the kworker thread
>>   cpufreq: powernv: Remove cpu_to_chip_id() from hot-path
>>   cpufreq: powernv/tracing: Add powernv_throttle tracepoint
>>   cpufreq: powernv: Replace pr_info with trace print for throttle event
>>   cpufreq: powernv: Add sysfs attributes to show throttle stats
> 
> It looks like patches [1-5/6] are not objectionable and I can apply
> them without the last one if you want me to.
> 

Yes please apply Patch[1-5]. Thanks.

Regards,
Shilpa

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[PATCH 3/3] perf probe: Search both .eh_frame and .debug_frame sections for probe location

2016-02-03 Thread Arnaldo Carvalho de Melo

From: Hemant Kumar 

'perf probe' through debuginfo__find_probes() in util/probe-finder.c
checks for the functions' frame descriptions in either .eh_frame section
of an ELF or the .debug_frame.

The check is based on whether either one of these sections is present.
Depending on distro, toolchain defaults, architetcutre, build flags,
etc., CFI might be found in either .eh_frame and/or .debug_frame.
Sometimes, it may happen that, .eh_frame, even if present, may not be
complete and may miss some descriptions.

Therefore, to be sure, to find the CFI covering an address we will
always have to investigate both if available.

For e.g., in powerpc, this may happen:
  $ gcc -g bin.c -o bin

  $ objdump --dwarf ./bin
  <1><145>: Abbrev Number: 7 (DW_TAG_subprogram)
 <146> DW_AT_external   : 1
 <146> DW_AT_name   : (indirect string, offset: 0x9e): main
 <14a> DW_AT_decl_file  : 1
 <14b> DW_AT_decl_line  : 39
 <14c> DW_AT_prototyped : 1
 <14c> DW_AT_type   : <0x57>
 <150> DW_AT_low_pc : 0x17b8

If the .eh_frame and .debug_frame are checked for the same binary, we
will find that, .eh_frame (although present) doesn't contain a
description for "main" function.

But, .debug_frame has a description:

  00d8 0024  FDE cie= pc=17b8..1838
DW_CFA_advance_loc: 16 to 17c8
DW_CFA_def_cfa_offset: 144
DW_CFA_offset_extended_sf: r65 at cfa+16
  ...

Due to this (since, perf checks whether .eh_frame is present and goes on
searching for that address inside that frame), perf is unable to process
the probes:

  # perf probe -x ./bin main
Failed to get call frame on 0x17b8
Error: Failed to add events.

To avoid this issue, we need to check both the sections (.eh_frame and
.debug_frame), which is done in this patch.

Note that, we can always force everything into both .eh_frame and
.debug_frame by:

  $ gcc bin.c -fasynchronous-unwind-tables  -fno-dwarf2-cfi-asm -g -o bin

Signed-off-by: Hemant Kumar 
Acked-by: Masami Hiramatsu 
Cc: linuxppc-dev@lists.ozlabs.org
Cc: Mark Wielaard 
Cc: Naveen N. Rao 
Cc: Srikar Dronamraju 
Link: 
http://lkml.kernel.org/r/1454426806-13974-1-git-send-email-hem...@linux.vnet.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo 
---
 tools/perf/util/probe-finder.c | 62 +-
 tools/perf/util/probe-finder.h |  5 +++-
 2 files changed, 41 insertions(+), 26 deletions(-)

diff --git a/tools/perf/util/probe-finder.c b/tools/perf/util/probe-finder.c
index 2be10fb27172..4ce5c5e18f48 100644
--- a/tools/perf/util/probe-finder.c
+++ b/tools/perf/util/probe-finder.c
@@ -686,8 +686,9 @@ static int call_probe_finder(Dwarf_Die *sc_die, struct 
probe_finder *pf)
pf->fb_ops = NULL;
 #if _ELFUTILS_PREREQ(0, 142)
} else if (nops == 1 && pf->fb_ops[0].atom == DW_OP_call_frame_cfa &&
-  pf->cfi != NULL) {
-   if (dwarf_cfi_addrframe(pf->cfi, pf->addr, ) != 0 ||
+  (pf->cfi_eh != NULL || pf->cfi_dbg != NULL)) {
+   if ((dwarf_cfi_addrframe(pf->cfi_eh, pf->addr, ) != 0 &&
+(dwarf_cfi_addrframe(pf->cfi_dbg, pf->addr, ) != 0)) 
||
dwarf_frame_cfa(frame, >fb_ops, ) != 0) {
pr_warning("Failed to get call frame on 0x%jx\n",
   (uintmax_t)pf->addr);
@@ -1015,8 +1016,7 @@ static int pubname_search_cb(Dwarf *dbg, Dwarf_Global 
*gl, void *data)
return DWARF_CB_OK;
 }
 
-/* Find probe points from debuginfo */
-static int debuginfo__find_probes(struct debuginfo *dbg,
+static int debuginfo__find_probe_location(struct debuginfo *dbg,
  struct probe_finder *pf)
 {
struct perf_probe_point *pp = >pev->point;
@@ -1025,27 +1025,6 @@ static int debuginfo__find_probes(struct debuginfo *dbg,
Dwarf_Die *diep;
int ret = 0;
 
-#if _ELFUTILS_PREREQ(0, 142)
-   Elf *elf;
-   GElf_Ehdr ehdr;
-   GElf_Shdr shdr;
-
-   /* Get the call frame information from this dwarf */
-   elf = dwarf_getelf(dbg->dbg);
-   if (elf == NULL)
-   return -EINVAL;
-
-   if (gelf_getehdr(elf, ) == NULL)
-   return -EINVAL;
-
-   if (elf_section_by_name(elf, , , ".eh_frame", NULL) &&
-   shdr.sh_type == SHT_PROGBITS) {
-   pf->cfi = dwarf_getcfi_elf(elf);
-   } else {
-   pf->cfi = dwarf_getcfi(dbg->dbg);
-   }
-#endif
-
off = 0;
pf->lcache = intlist__new(NULL);
if (!pf->lcache)
@@ -1108,6 +1087,39 @@ found:
return ret;
 }
 
+/* Find probe points from debuginfo */
+static int debuginfo__find_probes(struct debuginfo *dbg,
+ struct probe_finder *pf)
+{
+   int ret = 0;
+
+#if

[PATCH v5 09/23] powerpc/8xx: CONFIG_PIN_TLB unneeded for CONFIG_PPC_EARLY_DEBUG_CPM

IMMR is now mapped by page tables so it is not
anymore necessary to PIN TLBs

Signed-off-by: Christophe Leroy 
---
v2: no change
v3: no change
v4: no change
v5: no change

 arch/powerpc/Kconfig.debug | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug
index 638f9ce..136b09c 100644
--- a/arch/powerpc/Kconfig.debug
+++ b/arch/powerpc/Kconfig.debug
@@ -220,7 +220,6 @@ config PPC_EARLY_DEBUG_40x
 config PPC_EARLY_DEBUG_CPM
bool "Early serial debugging for Freescale CPM-based serial ports"
depends on SERIAL_CPM
-   select PIN_TLB if PPC_8xx
help
  Select this to enable early debugging for Freescale chips
  using a CPM-based serial port.  This assumes that the bootwrapper
-- 
2.1.0

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[PATCH v5 12/23] powerpc32: remove ioremap_base

ioremap_base is not initialised and is nowhere used so remove it

Signed-off-by: Christophe Leroy 
---
v2: no change
v3: fix comment as well
v4: no change
v5: no change

 arch/powerpc/include/asm/nohash/32/pgtable.h |  2 +-
 arch/powerpc/mm/mmu_decl.h   |  1 -
 arch/powerpc/mm/pgtable_32.c |  3 +--
 arch/powerpc/platforms/embedded6xx/mpc10x.h  | 10 --
 4 files changed, 2 insertions(+), 14 deletions(-)

diff --git a/arch/powerpc/include/asm/nohash/32/pgtable.h 
b/arch/powerpc/include/asm/nohash/32/pgtable.h
index e201600..7808475 100644
--- a/arch/powerpc/include/asm/nohash/32/pgtable.h
+++ b/arch/powerpc/include/asm/nohash/32/pgtable.h
@@ -86,7 +86,7 @@ extern int icache_44x_need_flush;
  * We no longer map larger than phys RAM with the BATs so we don't have
  * to worry about the VMALLOC_OFFSET causing problems.  We do have to worry
  * about clashes between our early calls to ioremap() that start growing down
- * from ioremap_base being run into the VM area allocations (growing upwards
+ * from IOREMAP_TOP being run into the VM area allocations (growing upwards
  * from VMALLOC_START).  For this reason we have ioremap_bot to check when
  * we actually run into our mappings setup in the early boot with the VM
  * system.  This really does become a problem for machines with good amounts
diff --git a/arch/powerpc/mm/mmu_decl.h b/arch/powerpc/mm/mmu_decl.h
index 3872332..53564a3 100644
--- a/arch/powerpc/mm/mmu_decl.h
+++ b/arch/powerpc/mm/mmu_decl.h
@@ -100,7 +100,6 @@ extern void setbat(int index, unsigned long virt, 
phys_addr_t phys,
 
 extern int __map_without_bats;
 extern int __allow_ioremap_reserved;
-extern unsigned long ioremap_base;
 extern unsigned int rtas_data, rtas_size;
 
 struct hash_pte;
diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
index db0d35e..815ccd7 100644
--- a/arch/powerpc/mm/pgtable_32.c
+++ b/arch/powerpc/mm/pgtable_32.c
@@ -37,7 +37,6 @@
 
 #include "mmu_decl.h"
 
-unsigned long ioremap_base;
 unsigned long ioremap_bot;
 EXPORT_SYMBOL(ioremap_bot);/* aka VMALLOC_END */
 
@@ -173,7 +172,7 @@ __ioremap_caller(phys_addr_t addr, unsigned long size, 
unsigned long flags,
/*
 * Choose an address to map it to.
 * Once the vmalloc system is running, we use it.
-* Before then, we use space going down from ioremap_base
+* Before then, we use space going down from IOREMAP_TOP
 * (ioremap_bot records where we're up to).
 */
p = addr & PAGE_MASK;
diff --git a/arch/powerpc/platforms/embedded6xx/mpc10x.h 
b/arch/powerpc/platforms/embedded6xx/mpc10x.h
index b290b63..5ad1202 100644
--- a/arch/powerpc/platforms/embedded6xx/mpc10x.h
+++ b/arch/powerpc/platforms/embedded6xx/mpc10x.h
@@ -24,13 +24,11 @@
  *   Processor: 0x8000 - 0x807f -> PCI I/O: 0x - 0x007f
  *   Processor: 0xc000 - 0xdfff -> PCI MEM: 0x - 0x1fff
  *   PCI MEM:   0x8000 -> Processor System Memory: 0x
- *   EUMB mapped to: ioremap_base - 0x0010 (ioremap_base - 1 MB)
  *
  * MAP B (CHRP Map)
  *   Processor: 0xfe00 - 0xfebf -> PCI I/O: 0x - 0x00bf
  *   Processor: 0x8000 - 0xbfff -> PCI MEM: 0x8000 - 0xbfff
  *   PCI MEM:   0x -> Processor System Memory: 0x
- *   EUMB mapped to: ioremap_base - 0x0010 (ioremap_base - 1 MB)
  */
 
 /*
@@ -138,14 +136,6 @@
 #define MPC10X_EUMB_WP_OFFSET  0x000ff000 /* Data path diagnostic, 
watchpoint reg offset */
 #define MPC10X_EUMB_WP_SIZE0x1000 /* Data path diagnostic, 
watchpoint reg size */
 
-/*
- * Define some recommended places to put the EUMB regs.
- * For both maps, recommend putting the EUMB from 0xeff0 to 0xefff.
- */
-extern unsigned long   ioremap_base;
-#defineMPC10X_MAPA_EUMB_BASE   (ioremap_base - 
MPC10X_EUMB_SIZE)
-#defineMPC10X_MAPB_EUMB_BASE   MPC10X_MAPA_EUMB_BASE
-
 enum ppc_sys_devices {
MPC10X_IIC1,
MPC10X_DMA0,
-- 
2.1.0

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[PATCH v5 19/23] powerpc32: Remove clear_pages() and define clear_page() inline

clear_pages() is never used expect by clear_page, and PPC32 is the
only architecture (still) having this function. Neither PPC64 nor
any other architecture has it.

This patch removes clear_pages() and moves clear_page() function
inline (same as PPC64) as it only is a few isns

Signed-off-by: Christophe Leroy 
---
v2: no change
v3: no change
v4: no change
v5: no change

 arch/powerpc/include/asm/page_32.h | 17 ++---
 arch/powerpc/kernel/misc_32.S  | 16 
 arch/powerpc/kernel/ppc_ksyms_32.c |  1 -
 3 files changed, 14 insertions(+), 20 deletions(-)

diff --git a/arch/powerpc/include/asm/page_32.h 
b/arch/powerpc/include/asm/page_32.h
index 68d73b2..6a8e179 100644
--- a/arch/powerpc/include/asm/page_32.h
+++ b/arch/powerpc/include/asm/page_32.h
@@ -1,6 +1,8 @@
 #ifndef _ASM_POWERPC_PAGE_32_H
 #define _ASM_POWERPC_PAGE_32_H
 
+#include 
+
 #if defined(CONFIG_PHYSICAL_ALIGN) && (CONFIG_PHYSICAL_START != 0)
 #if (CONFIG_PHYSICAL_START % CONFIG_PHYSICAL_ALIGN) != 0
 #error "CONFIG_PHYSICAL_START must be a multiple of CONFIG_PHYSICAL_ALIGN"
@@ -36,9 +38,18 @@ typedef unsigned long long pte_basic_t;
 typedef unsigned long pte_basic_t;
 #endif
 
-struct page;
-extern void clear_pages(void *page, int order);
-static inline void clear_page(void *page) { clear_pages(page, 0); }
+/*
+ * Clear page using the dcbz instruction, which doesn't cause any
+ * memory traffic (except to write out any cache lines which get
+ * displaced).  This only works on cacheable memory.
+ */
+static inline void clear_page(void *addr)
+{
+   unsigned int i;
+
+   for (i = 0; i < PAGE_SIZE / L1_CACHE_BYTES; i++, addr += L1_CACHE_BYTES)
+   dcbz(addr);
+}
 extern void copy_page(void *to, void *from);
 
 #include 
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
index 7d1284f..181afc1 100644
--- a/arch/powerpc/kernel/misc_32.S
+++ b/arch/powerpc/kernel/misc_32.S
@@ -517,22 +517,6 @@ END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)
 #endif /* CONFIG_BOOKE */
 
 /*
- * Clear pages using the dcbz instruction, which doesn't cause any
- * memory traffic (except to write out any cache lines which get
- * displaced).  This only works on cacheable memory.
- *
- * void clear_pages(void *page, int order) ;
- */
-_GLOBAL(clear_pages)
-   li  r0,PAGE_SIZE/L1_CACHE_BYTES
-   slw r0,r0,r4
-   mtctr   r0
-1: dcbz0,r3
-   addir3,r3,L1_CACHE_BYTES
-   bdnz1b
-   blr
-
-/*
  * Copy a whole page.  We use the dcbz instruction on the destination
  * to reduce memory traffic (it eliminates the unnecessary reads of
  * the destination into cache).  This requires that the destination
diff --git a/arch/powerpc/kernel/ppc_ksyms_32.c 
b/arch/powerpc/kernel/ppc_ksyms_32.c
index 30ddd8a..2bfaafe 100644
--- a/arch/powerpc/kernel/ppc_ksyms_32.c
+++ b/arch/powerpc/kernel/ppc_ksyms_32.c
@@ -10,7 +10,6 @@
 #include 
 #include 
 
-EXPORT_SYMBOL(clear_pages);
 EXPORT_SYMBOL(ISA_DMA_THRESHOLD);
 EXPORT_SYMBOL(DMA_MODE_READ);
 EXPORT_SYMBOL(DMA_MODE_WRITE);
-- 
2.1.0

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[PATCH 0/6] ibmvscsi: code cleanup

Fixed up a couple spots that were out of line with the PAPR in regards
to its defined VSCSI protocol. Did away with some magic numbers directly
in the code. Fixed a minor endian issue.

Tyrel Datwyler (6):
  ibmvscsi: Correct values for several viosrp_crq_format enums
  ibmvscsi: Add and use enums for valid CRQ header values
  ibmvscsi: Replace magic values in set_adpater_info() with defines
  ibmvscsi: Use of_root to access OF device tree root node
  ibmvscsi: Remove unsupported host config MAD and sysfs interface
  ibmvscsi: Add endian conversions to sysfs attribute show functions

 drivers/scsi/ibmvscsi/ibmvscsi.c | 117 +++
 drivers/scsi/ibmvscsi/viosrp.h   |  20 ---
 2 files changed, 30 insertions(+), 107 deletions(-)

-- 
2.5.0

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Re: [PATCH 2/2] powerpc/pseries: Check if EEH is enabled on DDW mechanism code

2016-02-03 Thread Gavin Shan

On Wed, Feb 03, 2016 at 10:26:36AM -0200, Guilherme G. Piccoli wrote:
>On 02/02/2016 09:48 PM, Gavin Shan wrote:
>>On Tue, Jan 19, 2016 at 06:18:20PM -0200, Guilherme G. Piccoli wrote:
>>>-/* only attempt to use a new window if 64-bit DMA is requested */
>>>-if (!disable_ddw && dma_mask == DMA_BIT_MASK(64)) {
>>>+/* We should check if EEH is enabled here, since DDW mechanism has
>>>+ * an intrinsic dependency of EEH config addr information. Also, we
>>>+ * only attempt to use a new window if 64-bit DMA is requested */
>>>+if (eeh_enabled() && !disable_ddw && dma_mask == DMA_BIT_MASK(64)) {
>>> dn = pci_device_to_OF_node(pdev);
>>> dev_dbg(dev, "node is %s\n", dn->full_name);
>>>
>>
>>There are two types of addresses: (1) PCI config address (2) PE config 
>>address.
>>(1) is used to indentify one PCI device which is included in the PE. (2) is 
>>the
>>PCI config address of PE's primary bus in pHyp. Both of them can be used to 
>>identify
>>the PE. It means the (1) PCI config address, which is retrieved from pci_dn, 
>>can be
>>passed to hypervisor. Then we don't have to disable DDW when EEH is disabled.
>>
>>Guilherme, did you hit the crash on pHyp or PowerKVM?
>
>Gavin, thanks very much for the clarification. So, we can interchange
>edev->config_addr with pdn->pci_ext_config_space ?
>This would solve the issue with DDW being enabled when EEH is not.
>
>I hit the issue on PowerVM (PHyp). I wasn't able to perform hotplug in qemu
>that time I was testing this - I can re-test on qemu. Can we use pci_dn
>config address in qemu guest too?
>

On PowerKVM, QEMU can't recognize (1). pHyp is expected to support both
of them. Please have a try with (1) when eeh_enabled() returns false.
The address (1) can be retrieved from pci_dn as below:

(pdn->busno << 8) | (pdn->devfn)

Thanks,
Gavin

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Re: [PATCH 1/2] powerpc/eeh: Check for EEH availability in eeh_add_device_early()

2016-02-03 Thread Gavin Shan

On Wed, Feb 03, 2016 at 09:54:51AM -0200, Guilherme G. Piccoli wrote:
>On 02/02/2016 08:44 PM, Gavin Shan wrote:
>>>/**
>>>+ * eeh_available - Checks for the availability of EEH based on running
>>>+ * architecture.
>>>+ *
>>>+ * This routine should be used in case we need to check if EEH is
>>>+ * available in some situation, regardless if EEH is enabled or not.
>>>+ * For example, if we hotplug-add a PCI device on a machine with no
>>>+ * other PCI device, EEH won't be enabled, yet it's available if the
>>>+ * arch supports it.
>>>+ */
>>>+static inline bool eeh_available(void)
>>>+{
>>>+if (machine_is(pseries) || machine_is(powernv))
>>>+return true;
>>>+return false;
>>>+}
>>>+
>>
>>As I was told by somebody else before, the comments for static function
>>needn't to be exported.
>>
>
>Thanks for the advice Gavin, but I didn't get it. What means comments not
>being exported? For sure I can change the comment if desired, but I can't see
>any issue with it.
>

The comments in "/** ... */" can be exposed to readable document by makefile.
I think it's necessary to have it for a static function :-)

>>>+/**
>>>  * eeh_add_device_early - Enable EEH for the indicated device node
>>>  * @pdn: PCI device node for which to set up EEH
>>>  *
>>>@@ -1072,7 +1089,7 @@ void eeh_add_device_early(struct pci_dn *pdn)
>>> struct pci_controller *phb;
>>> struct eeh_dev *edev = pdn_to_eeh_dev(pdn);
>>>
>>>-if (!edev || !eeh_enabled())
>>>+if (!edev || !eeh_available())
>>> return;
>>>
>>> if (!eeh_has_flag(EEH_PROBE_MODE_DEVTREE))
>>
>>The change here seems not correct enough. Before the changes, 
>>eeh_add_device_early()
>>does nothing if EEH is disabled on pSeries. With the changes applied, the EEH 
>>device
>>(edev) will be scanned even EEH is disabled on pSeries.
>>
>> From the code changes, I didn't figure out the real problem you try to fix. 
>> Cell
>>platform doesn't have flag EEH_PROBE_MODE_DEVTREE. So the function does 
>>nothing
>>on Cell platform except calling into pdn_to_eeh_dev(). I'm not sure if the 
>>kernel
>>crashed in pdn_to_eeh_dev() on Cell platform?
>
>Gavin, thanks for the comments. Seems your commit d91dafc02f4 ("powerpc/eeh:
>Delay probing EEH device during hotplug") solved the problem with Cell arch.
>Notice that Michael pointed the issue with Cell and fixed it by commit
>89a51df5ab1d ("powerpc/eeh: Fix crash in eeh_add_device_early() on Cell").
>
>But you commit is recent than Michael's and since it adds the check for
>EEH_PROBE_MODE_DEVTREE, the Cell crash doesn't happen anymore. It's my bad, I
>should have checked the dates of commits to figure your commit is recent than
>Michael's one.
>
>Anyway, the modification proposed by this patch is useless if we revert
>Michael's commit then. Gavin and Michael, are you OK if I revert it?
>
>The reason for the revert is that we can't check for eeh_enabled() here -
>imagine the following scenario: we boot a machine with no PCI device, then,
>we hotplug-add a PCI device. When we reach eeh_add_device_early(), the
>function eeh_enabled() is false because at boot time we had no PCI devices so
>EEH is not initialized/enabled.
>

Yeah, eeh_enabled() returns false and we don't have EEH_PROBE_MODE_DEVTREE on 
Cell
platform. That means those two checks are duplicated. I think eeh_enabled() 
check
can be removed if it really helps to avoid the crash.

Thanks,
Gavin

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[PATCH] powerpc/83xx: disable IDE subsystem in mpc834x_itx_defconfig

This patch disables deprecated IDE subsystem in mpc834x_itx_defconfig
(no IDE host drivers are selected in this config so there is no valid
reason to enable IDE subsystem itself).

Cc: Scott Wood 
Cc: Kumar Gala 
Signed-off-by: Bartlomiej Zolnierkiewicz 
---
 arch/powerpc/configs/83xx/mpc834x_itx_defconfig | 1 -
 1 file changed, 1 deletion(-)

diff --git a/arch/powerpc/configs/83xx/mpc834x_itx_defconfig 
b/arch/powerpc/configs/83xx/mpc834x_itx_defconfig
index 2a5fdcb..87fc15b 100644
--- a/arch/powerpc/configs/83xx/mpc834x_itx_defconfig
+++ b/arch/powerpc/configs/83xx/mpc834x_itx_defconfig
@@ -35,7 +35,6 @@ CONFIG_MTD_PHYSMAP=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=32768
-CONFIG_IDE=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_CHR_DEV_SG=y
 CONFIG_SCSI_SPI_ATTRS=y
-- 
1.9.1

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[RFT PATCH] powerpc/85xx: convert tqm8541_defconfig to use libata PATA drivers

IDE subsystem has been deprecated since 2009 and the majority
(if not all) of Linux distributions have switched to use
libata for ATA support exclusively.  However there are still
some users (mostly old or/and embedded non-x86 systems) that
have not converted from using IDE subsystem to libata PATA
drivers.  This doesn't seem to be good thing in the long-term
for Linux as while there is less and less PATA systems left
in use:

* testing efforts are divided between two subsystems

* having duplicate drivers for same hardware confuses users

This patch converts tqm8541_defconfig to use libata PATA
drivers.

Cc: Scott Wood 
Cc: Kumar Gala 
Signed-off-by: Bartlomiej Zolnierkiewicz 
---
Build tested only.
If you have affected hardware please test.  Thank you.

 arch/powerpc/configs/85xx/tqm8541_defconfig | 7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/configs/85xx/tqm8541_defconfig 
b/arch/powerpc/configs/85xx/tqm8541_defconfig
index bb402b3..c9b0028 100644
--- a/arch/powerpc/configs/85xx/tqm8541_defconfig
+++ b/arch/powerpc/configs/85xx/tqm8541_defconfig
@@ -30,9 +30,10 @@ CONFIG_MTD_CFI_AMDSTD=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=32768
-CONFIG_IDE=y
-CONFIG_BLK_DEV_GENERIC=y
-CONFIG_BLK_DEV_VIA82CXXX=y
+CONFIG_BLK_DEV_SD=y
+CONFIG_ATA=y
+CONFIG_PATA_VIA=y
+CONFIG_ATA_GENERIC=y
 CONFIG_NETDEVICES=y
 CONFIG_GIANFAR=y
 CONFIG_E100=y
-- 
1.9.1

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[RFT PATCH] powerpc: convert amigaone_defconfig to use libata PATA drivers

IDE subsystem has been deprecated since 2009 and the majority
(if not all) of Linux distributions have switched to use
libata for ATA support exclusively.  However there are still
some users (mostly old or/and embedded non-x86 systems) that
have not converted from using IDE subsystem to libata PATA
drivers.  This doesn't seem to be good thing in the long-term
for Linux as while there is less and less PATA systems left
in use:

* testing efforts are divided between two subsystems

* having duplicate drivers for same hardware confuses users

This patch converts amigaone_defconfig to use libata PATA
drivers.

Signed-off-by: Bartlomiej Zolnierkiewicz 
---
Build tested only.
If you have affected hardware please test.  Thank you.

 arch/powerpc/configs/amigaone_defconfig | 10 --
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/arch/powerpc/configs/amigaone_defconfig 
b/arch/powerpc/configs/amigaone_defconfig
index 84f1b41..55a4929 100644
--- a/arch/powerpc/configs/amigaone_defconfig
+++ b/arch/powerpc/configs/amigaone_defconfig
@@ -46,12 +46,6 @@ CONFIG_PARPORT_PC_FIFO=y
 CONFIG_BLK_DEV_FD=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDECD=y
-# CONFIG_IDEPCI_PCIBUS_ORDER is not set
-CONFIG_BLK_DEV_GENERIC=y
-CONFIG_BLK_DEV_SIIMAGE=y
-CONFIG_BLK_DEV_VIA82CXXX=y
 CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_CHR_DEV_ST=y
@@ -62,6 +56,10 @@ CONFIG_SCSI_CONSTANTS=y
 CONFIG_SCSI_SYM53C8XX_2=y
 CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=0
 # CONFIG_SCSI_SYM53C8XX_MMIO is not set
+CONFIG_ATA=y
+CONFIG_PATA_SIL680=y
+CONFIG_PATA_VIA=y
+CONFIG_ATA_GENERIC=y
 CONFIG_NETDEVICES=y
 CONFIG_VORTEX=y
 CONFIG_8139CP=y
-- 
1.9.1

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[RFT PATCH] powerpc: convert g5_defconfig to use libata PATA drivers

IDE subsystem has been deprecated since 2009 and the majority
(if not all) of Linux distributions have switched to use
libata for ATA support exclusively.  However there are still
some users (mostly old or/and embedded non-x86 systems) that
have not converted from using IDE subsystem to libata PATA
drivers.  This doesn't seem to be good thing in the long-term
for Linux as while there is less and less PATA systems left
in use:

* testing efforts are divided between two subsystems

* having duplicate drivers for same hardware confuses users

This patch converts g5_defconfig to use libata PATA drivers.

Signed-off-by: Bartlomiej Zolnierkiewicz 
---
Build tested only.
If you have affected hardware please test.  Thank you.

 arch/powerpc/configs/g5_defconfig | 5 +
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/arch/powerpc/configs/g5_defconfig 
b/arch/powerpc/configs/g5_defconfig
index 1d9ad85..b7688c1 100644
--- a/arch/powerpc/configs/g5_defconfig
+++ b/arch/powerpc/configs/g5_defconfig
@@ -60,10 +60,6 @@ CONFIG_BLK_DEV_NBD=m
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=65536
 CONFIG_CDROM_PKTCDVD=m
-CONFIG_IDE=y
-CONFIG_BLK_DEV_IDECD=y
-CONFIG_BLK_DEV_IDE_PMAC=y
-CONFIG_BLK_DEV_IDE_PMAC_ATA100FIRST=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_CHR_DEV_ST=y
 CONFIG_BLK_DEV_SR=y
@@ -73,6 +69,7 @@ CONFIG_SCSI_CONSTANTS=y
 CONFIG_SCSI_SPI_ATTRS=y
 CONFIG_ATA=y
 CONFIG_SATA_SVW=y
+CONFIG_PATA_MACIO=y
 CONFIG_MD=y
 CONFIG_BLK_DEV_MD=y
 CONFIG_MD_LINEAR=y
-- 
1.9.1

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[RFT PATCH] powerpc: convert storcenter_defconfig to use libata PATA drivers

IDE subsystem has been deprecated since 2009 and the majority
(if not all) of Linux distributions have switched to use
libata for ATA support exclusively.  However there are still
some users (mostly old or/and embedded non-x86 systems) that
have not converted from using IDE subsystem to libata PATA
drivers.  This doesn't seem to be good thing in the long-term
for Linux as while there is less and less PATA systems left
in use:

* testing efforts are divided between two subsystems

* having duplicate drivers for same hardware confuses users

This patch converts storcenter_defconfig to use libata PATA
drivers.

Signed-off-by: Bartlomiej Zolnierkiewicz 
---
Build tested only.
If you have affected hardware please test.  Thank you.

 arch/powerpc/configs/storcenter_defconfig | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/arch/powerpc/configs/storcenter_defconfig 
b/arch/powerpc/configs/storcenter_defconfig
index b5db7df..adf7d26 100644
--- a/arch/powerpc/configs/storcenter_defconfig
+++ b/arch/powerpc/configs/storcenter_defconfig
@@ -37,12 +37,11 @@ CONFIG_NFTL_RW=y
 CONFIG_MTD_CFI=y
 CONFIG_MTD_CFI_AMDSTD=y
 CONFIG_MTD_PHYSMAP=y
-CONFIG_IDE=y
-CONFIG_BLK_DEV_VIA82CXXX=y
-CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_BLK_DEV_SR=y
 CONFIG_SCSI_SPI_ATTRS=y
+CONFIG_ATA=y
+CONFIG_PATA_VIA=y
 CONFIG_MD=y
 CONFIG_BLK_DEV_MD=y
 CONFIG_MD_LINEAR=y
-- 
1.9.1

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[RFT PATCH] powerpc: convert pseries_defconfig to use libata PATA drivers