David Gibson writes:
> On Mon, Jun 14, 2021 at 10:10:03PM +0530, Aneesh Kumar K.V wrote:
>> FORM2 introduce a concept of secondary domain which is identical to the
>> conceept of FORM1 primary domain. Use secondary domain as the numa node
>> when using persistent memory device. For DAX kmem use
In the numa=off kernel command-line configuration init_chip_info() loops
around the number of chips and attempts to copy the cpumask of that node
which is NULL for all iterations after the first chip.
Hence adding a check to bail out after the first initialization if there
is only one node.
David Gibson writes:
> On Mon, Jun 14, 2021 at 10:10:02PM +0530, Aneesh Kumar K.V wrote:
>> Signed-off-by: Daniel Henrique Barboza
>> Signed-off-by: Aneesh Kumar K.V
>> ---
>> Documentation/powerpc/associativity.rst | 139
>> arch/powerpc/include/asm/firmware.h |
Load Multiple Word (lmw) and Store Multiple Word (stmw) will raise an
Alignment Exception:
- Little Endian mode: always
- Big Endian mode: address not word aligned
These conditions do not depend on cache inhibited memory. Test the
alignment handler emulation of these instructions regardless
On Fri, Jun 11, 2021 at 09:07:43PM -0700, Ira Weiny wrote:
>
> More recently this was added:
>
> 7e34e0bbc644 crypto: omap-crypto - fix userspace copied buffer access
>
> I'm CC'ing Tero and Herbert to see why they added the SLAB check.
Probably because the generic Crypto API has the same
On Mon, Jun 14, 2021 at 2:16 PM Christoph Hellwig wrote:
>
> On Fri, Jun 11, 2021 at 11:26:46PM +0800, Claire Chang wrote:
> > + spin_lock_init(>lock);
> > + for (i = 0; i < mem->nslabs; i++) {
> > + mem->slots[i].list = IO_TLB_SEGSIZE - io_tlb_offset(i);
> > +
On Mon, Jun 14, 2021 at 10:10:01PM +0530, Aneesh Kumar K.V wrote:
> This helper is only used with the dispatch trace log collection.
> A later patch will add Form2 affinity support and this change helps
> in keeping that simpler. Also add a comment explaining we don't expect
> the code to be
On Mon, Jun 14, 2021 at 10:10:03PM +0530, Aneesh Kumar K.V wrote:
> FORM2 introduce a concept of secondary domain which is identical to the
> conceept of FORM1 primary domain. Use secondary domain as the numa node
> when using persistent memory device. For DAX kmem use the logical domain
> id
On Mon, Jun 14, 2021 at 10:10:02PM +0530, Aneesh Kumar K.V wrote:
> Signed-off-by: Daniel Henrique Barboza
> Signed-off-by: Aneesh Kumar K.V
> ---
> Documentation/powerpc/associativity.rst | 139
> arch/powerpc/include/asm/firmware.h | 3 +-
>
On Mon, Jun 14, 2021 at 10:09:58PM +0530, Aneesh Kumar K.V wrote:
> Also make related code cleanup that will allow adding FORM2_AFFINITY in
> later patches. No functional change in this patch.
>
> Signed-off-by: Aneesh Kumar K.V
Reviewed-by: David Gibson
> ---
>
On Mon, Jun 14, 2021 at 10:09:56PM +0530, Aneesh Kumar K.V wrote:
> No functional change in this patch.
I think this needs a rationale as to why 'primary_domain_index' is a
better name than 'min_common_depth'. The meaning isn't obvious to me
from either name.
>
> Signed-off-by: Aneesh Kumar
On Mon, Jun 14, 2021 at 10:09:59PM +0530, Aneesh Kumar K.V wrote:
> The associativity details of the newly added resourced are collected from
> the hypervisor via "ibm,configure-connector" rtas call. Update the numa
> distance details of the newly added numa node after the above call. In
> later
On Mon, Jun 14, 2021 at 10:09:57PM +0530, Aneesh Kumar K.V wrote:
> No functional change in this patch
As with 1/8 an explanation of what this actually means and therefore
why this is a better name would be very helpful.
>
> Signed-off-by: Aneesh Kumar K.V
> ---
> arch/powerpc/mm/numa.c | 20
> -Original Message-
> From: Joel Stanley
> Sent: Monday, June 14, 2021 8:52 PM
> To: Leo Li
> Cc: Felipe Balbi ; Greg Kroah-Hartman
> ; linux-...@vger.kernel.org; linuxppc-dev
> ; Linux Kernel Mailing List ker...@vger.kernel.org>; Arnd Bergmann ; Ran Wang
> ; Fabio Estevam
>
On Thu, May 20, 2021 at 11:50 PM Christophe Leroy
wrote:
>
> ppc_inst() ppc_inst_prefixed() ppc_inst_swab() can easily
> be made common to both PPC32 and PPC64.
>
> Signed-off-by: Christophe Leroy
> ---
> arch/powerpc/include/asm/inst.h | 49 +
> 1 file changed,
On Tue, Jun 15, 2021 at 12:01 PM Michael Ellerman wrote:
>
> Christophe Leroy writes:
> > diff --git a/arch/powerpc/include/asm/inst.h
> > b/arch/powerpc/include/asm/inst.h
> > index 5a0740ebf132..32d318c3b180 100644
> > --- a/arch/powerpc/include/asm/inst.h
> > +++
On Thu, May 20, 2021 at 11:50 PM Christophe Leroy
wrote:
>
> 'struct ppc_inst' is meant to represent an instruction internally, it
> is not meant to dereference code in memory.
>
> For testing code patching, use patch_instruction() to properly
> write into memory the code to be tested.
>
>
On Thu, May 20, 2021 at 11:50 PM Christophe Leroy
wrote:
>
> instr_is_branch_to_addr() is only used in code-patching.c
>
> Make it static.
>
> Signed-off-by: Christophe Leroy
> ---
> arch/powerpc/include/asm/code-patching.h | 1 -
> arch/powerpc/lib/code-patching.c | 18
On Thu, May 20, 2021 at 11:50 PM Christophe Leroy
wrote:
>
> 'struct ppc_inst' is an internal structure to represent an instruction,
> it is not directly the representation of that instruction in text code.
> It is not meant to map and dereference code.
>
> Dereferencing code directly through
On Thu, May 20, 2021 at 11:50 PM Christophe Leroy
wrote:
>
> Avoid casting/dereferencing ppc_inst() as u64* , check each member
> of the struct when relevant.
>
> And remove the 0xff initialisation of the suffix for non
> prefixed instruction. An instruction with 0xff as a suffix
> might be
Excerpts from Christophe Leroy's message of June 14, 2021 5:22 pm:
>
>
> Le 14/06/2021 à 07:55, Nicholas Piggin a écrit :
>> Excerpts from Christophe Leroy's message of June 14, 2021 3:31 pm:
>>>
>>>
>>> Le 14/06/2021 à 03:29, Nicholas Piggin a écrit :
Excerpts from Nicholas Piggin's
Nicholas Piggin writes:
> Excerpts from Nicholas Piggin's message of June 14, 2021 10:47 am:
>> Excerpts from Michael Ellerman's message of June 8, 2021 11:46 pm:
>>> In commit 96d7a4e06fab ("powerpc/signal64: Rewrite handle_rt_signal64()
>>> to minimise uaccess switches") the 64-bit signal code
Excerpts from Jessica Yu's message of June 14, 2021 10:06 pm:
> +++ Nicholas Piggin [11/06/21 19:39 +1000]:
>>The elf_check_arch() function is used to test usermode binaries, but
>>kernel modules may have more specific requirements. powerpc would like
>>to test for ABI version compatibility.
>>
Nicholas Piggin writes:
> Excerpts from Michael Ellerman's message of June 8, 2021 11:46 pm:
>> In commit 96d7a4e06fab ("powerpc/signal64: Rewrite handle_rt_signal64()
>> to minimise uaccess switches") the 64-bit signal code was rearranged to
>> use user_write_access_begin/end().
>>
>> As part
Christophe Leroy writes:
> diff --git a/arch/powerpc/include/asm/inst.h b/arch/powerpc/include/asm/inst.h
> index 5a0740ebf132..32d318c3b180 100644
> --- a/arch/powerpc/include/asm/inst.h
> +++ b/arch/powerpc/include/asm/inst.h
> @@ -139,7 +139,7 @@ static inline int ppc_inst_len(struct ppc_inst
ping
在 2021/6/1 16:53, Baokun Li 写道:
Fixes gcc '-Wunused-but-set-variable' warning:
arch/powerpc/platforms/cell/spider-pci.c: In function 'spiderpci_io_flush':
arch/powerpc/platforms/cell/spider-pci.c:28:6: warning:
variable ‘val’ set but not used [-Wunused-but-set-variable]
It never used
On Sat, 12 Jun 2021 at 00:31, Li Yang wrote:
>
> Commit a390bef7db1f ("usb: gadget: fsl_mxc_udc: Remove the driver")
> didn't remove all the MXC related stuff which can cause build problem
> for LS1021 when enabled again in Kconfig. This patch remove all the
> remnants.
>
> Signed-off-by: Li
Christophe Leroy writes:
> diff --git a/arch/powerpc/lib/feature-fixups.c
> b/arch/powerpc/lib/feature-fixups.c
> index fe26f2fa0f3f..f0fc521b82ae 100644
> --- a/arch/powerpc/lib/feature-fixups.c
> +++ b/arch/powerpc/lib/feature-fixups.c
> @@ -180,32 +180,31 @@ static void
[I'm hoping to get this in a subsequent merge window after we get the core
changes in. I know there are still a few outstanding review comments, I just
wanted to make sure that I supplied a real use-case for the core changes I'm
proposing.]
Implement a limited form of KASAN for Book3S 64-bit
kasan is already implied by the directory name, we don't need to
repeat it.
Suggested-by: Christophe Leroy
Signed-off-by: Daniel Axtens
---
arch/powerpc/mm/kasan/Makefile | 2 +-
arch/powerpc/mm/kasan/{kasan_init_32.c => init_32.c} | 0
2 files changed, 1 insertion(+), 1
KASAN is supported on 32-bit powerpc and the docs should reflect this.
Suggested-by: Christophe Leroy
Reviewed-by: Christophe Leroy
Signed-off-by: Daniel Axtens
---
Documentation/dev-tools/kasan.rst | 8 ++--
Documentation/powerpc/kasan.txt | 12
2 files changed, 18
powerpc has a variable number of PTRS_PER_*, set at runtime based
on the MMU that the kernel is booted under.
This means the PTRS_PER_* are no longer constants, and therefore
breaks the build.
Define default MAX_PTRS_PER_*s in the same style as MAX_PTRS_PER_P4D.
As KASAN is the only user at the
Allow architectures to define a kasan_arch_is_ready() hook that bails
out of any function that's about to touch the shadow unless the arch
says that it is ready for the memory to be accessed. This is fairly
uninvasive and should have a negligible performance penalty.
This will only work in
For annoying architectural reasons, it's very difficult to support inline
instrumentation on powerpc64.
Add a Kconfig flag to allow an arch to disable inline. (It's a bit
annoying to be 'backwards', but I'm not aware of any way to have
an arch force a symbol to be 'n', rather than 'y'.)
We also
Building on the work of Christophe, Aneesh and Balbir, I've ported
KASAN to 64-bit Book3S kernels running on the Radix MMU.
I've been trying this for a while, but we keep having collisions
between the kasan code in the mm tree and the code I want to put in to
the ppc tree. So my aim here is for
On 6/14/21 1:39 PM, Aneesh Kumar K.V wrote:
Form2 associativity adds a much more flexible NUMA topology layout
than what is provided by Form1. This also allows PAPR SCM device
to use better associativity when using the device as DAX KMEM
device. More details can be found in patch x
$ ndctl
Excerpts from Paul Mackerras's message of June 15, 2021 9:02 am:
> This is accessed using the DARN instruction and should probably be
> done more generically.
>
> Signed-off-by: Paul Mackerras
> ---
> arch/powerpc/include/asm/archrandom.h | 12 +-
>
It will cause null-ptr-deref if platform_get_resource_byname() returns NULL,
we need check the return value.
Signed-off-by: Yang Yingliang
---
sound/soc/fsl/fsl_xcvr.c | 4
1 file changed, 4 insertions(+)
diff --git a/sound/soc/fsl/fsl_xcvr.c b/sound/soc/fsl/fsl_xcvr.c
index
Use devm_platform_get_and_ioremap_resource() to simplify
code.
Signed-off-by: Yang Yingliang
---
sound/soc/fsl/fsl_sai.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
index 407a45e48eee..223fcd15bfcc 100644
---
Use devm_platform_get_and_ioremap_resource() to simplify
code.
Signed-off-by: Yang Yingliang
---
sound/soc/fsl/fsl_aud2htx.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/sound/soc/fsl/fsl_aud2htx.c b/sound/soc/fsl/fsl_aud2htx.c
index a328697511f7..99ab7f0241cf 100644
Use devm_platform_get_and_ioremap_resource() to simplify
code.
Signed-off-by: Yang Yingliang
---
sound/soc/fsl/fsl_easrc.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/sound/soc/fsl/fsl_easrc.c b/sound/soc/fsl/fsl_easrc.c
index b1765c7d3bcd..19c3c3b5939e 100644
---
patch #1 ~ #8:
Use devm_platform_get_and_ioremap_resource()
patch #9
check return value of platform_get_resource_byname()
v2:
change error message in patch #9
Yang Yingliang (9):
ASoC: fsl_asrc: Use devm_platform_get_and_ioremap_resource()
ASoC: fsl_aud2htx: Use
Use devm_platform_get_and_ioremap_resource() to simplify
code.
Signed-off-by: Yang Yingliang
---
sound/soc/fsl/fsl_esai.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/sound/soc/fsl/fsl_esai.c b/sound/soc/fsl/fsl_esai.c
index f356ae5925af..a961f837cd09 100644
---
Use devm_platform_get_and_ioremap_resource() to simplify
code.
Signed-off-by: Yang Yingliang
---
sound/soc/fsl/fsl_micfil.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/sound/soc/fsl/fsl_micfil.c b/sound/soc/fsl/fsl_micfil.c
index 3cf789ed6cbe..8c0c75ce9490 100644
---
Use devm_platform_get_and_ioremap_resource() to simplify
code.
Signed-off-by: Yang Yingliang
---
sound/soc/fsl/fsl_spdif.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/sound/soc/fsl/fsl_spdif.c b/sound/soc/fsl/fsl_spdif.c
index 2a76714eb8e6..d812a3ff5845 100644
---
Use devm_platform_get_and_ioremap_resource() to simplify
code.
Signed-off-by: Yang Yingliang
---
sound/soc/fsl/fsl_asrc.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/sound/soc/fsl/fsl_asrc.c b/sound/soc/fsl/fsl_asrc.c
index 0e1ad8efebd3..24b41881a68f 100644
---
Use devm_platform_get_and_ioremap_resource() to simplify
code.
Signed-off-by: Yang Yingliang
---
sound/soc/fsl/fsl_ssi.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index 2b57b60431bb..ecbc1c365d5b 100644
---
Excerpts from Paul Mackerras's message of June 15, 2021 9:05 am:
> This ensures that we don't get a decrementer interrupt arriving before
> we have set up a handler for it.
Would this be better off merged in the previous patch (maybe with
comment)? Why don't other platform_init()s seem to
Hi Michael,
> The fix is simply to make the key value relative to the jump_entry
> struct in the ARCH_STATIC_BRANCH macro.
This fixes the boot issues I observed. Thank you very much!!
Tested-by: Daniel Axtens
Kind regards,
Daniel
Excerpts from Paul Mackerras's message of June 15, 2021 8:59 am:
> Microwatt currently doesn't implement hypervisor mode and therefore
> doesn't implement the partition table. It does implement the process
> table and radix page table walks.
>
> This adds code to write the base address of the
Excerpts from Andy Lutomirski's message of June 15, 2021 2:20 am:
> Replying to several emails at once...
>
>
> On 6/13/21 10:21 PM, Nicholas Piggin wrote:
>> Excerpts from Nicholas Piggin's message of June 14, 2021 2:47 pm:
>>> Excerpts from Nicholas Piggin's message of June 14, 2021 2:14 pm:
On Mon, 2021-06-14 at 13:39 +1000, Nicholas Piggin wrote:
> Excerpts from Haren Myneni's message of June 13, 2021 9:04 pm:
> > The hypervisor provides different capabilities that it supports
> > to define the user space NX request. These capabilities are
> > recommended minimum compression /
This ensures that we don't get a decrementer interrupt arriving before
we have set up a handler for it.
Signed-off-by: Paul Mackerras
---
arch/powerpc/boot/microwatt.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/powerpc/boot/microwatt.c b/arch/powerpc/boot/microwatt.c
index
From: Benjamin Herrenschmidt
This is a simple native ICS backend that matches the layout of
the Microwatt implementation of ICS.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/boot/dts/microwatt.dts | 18 ++
arch/powerpc/platforms/microwatt/Kconfig | 2 +
Microwatt currently doesn't implement hypervisor mode and therefore
doesn't implement the partition table. It does implement the process
table and radix page table walks.
This adds code to write the base address of the process table to the
PRTBL SPR, which has been assigned SPR 720 for now, as
From: Benjamin Herrenschmidt
Just like any other embedded platform.
Add an empty soc node.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/boot/dts/microwatt.dts | 7 +++
arch/powerpc/platforms/microwatt/setup.c | 8
2 files changed, 15 insertions(+)
diff --git
This series of patches adds support for the Microwatt soft-core.
Microwatt is an open-source 64-bit Power ISA processor written in VHDL
which targets medium-sized FPGAs such as the Xilinx Artix-7 or the
Lattice ECP5. Microwatt currently implements the scalar fixed plus
floating-point subset of
This is accessed using the DARN instruction and should probably be
done more generically.
Signed-off-by: Paul Mackerras
---
arch/powerpc/include/asm/archrandom.h | 12 +-
arch/powerpc/platforms/microwatt/Kconfig | 1 +
arch/powerpc/platforms/microwatt/Makefile | 2 +-
From: Benjamin Herrenschmidt
This adds support to the Microwatt platform to use the standard
1655-style UART which available in the standalone Microwatt FPGA.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/boot/dts/microwatt.dts | 25 ---
From: Benjamin Herrenschmidt
This fixes the core devtree.c functions and the ns16550 UART backend.
Signed-off-by: Benjamin Herrenschmidt
---
arch/powerpc/boot/devtree.c | 59 +
arch/powerpc/boot/ns16550.c | 9 --
2 files changed, 41 insertions(+), 27
Microwatt is a FPGA-based implementation of the Power ISA. It
currently only implements little-endian 64-bit mode, and does
not (yet) support SMP, VMX, VSX or transactional memory.
This adds a new machine type to support FPGA-based SoCs with a
Microwatt core.
Signed-off-by: Paul Mackerras
---
From: Joel Stanley
This allows microwatt's kernel to be built with an embedded device tree.
Load to arch/powerpc/boot/dtbImage.microwatt to 0x50:
mw_debug -b fpga stop load arch/powerpc/boot/dtbImage.microwatt 50 start
Signed-off-by: Joel Stanley
---
arch/powerpc/boot/Makefile|
Signed-off-by: Paul Mackerras
---
arch/powerpc/configs/microwatt_defconfig | 98
1 file changed, 98 insertions(+)
create mode 100644 arch/powerpc/configs/microwatt_defconfig
diff --git a/arch/powerpc/configs/microwatt_defconfig
Signed-off-by: Paul Mackerras
---
arch/powerpc/boot/dts/microwatt.dts | 105
1 file changed, 105 insertions(+)
create mode 100644 arch/powerpc/boot/dts/microwatt.dts
diff --git a/arch/powerpc/boot/dts/microwatt.dts
b/arch/powerpc/boot/dts/microwatt.dts
new file
On 6/10/2021 4:23 AM, Viresh Kumar wrote:
> Hi Qian,
>
> It would be helpful if you can test this patchset and confirm if the races you
> mentioned went away or not and that the FIE code works as we wanted it to.
>
> I don't have a real setup and so it won't be easy for me to test this out.
>
On Thu, 10 Jun 2021 20:50:52 +0800, Zhongjun Tan wrote:
> Clean up the check for irq.dev_err is superfluous as platform_get_irq()
> already prints an error.Remove curly braces to confirm to styling
> requirements.
Applied to
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
On Thu, 10 Jun 2021 12:00:37 +0800, Zhongjun Tan wrote:
> The platform_get_irq() prints error message telling that interrupt is
> missing, hence there is no need to duplicated that message.
Applied to
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next
Thanks!
[1/1]
No functional change in this patch.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/numa.c | 38 +++---
1 file changed, 19 insertions(+), 19 deletions(-)
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index f2bf98bdcea2..8365b298ec48 100644
---
Also make related code cleanup that will allow adding FORM2_AFFINITY in
later patches. No functional change in this patch.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/include/asm/firmware.h | 4 +--
arch/powerpc/include/asm/prom.h | 2 +-
arch/powerpc/kernel/prom_init.c
FORM2 introduce a concept of secondary domain which is identical to the
conceept of FORM1 primary domain. Use secondary domain as the numa node
when using persistent memory device. For DAX kmem use the logical domain
id introduced in FORM2. This new numa node
Signed-off-by: Aneesh Kumar K.V
---
Signed-off-by: Daniel Henrique Barboza
Signed-off-by: Aneesh Kumar K.V
---
Documentation/powerpc/associativity.rst | 139
arch/powerpc/include/asm/firmware.h | 3 +-
arch/powerpc/include/asm/prom.h | 1 +
arch/powerpc/kernel/prom_init.c | 3
This helper is only used with the dispatch trace log collection.
A later patch will add Form2 affinity support and this change helps
in keeping that simpler. Also add a comment explaining we don't expect
the code to be called with FORM0
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/numa.c
Instead of updating NUMA distance every time we lookup a node id
from the associativity property, add helpers that can be used
during boot which does this only once. Also remove the distance
update from node id lookup helpers.
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/numa.c | 133
The associativity details of the newly added resourced are collected from
the hypervisor via "ibm,configure-connector" rtas call. Update the numa
distance details of the newly added numa node after the above call. In
later patch we will remove updating NUMA distance when we are looking
for node id
No functional change in this patch
Signed-off-by: Aneesh Kumar K.V
---
arch/powerpc/mm/numa.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index 8365b298ec48..5941da201fa3 100644
---
Form2 associativity adds a much more flexible NUMA topology layout
than what is provided by Form1. This also allows PAPR SCM device
to use better associativity when using the device as DAX KMEM
device. More details can be found in patch x
$ ndctl list -N -v
[
{
"dev":"namespace0.0",
Replying to several emails at once...
On 6/13/21 10:21 PM, Nicholas Piggin wrote:
> Excerpts from Nicholas Piggin's message of June 14, 2021 2:47 pm:
>> Excerpts from Nicholas Piggin's message of June 14, 2021 2:14 pm:
>>> Excerpts from Andy Lutomirski's message of June 14, 2021 1:52 pm:
On
On 6/14/21 8:25 PM, kernel test robot wrote:
Greeting,
FYI, we noticed a -29.4% regression of vm-scalability.throughput due to commit:
commit: ecf8443e51a862b261313c2319ab4e4aed9e6b7e ("[PATCH v7 02/11] mm/mremap: Fix
race between MOVE_PUD mremap and pageout")
url:
On Mon, 14 Jun 2021 23:14:40 +1000
Michael Ellerman wrote:
> Commit b0b3b2c78ec0 ("powerpc: Switch to relative jump labels") switched
> us to using relative jump labels. That involves changing the code,
> target and key members in struct jump_entry to be relative to the
> address of the
On Mon, Jun 14, 2021 at 7:39 AM kernel test robot wrote:
>
> FYI, we noticed a -29.4% regression of vm-scalability.throughput due to
> commit:
> ecf8443e51a8 ("[PATCH v7 02/11] mm/mremap: Fix race between MOVE_PUD mremap
> and pageout")
Ouch.
I guess it's not a huge surprise, but that's a
Commit b0b3b2c78ec0 ("powerpc: Switch to relative jump labels") switched
us to using relative jump labels. That involves changing the code,
target and key members in struct jump_entry to be relative to the
address of the jump_entry, rather than absolute addresses.
We have two static inlines that
Make our stack-walking code KASAN-safe by using __no_sanitize_address.
Generic code, arm64, s390 and x86 all make accesses unchecked for similar
sorts of reasons: when unwinding a stack, we might touch memory that KASAN
has marked as being out-of-bounds. In ppc64 KASAN development, I hit this
+++ Nicholas Piggin [11/06/21 19:39 +1000]:
The elf_check_arch() function is used to test usermode binaries, but
kernel modules may have more specific requirements. powerpc would like
to test for ABI version compatibility.
Add an arch-overridable function elf_check_module_arch() that defaults
Le 14/06/2021 à 07:49, Nicholas Piggin a écrit :
Excerpts from Christophe Leroy's message of June 14, 2021 3:30 pm:
Le 14/06/2021 à 03:32, Nicholas Piggin a écrit :
Excerpts from Michael Ellerman's message of June 10, 2021 5:29 pm:
When delivering a signal to a sigaction style handler
On 02.06.21 17:56, Zi Yan wrote:
On 10 May 2021, at 10:36, Zi Yan wrote:
On 7 May 2021, at 10:00, David Hildenbrand wrote:
On 07.05.21 13:55, Michal Hocko wrote:
[I haven't read through respective patches due to lack of time but let
me comment on the general idea and the underlying
On Mon, 07 Jun 2021, Christoph Hellwig wrote:
> Please don't touch this code as it is about to be removed entirely.
Do you have an ETA for this work?
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Le 14/06/2021 à 07:55, Nicholas Piggin a écrit :
Excerpts from Christophe Leroy's message of June 14, 2021 3:31 pm:
Le 14/06/2021 à 03:29, Nicholas Piggin a écrit :
Excerpts from Nicholas Piggin's message of June 14, 2021 10:47 am:
Excerpts from Michael Ellerman's message of June 8, 2021
On Mon, Jun 14, 2021 at 08:28:01AM +0200, Christoph Hellwig wrote:
> I think merging this with the next two patches would be a little more
> clear.
Sorry, I mean the next patch and the previous one.
I think merging this with the next two patches would be a little more
clear.
On Fri, Jun 11, 2021 at 11:26:54PM +0800, Claire Chang wrote:
> Add a new function, release_slots, to make the code reusable for supporting
> different bounce buffer pools, e.g. restricted DMA pool.
>
> Signed-off-by: Claire Chang
> ---
> kernel/dma/swiotlb.c | 35
On Fri, Jun 11, 2021 at 11:26:53PM +0800, Claire Chang wrote:
> Move the maintenance of alloc_size to find_slots for better code
> reusability later.
Looks good,
Reviewed-by: Christoph Hellwig
On Fri, Jun 11, 2021 at 11:26:52PM +0800, Claire Chang wrote:
> Regardless of swiotlb setting, the restricted DMA pool is preferred if
> available.
>
> The restricted DMA pools provide a basic level of protection against the
> DMA overwriting buffer contents at unexpected times. However, to
> kernel/dma/direct.c | 2 +-
> kernel/dma/swiotlb.c | 4 ++--
> 6 files changed, 8 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_internal.c
> b/drivers/gpu/drm/i915/gem/i915_gem_internal.c
> index
Looks good,
Reviewed-by: Christoph Hellwig
On Fri, Jun 11, 2021 at 11:26:49PM +0800, Claire Chang wrote:
> Add the initialization function to create restricted DMA pools from
> matching reserved-memory nodes.
Bisection hazard: we should only add the new config option when the
code is actually read to be used. So this patch should move
On Fri, Jun 11, 2021 at 11:33:15PM +0800, Claire Chang wrote:
> I'm not sure if this would break arch/x86/pci/sta2x11-fixup.c
> swiotlb_late_init_with_default_size is called here
> https://elixir.bootlin.com/linux/v5.13-rc5/source/arch/x86/pci/sta2x11-fixup.c#L60
It will. It will also break all
On Fri, Jun 11, 2021 at 11:26:47PM +0800, Claire Chang wrote:
> Split the debugfs creation to make the code reusable for supporting
> different bounce buffer pools, e.g. restricted DMA pool.
>
> Signed-off-by: Claire Chang
> ---
> kernel/dma/swiotlb.c | 23 ---
> 1 file
On Fri, Jun 11, 2021 at 11:26:46PM +0800, Claire Chang wrote:
> + spin_lock_init(>lock);
> + for (i = 0; i < mem->nslabs; i++) {
> + mem->slots[i].list = IO_TLB_SEGSIZE - io_tlb_offset(i);
> + mem->slots[i].orig_addr = INVALID_PHYS_ADDR;
> +
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