"Linux regression tracking (Thorsten Leemhuis)"
writes:
> [CCing the regression list, as it should be in the loop for regressions:
> https://docs.kernel.org/admin-guide/reporting-regressions.html]
>
> On 23.03.23 10:53, Srikar Dronamraju wrote:
>>
>> I am unable to boot upstream kernels from
Segher Boessenkool writes:
> On Tue, Apr 04, 2023 at 08:28:47PM +1000, Michael Ellerman wrote:
>> The amdgpu driver builds some of its code with hard-float enabled,
>> whereas the rest of the kernel is built with soft-float.
>>
>> When building with 64-bit long double, if soft-float and
There are two copies of these defines. Keep the older ones as they have
associated bit definitions.
Signed-off-by: Joel Stanley
---
Today I learnt that if you have two copies of the define, but they are
the same value, the compiler won't warn.
arch/powerpc/include/asm/reg.h | 2 --
1 file
The tlb_remove_table_smp_sync IPI is used to ensure the outdated tlb page
is not currently being accessed and can be cleared.
This occurs once all CPUs have left the lockless gup code section.
If they reenter the page table walk, the pointers will be to the new
pages.
Therefore the IPI is only
Currently the tlb_remove_table_smp_sync IPI is sent to all CPUs
indiscriminately, this causes unnecessary work and delays notable in
real-time use-cases and isolated cpus.
This patch will limit this IPI on systems with ARCH_HAS_CPUMASK_BITS,
Where the IPI will only be sent to cpus referencing the
Some architectures set and maintain the mm_cpumask bits when loading
or removing process from cpu.
This Kconfig will mark those to allow different behavior between
kernels that maintain the mm_cpumask and those that do not.
Signed-off-by: Yair Podemsky
---
arch/Kconfig | 8
Currently the tlb_remove_table_smp_sync IPI is sent to all CPUs
indiscriminately, this causes unnecessary work and delays notable in
real-time use-cases and isolated cpus.
By limiting the IPI to only be sent to cpus referencing the effected
mm and in kernel mode latency is improved.
a config to
randconfig-r024-20230403 gcc
cskydefconfig gcc
csky randconfig-r021-20230403 gcc
hexagon buildonly-randconfig-r001-20230403 clang
hexagon buildonly-randconfig-r006-20230404 clang
hexagon randconfig-r005
gcc
csky buildonly-randconfig-r002-20230403 gcc
cskydefconfig gcc
csky randconfig-r021-20230403 gcc
csky randconfig-r031-20230403 gcc
hexagon buildonly-randconfig-r006-20230404 clang
hexagon
randconfig-r024-20230403 gcc
cskydefconfig gcc
csky randconfig-r021-20230403 gcc
hexagon buildonly-randconfig-r001-20230403 clang
hexagon buildonly-randconfig-r006-20230404 clang
hexagon randconfig-r005-20230403
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git
merge
branch HEAD: 639e8992872c632f27b130b403e263eae966231e powerpc/ci: Add smart
sparse diffing
Warning reports:
https://lore.kernel.org/oe-kbuild-all/202304042327.blhf5ncp-...@intel.com
Warning: (recently
Make `quirk_enable_clear_retrain_link' `pci_fixup_early' so that any later
fixups can rely on `clear_retrain_link' to have been already initialised.
Signed-off-by: Maciej W. Rozycki
---
No change from v6.
No change from v5.
New change in v5.
---
drivers/pci/quirks.c |6 +++---
1 file
Determine whether Data Link Layer Link Active Reporting is available
ahead of calling any fixups so that the cached value can be used there
and later on.
Signed-off-by: Maciej W. Rozycki
---
Changes from v6:
- Regenerate against 6.3-rc5.
New change in v6.
---
drivers/pci/probe.c |6
Use `link_active_reporting' to determine whether Data Link Layer Link
Active Reporting is available rather than re-retrieving the capability.
Signed-off-by: Maciej W. Rozycki
---
NB this has been compile-tested only with a PPC64LE configuration.
No change from v6.
New change in v6.
---
Use `link_active_reporting' to determine whether Data Link Layer Link
Active Reporting is available rather than re-retrieving the capability.
Signed-off-by: Maciej W. Rozycki
---
NB this has been compile-tested only with PPC64LE and x86-64
configurations.
No change from v6.
New change in v6.
Use `link_active_reporting' to determine whether Data Link Layer Link
Active Reporting is available rather than re-retrieving the capability.
Signed-off-by: Maciej W. Rozycki
---
NB this has been compile-tested only with PPC64LE and x86-64
configurations.
Changes from v6:
- Regenerate
Attempt to handle cases such as with a downstream port of the ASMedia
ASM2824 PCIe switch where link training never completes and the link
continues switching between speeds indefinitely with the data link layer
never reaching the active state.
It has been observed with a downstream port of
Rename LINK_RETRAIN_TIMEOUT to PCIE_LINK_RETRAIN_TIMEOUT and make it
available via "pci.h" for PCI drivers to use.
Signed-off-by: Maciej W. Rozycki
---
No change from v6.
No change from v5.
New change in v5.
---
drivers/pci/pci.h |2 ++
drivers/pci/pcie/aspm.c |4 +---
2 files
Hi,
This is v7 of the change to work around a PCIe link training phenomenon
where a pair of devices both capable of operating at a link speed above
2.5GT/s seems unable to negotiate the link speed and continues training
indefinitely with the Link Training bit switching on and off repeatedly
tree/branch:
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: 6a53bda3aaf3de5edeea27d0b1d8781d067640b6 Add linux-next specific
files for 20230404
Error/Warning reports:
https://lore.kernel.org/oe-kbuild-all/202303082135.njdx1bij-...@intel.com
https
On Thu, Mar 30, 2023 at 07:24:27PM +0300, Andy Shevchenko wrote:
> Provide two new helper macros to iterate over PCI device resources and
> convert users.
>
> Looking at it, refactor existing pci_bus_for_each_resource() and convert
> users accordingly.
>
> Note, the amount of lines grew due to
On 4/4/23 11:33, Crystal Wood wrote:
> On Tue, 2023-04-04 at 10:55 -0400, Sean Anderson wrote:
>
>> @@ -1456,11 +1456,11 @@ static void tqm_congestion_task(struct work_struct
>> *work)
>> union qm_mc_result *mcr;
>> struct qman_cgr *cgr;
>>
>> - spin_lock_irq(>cgr_lock);
On Tue, Apr 04, 2023 at 05:12:17PM +0200, Peter Zijlstra wrote:
> > case 2:
> > CPU-A CPU-B
> >
> > modify pagetables
> > tlb_flush (memory barrier)
> > state == CONTEXT_USER
> > int state =
/0day-ci/archive/20230404/202304042327.blhf5ncp-...@intel.com/config)
compiler: arceb-elf-gcc (GCC) 12.1.0
reproduce (this is a W=1 build):
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
#
https
On Tue, 2023-04-04 at 10:55 -0400, Sean Anderson wrote:
> @@ -1456,11 +1456,11 @@ static void qm_congestion_task(struct work_struct
> *work)
> union qm_mc_result *mcr;
> struct qman_cgr *cgr;
>
> - spin_lock_irq(>cgr_lock);
> + raw_spin_lock_irq(>cgr_lock);
>
Hi!
On Tue, Apr 04, 2023 at 08:28:47PM +1000, Michael Ellerman wrote:
> The amdgpu driver builds some of its code with hard-float enabled,
> whereas the rest of the kernel is built with soft-float.
>
> When building with 64-bit long double, if soft-float and hard-float
> objects are linked
On Tue, Apr 04, 2023 at 04:42:24PM +0300, Yair Podemsky wrote:
> The tlb_remove_table_smp_sync IPI is used to ensure the outdated tlb page
> is not currently being accessed and can be cleared.
> This occurs once all CPUs have left the lockless gup code section.
> If they reenter the page table
On Tue, Apr 04, 2023 at 04:42:23PM +0300, Yair Podemsky wrote:
> diff --git a/mm/mmu_gather.c b/mm/mmu_gather.c
> index 2b93cf6ac9ae..5ea9be6fb87c 100644
> --- a/mm/mmu_gather.c
> +++ b/mm/mmu_gather.c
> @@ -191,7 +191,13 @@ static void tlb_remove_table_smp_sync(void *arg)
> /* Simply
smp_call_function_single disables IRQs when executing the callback. To
prevent deadlocks, we must disable IRQs when taking cgr_lock elsewhere.
This is already done by qman_update_cgr and qman_delete_cgr; fix the
other lockers.
Fixes: 96f413f47677 ("soc/fsl/qbman: fix issue in
cgr_lock may be locked with interrupts already disabled by
smp_call_function_single. As such, we must use a raw spinlock to avoid
problems on PREEMPT_RT kernels. Although this bug has existed for a
while, it was not apparent until commit ef2a8d5478b9 ("net: dpaa: Adjust
queue depth on rate
[CCing the regression list, as it should be in the loop for regressions:
https://docs.kernel.org/admin-guide/reporting-regressions.html]
On 23.03.23 10:53, Srikar Dronamraju wrote:
>
> I am unable to boot upstream kernels from v5.16 to the latest upstream
> kernel on a maxconfig system. (Machine
On 04.04.23 15:42, Yair Podemsky wrote:
The tlb_remove_table_smp_sync IPI is used to ensure the outdated tlb page
is not currently being accessed and can be cleared.
This occurs once all CPUs have left the lockless gup code section.
If they reenter the page table walk, the pointers will be to
On 04.04.23 15:42, Yair Podemsky wrote:
Some architectures set and maintain the mm_cpumask bits when loading
or removing process from cpu.
This Kconfig will mark those to allow different behavior between
kernels that maintain the mm_cpumask and those that do not.
I was wondering if we should
On Tue, Apr 4, 2023 at 3:19 PM Mark Rutland wrote:
>
> On Tue, Apr 04, 2023 at 02:24:38PM +0200, Uros Bizjak wrote:
> > On Mon, Apr 3, 2023 at 12:19 PM Mark Rutland wrote:
> > >
> > > On Sun, Mar 26, 2023 at 09:28:38PM +0200, Uros Bizjak wrote:
> > > > On Fri, Mar 24, 2023 at 5:33 PM Mark
On Tue, Apr 04, 2023 at 02:24:38PM +0200, Uros Bizjak wrote:
> On Mon, Apr 3, 2023 at 12:19 PM Mark Rutland wrote:
> >
> > On Sun, Mar 26, 2023 at 09:28:38PM +0200, Uros Bizjak wrote:
> > > On Fri, Mar 24, 2023 at 5:33 PM Mark Rutland wrote:
> > > >
> > > > On Fri, Mar 24, 2023 at 04:14:22PM
On Mon, Apr 3, 2023 at 12:19 PM Mark Rutland wrote:
>
> On Sun, Mar 26, 2023 at 09:28:38PM +0200, Uros Bizjak wrote:
> > On Fri, Mar 24, 2023 at 5:33 PM Mark Rutland wrote:
> > >
> > > On Fri, Mar 24, 2023 at 04:14:22PM +, Mark Rutland wrote:
> > > > On Fri, Mar 24, 2023 at 04:43:32PM +0100,
On Tue, Apr 4, 2023 at 2:22 AM Mike Rapoport wrote:
>
> On Wed, Mar 29, 2023 at 10:55:37AM -0500, Justin Forbes wrote:
> > On Sat, Mar 25, 2023 at 1:09 AM Mike Rapoport wrote:
> > >
> > > From: "Mike Rapoport (IBM)"
> > >
> > > It is not a good idea to change fundamental parameters of core
The amdgpu driver builds some of its code with hard-float enabled,
whereas the rest of the kernel is built with soft-float.
When building with 64-bit long double, if soft-float and hard-float
objects are linked together, the build fails due to incompatible ABI
tags.
In the past there have been
> -Original Message-
> From: Sean Anderson
> Sent: Friday, March 31, 2023 18:14
> To: Leo Li ; linuxppc-dev@lists.ozlabs.org; linux-arm-
> ker...@lists.infradead.org
> Cc: Scott Wood ; Camelia Alexandra Groza
> ; linux-ker...@vger.kernel.org; Roy Pledge
> ; David S . Miller ; Claudiu
>
> -Original Message-
> From: Sean Anderson
> Sent: Monday, April 3, 2023 18:22
> To: Vladimir Oltean
> Cc: Leo Li ; linuxppc-dev@lists.ozlabs.org; linux-arm-
> ker...@lists.infradead.org; Scott Wood ; Camelia
> Alexandra Groza ; linux-ker...@vger.kernel.org;
> Roy Pledge ; David S .
On 4/2/23 08:52, Vineet Gupta wrote:
> CC Shahab
>
> On 3/27/23 17:43, Arnd Bergmann wrote:
>> From: Arnd Bergmann
>>
>> Some architectures that need to invalidate buffers after bidirectional
>> DMA because of speculative prefetching only do a simpler writeback
>> before that DMA, while
On 27/03/2023 14.45, Nicholas Piggin wrote:
The next change will load the kernels at different addresses depending
on test options, so this needs to be reverted back to dynamic
discovery.
Signed-off-by: Nicholas Piggin
---
powerpc/cstart64.S | 19 ++-
1 file changed, 14
On 27/03/2023 14.45, Nicholas Piggin wrote:
Interrupt vectors were not being populated for all architected
interrupt types, which could lead to crashes rather than a message for
unhandled interrupts.
0x20 sized vectors require some reworking of the code to fit. This
also adds support for HV /
On Wed, Mar 29, 2023 at 10:55:37AM -0500, Justin Forbes wrote:
> On Sat, Mar 25, 2023 at 1:09 AM Mike Rapoport wrote:
> >
> > From: "Mike Rapoport (IBM)"
> >
> > It is not a good idea to change fundamental parameters of core memory
> > management. Having predefined ranges suggests that the
On 27/03/2023 14.45, Nicholas Piggin wrote:
Exception handlers are currently indexed in units of 0x100, but
powerpc can have vectors that are aligned to as little as 0x20
bytes. Increase granularity of the handler functions before
adding support for thse vectors.
s/thse/those/
Thomas
On 27/03/2023 14.45, Nicholas Piggin wrote:
The VPA is an optional memory structure shared between the hypervisor
and operating system, defined by PAPR. This test defines the structure
and adds registration, deregistration, and a few simple sanity tests.
[Thanks to Thomas Huth for suggesting
On 27/03/2023 14.45, Nicholas Piggin wrote:
A significant rework that builds an array of 'struct spr', where each
element describes an SPR. This makes various metadata about the SPR
like name and access type easier to carry and use.
Hypervisor privileged registers are described despite not
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