Re: [2/2] Detect instruction fetch denied and report

On 20/09/16 16:35, Michael Ellerman wrote: > On Mon, 2016-22-08 at 01:56:57 UTC, Balbir Singh wrote: >> diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c >> index a4db22f..f162e77 100644 >> --- a/arch/powerpc/mm/fault.c >> +++ b/arch/powerpc/mm/f

Re: [PATCH kernel] powerpc: Bump minimum zone order for 4K system page size

p; !PPC_64K_PAGES > + range 12 13 if PPC64 && !PPC_64K_PAGES > default "13" if PPC64 && !PPC_64K_PAGES > range 9 64 if PPC32 && PPC_16K_PAGES > default "9" if PPC32 && PPC_16K_PAGES > Aneesh already submitted a patch for this Balbir Singh.

Re: [PATCH v2 1/3] drivers/of: recognize status property of dt memory nodes

m.com> Makes sense, so basically a /memory@ with missing status or status = "okay" are added, others are skipped. No memblocks corresponding to those nodes are created either. Balbir Singh

Re: [PowerPC] today's main line failed to build on PowerPC

On Thu, Aug 18, 2016 at 11:50:28AM +0530, Abdul Haleem wrote: > Hi, > > The main line stable 4.8.0-rc2 failed to build on PowerPC with following > build errors. config : pseries_le_defconfig Machine Type : PowerPC Bare > Metal > > 09:34:22 00:04:59 INFO | make -j 160 vmlinux > 09:34:24 00:05:01

Re: [PATCH v5 04/13] powerpc: Factor out relocation code from module_64.c to elf_util_64.c.

e zImage to get rid the old zImage limitation, cc'ing him Balbir Singh

Re: [PATCH V3] powerpc/mm: Add radix flush all with IS=3

lush host entires by passing PRS = 0 and LPID == 0 > + */ > + asm volatile(PPC_TLBIE_5(%0, %4, %3, %2, %1) > + : : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(0) : > "memory"); > + asm volatile("eieio; tlbsync; ptesync": : :"memory"); > +} > Otherwise looks good Balbir Singh.

Re: [PATCH V2 2/5] powerpc/mm: Add radix flush all with IS=3

> + unsigned long rb,prs,r; > >> + unsigned long ric = RIC_FLUSH_ALL; > >> + > >> + rb = 0x3 << PPC_BITLSHIFT(53); /* IS = 3 */ > >> + prs = 0; /* partition scoped */ > >> + r = 1;   /* raidx format */ ^^ radix > >> + > >> + asm volatile("ptesync": : :"memory"); > >> + asm volatile(PPC_TLBIE_5(%0, %4, %3, %2, %1) > >> +  : : "r"(rb), "i"(r), "i"(prs), "i"(ric), "r"(0) > >> : "memory"); > >> + asm volatile("eieio; tlbsync; ptesync": : :"memory"); > >> +} > Balbir Singh.

Re: [RFC/PATCH 1/2] cpuidle: Allow idle-states to be disabled at start

adds a mechanism which allows the >> driver to hint if an idle-state should start in a disabled state. The >> cpu-idle core will use this hint to appropriately initialize the >> usage->disable knob of the CPU device idle state. > > Why do you need to do that ? > I t

[PATCH] Fix "ibm,processor-radix-AP-encodings"

The top 3 bits of the lower order byte should contain the AP encoding, we assume the top 3 bits of the MSB. Signed-off-by: Balbir Singh <bsinghar...@gmail.com> --- - Detected while reviewing Chris Smart's patch to add radix-AP-encoding to skiboot - Also fixed typo (sift/shift)

[PATCH v2] Fix buglet in tlbiel where we set L=1 for ISA 206/7

This patch fixes a bug where we set bit 10 in tlbie via our custom .long opcode for tlbiel. These bits are reserved for 2.06/2.07. In ISA 3.0 bit 10 is a part of the register field RS and we could end up corrupting the meaning of the register field completely with L=1 Signed-off-by: Balbir Singh

Re: [PATCH] powerpc: During context switch, check before setting mm_cpumask

n since we have a sync coming out of schedule(). The read side for TLB flush can use a RMB Acked-by: Balbir Singh <bsinghar...@gmail.com> Balbir Singh.

Re: [PATCH] powerpc: During context switch, check before setting mm_cpumask

On 04/10/16 10:58, Benjamin Herrenschmidt wrote: > On Tue, 2016-10-04 at 10:25 +1100, Balbir Singh wrote: >> I think this makes sense, in fact I think in the longer term we can >> even use __set_bit() reorder-able version since we have a sync >> coming out of schedule().

Re: [PATCH v3 4/5] powerpc/mm: restore top-down allocation when using movable_node

> happen. We can immediately go back to top-down allocation. That is the > missing call being added in the patch. > Can we fix cmdline_parse_movable_node() to do the right thing? I suspect that code is heavily x86 only in the sense that no other arch needs it. Balbir Singh.

Re: [PATCH v4 4/5] mm: make processing of movable_node arch-specific

On 26/10/16 02:55, Reza Arbab wrote: > On Tue, Oct 25, 2016 at 11:15:40PM +1100, Balbir Singh wrote: >> After the ack, I realized there were some more checks needed, IOW >> questions for you :) > > Hey! No takebacks! > I still believe we need your changes, I was w

Re: [PATCH v4 4/5] mm: make processing of movable_node arch-specific

On 26/10/16 02:55, Reza Arbab wrote: > On Tue, Oct 25, 2016 at 11:15:40PM +1100, Balbir Singh wrote: >> After the ack, I realized there were some more checks needed, IOW >> questions for you :) > > Hey! No takebacks! > I still believe we need your changes, I was w

Re: [PATCH] powerpc/powernv: Initialise nest mmu

init opal_init(void) >> /* Initialise OPAL kmsg dumper for flushing console on panic */ >> opal_kmsg_init(); >> >> +/* Update partition table control register on all Nest MMUs */ >> +opal_nmmu_set_ptcr(-1UL, __pa(partition_tb) | (PATB_SIZE_SHIFT - 12)); >> + >> return 0; >> } >> machine_subsys_initcall(powernv, opal_init); >> -- >> 2.1.4 > We might need some kexec changes as well, but for this patch Reviewed-by: Balbir Singh <bsinghar...@gmail.com>

Re: [PATCH v6 4/4] of/fdt: mark hotpluggable memory

you tested this across all combinations of skiboot/kexec/SLOF boots? Balbir Singh.

Re: [PATCH] powerpc/mm: Correct process and partition table max size

each we should be checking for values > of greater than 36 instead of the current check for shifts larger than 24 > and 23. > I looked at the ISA and the patch seems reasonable to me. It has no functional impact other than when we decide to increase the size of PA(R)TB_SIZE_SHIFT Reviewed-by: Balbir Singh <bsinghar...@gmail.com>

Re: [PATCH 2/3] Detect instruction fetch denied and report

On 09/11/16 03:09, Aneesh Kumar K.V wrote: > Balbir Singh <bsinghar...@gmail.com> writes: > >> ISA 3 allows for prevention of instruction fetch and execution >> of user mode pages. If such an error occurs, SRR1 bit 35 >> reports the error. We catch and rep

Re: [PATCH 3/3] Enable storage keys for radix - user mode execution

On 09/11/16 03:15, Aneesh Kumar K.V wrote: > Balbir Singh <bsinghar...@gmail.com> writes: > >> ISA 3 defines new encoded access authority that allows instruction >> access prevention in privileged mode and allows normal access >> to problem state. This patch

Re: [PATCH 1/3] Setup AMOR in HV mode

On 09/11/16 02:13, Aneesh Kumar K.V wrote: > Balbir Singh <bsinghar...@gmail.com> writes: > >> AMOR should be setup in HV mode, we set it up once >> and let the generic kernel handle IAMR. This patch is >> used to enable storage keys in a following patch as >

Re: [PATCH] powerpc/mm: Move hpte encode routine to platform specific files

On 10/11/16 20:24, Aneesh Kumar K.V wrote: > They differ between powernv and pseries. While we are at it copy > a version for ps3 too. For now this is same as what we have for pSeries. > > Fixes: 50de596de8be6 ("powerpc/mm/hash: Add support for Power9 Hash") > Signed-off-by: Aneesh Kumar K.V

Re: [PATCH] powerpc/mm: Move hpte encode routine to platform specific files

On 11/11/16 10:54, Balbir Singh wrote: > > > On 10/11/16 20:24, Aneesh Kumar K.V wrote: >> They differ between powernv and pseries. While we are at it copy >> a version for ps3 too. For now this is same as what we have for pSeries. >> >> Fixes: 50de596de8b

Re: [PATCH v6 4/4] of/fdt: mark hotpluggable memory

g(). > > If we introduce a dt property to describe memory as hotpluggable, > configs supporting early fdt may then also do this marking and use > movable nodes. > > Signed-off-by: Reza Arbab <ar...@linux.vnet.ibm.com> > --- Tested-by: Balbir Singh <bsinghar...@gmail.

Fwd: [PATCH v2] Make system_reset_pSeries relocatable

A variant of this went upstream (http://patchwork.ozlabs.org/patch/681567/) and with a cc to stable. This bit should get backported to stable. Forwarded Message Subject: [PATCH v2] Make system_reset_pSeries relocatable Date: Thu, 28 Jul 2016 12:09:03 +1000 From: Balbir Singh

[PATCH] Fix the message in facility unavailable exception

to prevent printing the wrong information and helps better direct debugging effort. Signed-off-by: Balbir Singh <bsinghar...@gmail.com> --- arch/powerpc/kernel/traps.c | 10 -- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/

[PATCH] Fix a typo in radix encodings print

Rename sift to shift Signed-off-by: Balbir Singh <bsinghar...@gmail.com> --- arch/powerpc/mm/pgtable-radix.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/powerpc/mm/pgtable-radix.c b/arch/powerpc/mm/pgtable-radix.c index cd3d400..ea7f796 100644 --- a/arch/powe

Re: [PATCH 3/7] powerpc/64s: tool to flag direct branches from unrelocated interrupt vectors

On 19/10/16 14:15, Nicholas Piggin wrote: > Direct banches from code below __end_interrupts to code above > __end_interrupts when built with CONFIG_RELOCATABLE are disallowed > because they will break when the kernel is not located at 0. > > Sample output: > > WARNING: Unrelocated relative

Re: [PATCH v4 3/5] powerpc/mm: allow memory hotplug into a memoryless node

> Reviewed-by: Aneesh Kumar K.V <aneesh.ku...@linux.vnet.ibm.com> > Acked-by: Balbir Singh <bsinghar...@gmail.com> > Cc: Nathan Fontenot <nf...@linux.vnet.ibm.com> > Cc: Bharata B Rao <bhar...@linux.vnet.ibm.com> > --- > arch/powerpc/mm/numa.c | 13 +

Re: [RFC PATCH 2/3] powerpc/pseries: Define & use a type for the plpar_hcall() retvals

On 19/10/16 22:47, Michael Ellerman wrote: > Balbir Singh <bsinghar...@gmail.com> writes: > >> On 18/10/16 19:40, Michael Ellerman wrote: >>> We have now had two nasty stack corruption bugs caused by incorrect >>> sizing of the return buffer for plpar_hcal

Re: [PATCH v2] powerpc/64: option to force run-at-load to test relocation

On 14/10/16 18:31, Nicholas Piggin wrote: > This adds a config option that can help exercise the case when > the kernel is not running at PAGE_OFFSET. > > Signed-off-by: Nicholas Piggin <npig...@gmail.com> > --- Reviewed-by: Balbir Singh <bsinghar...@gmail.com>

Re: [PATCH][RFC] powerpc/64s: Use emergency stack for 0x100 system reset interrupt

uch. I think we should document the limitations as discussed One of them is that sequential system resets have unpredictable behaviour when done in quick successions. I also don't like some of the naming like NORI, I would rather prefer NOT_RI, but thats just nit picking Balbir Singh.

Re: Oops on Power8 (was Re: [PATCH v2 1/7] workqueue: make workqueue available early during boot)

On 15/10/16 02:08, Tejun Heo wrote: > Hello, Balbir. > > On Tue, Oct 11, 2016 at 11:21:09PM +1100, Balbir Singh wrote: >> FYI: I see the samething on my cpu as well, its just that I get lucky >> and cpu_online(cpu) returns false. > > Are you seeing this on x86

Re: Oops on Power8 (was Re: [PATCH v2 1/7] workqueue: make workqueue available early during boot)

g up with tsk_cpus_allowed() being >> empty, but I haven't had time to track down why that's happening. > I think the basic analysis shows the change to creation of unbounded workqueues from the unbound_hash, but those have a pool cpumask empty. > Can you please add WARN_ON_ONCE(!tsk_nr_cpus_allowed(p)) to > select_task_rq() and post what that says? > > Thanks. > Balbir Singh.

Re: [PATCH] powerpc/mm: Use tlbiel only if we ever ran on the current cpu

we did it only on the current thread? This could leave others threads in the same core with invalid TLB's, if cpumask reported we ran on other threads in the same core? Balbir Singh.

Re: [RFC PATCH 2/3] powerpc/pseries: Define & use a type for the plpar_hcall() retvals

On 18/10/16 19:40, Michael Ellerman wrote: > We have now had two nasty stack corruption bugs caused by incorrect > sizing of the return buffer for plpar_hcall()/plpar_hcall9(). > > To avoid any more such bugs, define a type which encodes the size of the > return buffer, and change the argument

Re: [PATCH v4 4/5] mm: make processing of movable_node arch-specific

On 11/10/16 23:26, Balbir Singh wrote: > > > On 07/10/16 05:36, Reza Arbab wrote: >> Currently, CONFIG_MOVABLE_NODE depends on X86_64. In preparation to >> enable it for other arches, we need to factor a detail which is unique >> to x86 out of the generic

Re: [PATCH] powerpc/book3s64: Always build for power4 or later

option,-mtune=power7,-mtune=power4) > +CFLAGS-$(CONFIG_GENERIC_CPU) += -mcpu=power4 > else > CFLAGS-$(CONFIG_GENERIC_CPU) += -mcpu=powerpc64 > endif > Acked-by: Balbir Singh <bsinghar...@gmail.com>

Re: [PATCH] powerpc: ignore the pkey system calls for now

implemented [-Wcpp] > > Hopefully we will remember to revert this commit if we ever implement > them. > > Signed-off-by: Stephen Rothwell <s...@canb.auug.org.au> That makes sense for now Acked-by: Balbir Singh <bsinghar...@gmail.com>

[PATCH] Setup per-cpu cpu<->node binding early

ael Ellerman <m...@ellerman.id.au> Signed-off-by: Balbir Singh <bsinghar...@gmail.com> --- arch/powerpc/kernel/setup_64.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c index c3e1290..842415a 100644 --- a/arch/powerpc/ke

[powerpc v5 1/3] Setup AMOR in HV mode

AMOR should be setup in HV mode, we set it up once and let the generic kernel handle IAMR. This patch is used to enable storage keys in a following patch as defined in ISA 3 Reported-by: Aneesh Kumar K.V <aneesh.ku...@linux.vnet.ibm.com> Signed-off-by: Balbir Singh <bsinghar...@

[powerpc v5 2/3] Detect instruction fetch denied and report

ISA 3 allows for prevention of instruction fetch and execution of user mode pages. If such an error occurs, SRR1 bit 35 reports the error. We catch and report the error in do_page_fault() Signed-off-by: Balbir Singh <bsinghar...@gmail.com> --- arch/powerpc/mm/fault.c | 4 1 file chan

[powerpc v5 3/3] Enable storage keys for radix - user mode execution

and a simple payload. The payload is specific to the build I've tested. Signed-off-by: Balbir Singh <bsinghar...@gmail.com> --- arch/powerpc/mm/pgtable-radix.c | 20 1 file changed, 20 insertions(+) diff --git a/arch/powerpc/mm/pgtable-radix.c b/arch/powerpc/mm/pgtable-radix.c

[powerpc v5 0/3] Enable IAMR storage keys for radix

and guest kernels. I've tested with patch series with a sample hack and payload. Chris Smart helped with the series, reviewing and providing valuable feedback Changelog Remove __init annotation for iamr and amor init Balbir Singh (3): Setup AMOR in HV mode Detect instruction fetch denied

[powerpc v6 0/3] Enable storage keys for radix

and suggestions Balbir Singh (3): powerpc:Setup AMOR in HV mode powerpc/mm/radix:Detect instruction fetch denied and report powerpc:Enable storage keys for radix - user mode execution arch/powerpc/mm/fault.c | 8 arch/powerpc/mm/pgtable-radix.c | 45

[powerpc v6 3/3] Enable storage keys for radix - user mode execution

and a simple payload. The payload is specific to the build I've tested. Signed-off-by: Balbir Singh <bsinghar...@gmail.com> --- arch/powerpc/mm/pgtable-radix.c | 22 ++ 1 file changed, 22 insertions(+) diff --git a/arch/powerpc/mm/pgtable-radix.c b/arch/powerpc/mm/pgtable-r

[powerpc v6 1/3] Setup AMOR in HV mode

potentially try to set IAMR (guest kernel for example). Reported-by: Aneesh Kumar K.V <aneesh.ku...@linux.vnet.ibm.com> Signed-off-by: Balbir Singh <bsinghar...@gmail.com> --- arch/powerpc/mm/pgtable-radix.c | 23 +++ 1 file changed, 23 insertions(+) diff --git a/arc

[powerpc v6 2/3] Detect instruction fetch denied and report

ISA 3 allows for prevention of instruction fetch and execution of user mode pages. If such an error occurs, SRR1 bit 35 reports the error. We catch and report the error in do_page_fault() Signed-off-by: Balbir Singh <bsinghar...@gmail.com> --- arch/powerpc/mm/fault.c | 8 1 file c

[mm v2 2/3] mm: Move operations to hotplug callbacks

; Cc: Michal Hocko <mho...@kernel.org> Cc: Vladimir Davydov <vdavydov@gmail.com> Signed-off-by: Balbir Singh <bsinghar...@gmail.com> --- mm/memcontrol.c | 83 +++-- 1 file changed, 75 insertions(+), 8 deletions(-) diff --git

[mm v2 1/3] mm: Add basic infrastructure for memcg hotplug support

and does the allocation and free of those structures per cgroup. We walk every cgroup per event, its a trade-off of allocating upfront vs allocating on demand and freeing on offline. Signed-off-by: Balbir Singh <bsinghar...@gmail.com> --- mm/memcontrol.

Re: [mm v2 0/3] Support memory cgroup hotplug

On 23/11/16 18:25, Michal Hocko wrote: > On Wed 23-11-16 15:36:51, Balbir Singh wrote: >> In the absence of hotplug we use extra memory proportional to >> (possible_nodes - online_nodes) * number_of_cgroups. PPC64 has a patch >> to disable large consumption with la

[RFC] [PATCH] Trace TLBIE's

ed-off-by: Balbir Singh <bsinghar...@gmail.com> diff --git a/arch/powerpc/include/asm/trace.h b/arch/powerpc/include/asm/trace.h index 32e36b1..b4e02ba 100644 --- a/arch/powerpc/include/asm/trace.h +++ b/arch/powerpc/include/asm/trace.h @@ -168,6 +168,38 @@ TRACE_EVENT(hash_fault,

[mm v2 3/3] powerpc/mm: fix node_possible_map limitations

: Johannes Weiner <han...@cmpxchg.org> Cc: Michal Hocko <mho...@kernel.org> Cc: Vladimir Davydov <vdavydov....@gmail.com> Signed-off-by: Balbir Singh <bsinghar...@gmail.com> Acked-by: Michael Ellerman <m...@ellerman.id.au> --- arch/powerpc/mm/numa.c | 7 --- 1 file c

[mm v2 0/3] Support memory cgroup hotplug

E instead of MEM_GOING_OFFLINE/ONLINE Balbir Singh (3): mm: Add basic infrastructure for memcg hotplug support mm: Move operations to hotplug callbacks powerpc/mm: fix node_possible_map limitations arch/powerpc/mm/numa.c | 7 mm/memcontrol.c| 107

Re: [RFC][PATCH] Update ppc disassembly in xmon

On 24/11/16 16:14, Andrew Donnellan wrote: > On 24/11/16 13:05, Balbir Singh wrote: >> 9. The license for these files is now GPL v3 or later > > As much as I love the GPLv3, isn't this an instant NAK? > Thats why I called it out, my bad though I should have done a strong

Re: [PATCH v5 1/7] powerpc/mm: update ptep_set_access_flag to not do full mm tlb flush

On 23/11/16 22:09, Aneesh Kumar K.V wrote: > When we are updating pte, we just need to flush the tlb mapping for > that pte. Right now we do a full mm flush because we don't track page > size. Update the interface to track the page size and use that to > do the right tlb flush. > Could you

Re: [mm v2 0/3] Support memory cgroup hotplug

On 23/11/16 19:07, Michal Hocko wrote: > On Wed 23-11-16 18:50:42, Balbir Singh wrote: >> >> >> On 23/11/16 18:25, Michal Hocko wrote: >>> On Wed 23-11-16 15:36:51, Balbir Singh wrote: >>>> In the absence of hotplug we use extra memory proportio

Re: [PATCH v5 1/7] powerpc/mm: update ptep_set_access_flag to not do full mm tlb flush

On 23/11/16 22:53, Aneesh Kumar K.V wrote: > Balbir Singh <bsinghar...@gmail.com> writes: > >> On 23/11/16 22:09, Aneesh Kumar K.V wrote: >>> When we are updating pte, we just need to flush the tlb mapping for >>> that pte. Right now we do a full mm flush

Re: [RFC] [PATCH] Trace TLBIE's

On 23/11/16 21:15, Michael Ellerman wrote: > Balbir Singh <bsinghar...@gmail.com> writes: > >> Just a quick patch to trace tlbie(l)'s. The idea being that it can be >> enabled when we suspect corruption or when we need to see if we are doing >> the right thing du

Re: [PATCH v5 3/7] powerpc/mm/hugetlb: Handle hugepage size supported by hash config

On 23/11/16 22:09, Aneesh Kumar K.V wrote: > W.r.t hash page table config, we support 16MB and 16GB as the hugepage > size. Update the hstate_get_psize to handle 16M and 16G. > > Signed-off-by: Aneesh Kumar K.V > --- >

Re: [mm v2 0/3] Support memory cgroup hotplug

On 23/11/16 20:28, Michal Hocko wrote: > On Wed 23-11-16 19:37:16, Balbir Singh wrote: >> >> >> On 23/11/16 19:07, Michal Hocko wrote: >>> On Wed 23-11-16 18:50:42, Balbir Singh wrote: >>>> >>>> >>>> On 23/11/16 18:25, Mich

Re: [PATCH v5 1/7] powerpc/mm: update ptep_set_access_flag to not do full mm tlb flush

On 24/11/16 01:36, Aneesh Kumar K.V wrote: > Balbir Singh <bsinghar...@gmail.com> writes: > >> On 23/11/16 22:53, Aneesh Kumar K.V wrote: >>> Balbir Singh <bsinghar...@gmail.com> writes: >>> >>>> On 23/11/16 22:09, Aneesh Kumar K.V wrote:

Re: [RFC][PATCH] powerpc/64be: use ELFv2 ABI for big endian kernels

kiboot 2. glibc/vdso Keen to find out as well Balbir Singh.

Re: [RESEND][v1 0/3] Support memory cgroup hotplug

On 22/11/16 01:03, Michal Hocko wrote: > On Wed 16-11-16 10:44:58, Balbir Singh wrote: >> In the absence of hotplug we use extra memory proportional to >> (possible_nodes - online_nodes) * number_of_cgroups. PPC64 has a patch >> to disable large consumption with la

Re: [RESEND] [PATCH v1 1/3] Add basic infrastructure for memcg hotplug support

>> >> The iterator internally takes rcu_read_lock() to avoid any side-effects >> of cgroups added/removed. I suspect you are also suggesting using >> get_online_mems() >> around each call to for_each_online_node >> >> My understanding so far is >> >> 1. invalidate_reclaim_iterators should be

Re: [mm v2 0/3] Support memory cgroup hotplug

On 29/11/16 08:10, Tejun Heo wrote: > On Thu, Nov 24, 2016 at 12:05:12AM +1100, Balbir Singh wrote: >> On my desktop NODES_SHIFT is 6, many distro kernels have it a 9. I've known >> of solutions that use fake NUMA for partitioning and need as many nodes as >> possible. >

Re: [PATCH v3 0/3] powernv:stop: Use psscr_val,mask provided by firmware

nce the wakeup from the stop instruction will >happen at 0x100, the system-reset vector. However, the ISA v3.0 >allows the ESL=EC=0 behaviour where the corresponding stop-state >loses no state and wakes up from the subsequent instruction. The >current code doesn't handle this case. > Sounds reasonable Balbir Singh.

Re: [mm v2 0/3] Support memory cgroup hotplug

On 29/11/16 11:42, Tejun Heo wrote: > Hello, Balbir. > > On Tue, Nov 29, 2016 at 11:09:26AM +1100, Balbir Singh wrote: >> On 29/11/16 08:10, Tejun Heo wrote: >>> On Thu, Nov 24, 2016 at 12:05:12AM +1100, Balbir Singh wrote: >>>> On my desktop NODES_SHIFT i

Re: [PATCH v3 1/6] powerpc/mm: update ptep_set_access_flag to not do full mm tlb flush

he change can be limited in scope by passing the struct vma instead of struct mm as the first argument and not passing pg_sz (I don't like that name at all, page_size if we decide to do it, please). Then extract the mm from vma->mm Balbir Singh.

Re: [RESEND] [PATCH v1 1/3] Add basic infrastructure for memcg hotplug support

On 16/11/16 20:01, Vladimir Davydov wrote: > Hello, > > On Wed, Nov 16, 2016 at 10:44:59AM +1100, Balbir Singh wrote: >> The lack of hotplug support makes us allocate all memory >> upfront for per node data structures. With large number >> of cgroups this can be

Re: [powerpc v6 1/3] Setup AMOR in HV mode

On 16/11/16 18:58, Aneesh Kumar K.V wrote: > Balbir Singh <bsinghar...@gmail.com> writes: > >> AMOR should be setup in HV mode, we set it up once >> and let the generic kernel handle IAMR. This patch is >> used to enable storage keys in a following patch as >&

Re: [PATCH v2] powerpc/mm/radix: Invalidate ERAT on tlbiel for POWER9 DD1

_feature(CPU_FTR_POWER9_DD1)) >> +asm volatile(PPC_SLBIA(0x7) >> + : : :"memory"); > > Ah of course I'll use slbia to invalidate the ERAT. > > How about we do: > > #define PPC_INVALIDATE_ERAT PPC_SLBIA(0x7) > While you are at it, could you also add a TODO to use a HCALL when LPCR_GTSE is not set (when running in guest mode) Balbir Singh.

Re: [PATCH 02/13] powerpc/64: Provide functions for accessing POWER9 partition table

> +#ifdef CONFIG_PPC_BOOK3S_64 > +void mmu_partition_table_init(void) > +{ > + unsigned long patb_size = 1UL << PATB_SIZE_SHIFT; > + > + BUILD_BUG_ON_MSG((PATB_SIZE_SHIFT > 24), "Partition table size too > large."); This should be 36 (12 + 24) > + partition_tb =

Re: [PATCH 05/13] KVM: PPC: Book3S HV: Adapt to new HPTE format on POWER9

; @@ -949,7 +984,7 @@ long kvmppc_hv_find_lock_hpte(struct kvm *kvm, gva_t > eaddr, unsigned long slb_v, > /* Return with the HPTE still locked */ > return (hash << 3) + (i >> 1); > > - __unlock_hpte([i], v); > + __unlock_hpte([i], orig_v); > } > > if (val & HPTE_V_SECONDARY) > @@ -977,7 +1012,7 @@ long kvmppc_hpte_hv_fault(struct kvm_vcpu *vcpu, > unsigned long addr, > { > struct kvm *kvm = vcpu->kvm; > long int index; > - unsigned long v, r, gr; > + unsigned long v, r, gr, orig_v; > __be64 *hpte; > unsigned long valid; > struct revmap_entry *rev; > @@ -1005,12 +1040,16 @@ long kvmppc_hpte_hv_fault(struct kvm_vcpu *vcpu, > unsigned long addr, > return 0; /* for prot fault, HPTE disappeared */ > } > hpte = (__be64 *)(kvm->arch.hpt_virt + (index << 4)); > - v = be64_to_cpu(hpte[0]) & ~HPTE_V_HVLOCK; > + v = orig_v = be64_to_cpu(hpte[0]) & ~HPTE_V_HVLOCK; > r = be64_to_cpu(hpte[1]); > + if (cpu_has_feature(CPU_FTR_ARCH_300)) { > + v = hpte_new_to_old_v(v, r); > + r = hpte_new_to_old_r(r); > + } > rev = real_vmalloc_addr(>arch.revmap[index]); > gr = rev->guest_rpte; > > - unlock_hpte(hpte, v); > + unlock_hpte(hpte, orig_v); > } > > /* For not found, if the HPTE is valid by now, retry the instruction */ > Reviewed-by: Balbir Singh <bsinghar...@gmail.com>

Re: [PATCH 06/13] KVM: PPC: Book3S HV: Set partition table rather than SDR1 on POWER9

- page size for VRMA */ > + dw0 = ((kvm->arch.vrma_slb_v & SLB_VSID_L) >> 1) | > + ((kvm->arch.vrma_slb_v & SLB_VSID_LP) << 1); > + /* HTABSIZE and HTABORG fields */ > + dw0 |= kvm->arch.sdr1; > + > + /* Second dword has GR=0; other fields are unused since UPRT=0 */ > + dw1 = 0; Don't we need to set LPCR_GTSE for legacy guests? Otherwise Reviewed-by: Balbir Singh <bsinghar...@gmail.com>

[PATCH] powerpc/xmon: Add support for dump in reverse

igit to char in hex. There are other command line tools to do byte endian swap, but I find this useful for debugging. Signed-off-by: Balbir Singh <bsinghar...@gmail.com> --- arch/powerpc/xmon/xmon.c | 58 ++-- 1 file changed, 51 insertions(+), 7 de

[PATCH] Rename early_init_mmu to early_init_mmu_primary

It helps clarify that the action taken is just for the primary CPU and more action might be required for in the secondaries in early_init_mmu_secondary. This patch does not introduce a functional change Signed-off-by: Balbir Singh <bsinghar...@gmail.com> --- arch/powerpc/include/asm/boo

Re: [PATCH] powerpc/64: Simplify adaptation to new ISA v3.00 HPTE format

_v=%016lx, hpte_r=%016lx\n", > i, hpte_v, hpte_r); > } > > + if (cpu_has_feature(CPU_FTR_ARCH_300)) { > + hpte_r = hpte_old_to_new_r(hpte_v, hpte_r); > + hpte_v = hpte_old_to_new_v(hpte_v); I don't think its called out, but it seems like we have a depedency where hpte_old_to_new_r MUST be called prior to hpte_old_to_new_v, since we need the v bit to be extracted and moved to the _r bit. I suspect one way to avoid that dependency is to pass the ssize_field or to do both conversions at once. Otherwise this looks good Balbir Singh

Re: [v1 0/3] Support memory cgroup hotplug

On 16/11/16 02:42, Tejun Heo wrote: > Hello, Balbir. > > On Tue, Nov 15, 2016 at 10:44:02AM +1100, Balbir Singh wrote: >> In the absence of hotplug we use extra memory proportional to >> (possible_nodes - online_nodes) * number_of_cgroups. PPC64 has a patch >> t

[RESEND] [PATCH v1 3/3] powerpc: fix node_possible_map limitations

: Johannes Weiner <han...@cmpxchg.org> Cc: Michal Hocko <mho...@kernel.org> Cc: Vladimir Davydov <vdavydov....@gmail.com> Signed-off-by: Balbir Singh <bsinghar...@gmail.com> Acked-by: Michael Ellerman <m...@ellerman.id.au> --- arch/powerpc/mm/numa.c | 7 --- 1 fil

[RESEND] [PATCH v1 1/3] Add basic infrastructure for memcg hotplug support

...@cmpxchg.org> Cc: Michal Hocko <mho...@kernel.org> Cc: Vladimir Davydov <vdavydov@gmail.com> Signed-off-by: Balbir Singh <bsinghar...@gmail.com> --- mm/memcontrol.c | 68 ++--- 1 file changed, 60 insertions

[RESEND][v1 0/3] Support memory cgroup hotplug

nd movable nodes enabled. I've offlined nodes and checked that the system and cgroups with tasks deep in the hierarchy continue to work fine. Balbir Singh (3): Add basic infrastructure for memcg hotplug support Move from all possible nodes to online nodes powerpc: fix node_possible_map limita

[RESEND] [PATCH v1 2/3] Move from all possible nodes to online nodes

; Cc: Michal Hocko <mho...@kernel.org> Cc: Vladimir Davydov <vdavydov@gmail.com> Signed-off-by: Balbir Singh <bsinghar...@gmail.com> --- mm/memcontrol.c | 28 +++- 1 file changed, 23 insertions(+), 5 deletions(-) diff --git a/mm/memcontrol.c b/mm

Re: [PATCH] powerpc/mm/coproc: Handle bad address on coproc slb fault

nt copro_calculate_slb(struct mm_struct *mm, u64 ea, > struct copro_slb *slb) > pr_debug("%s: invalid region access at %016llx\n", __func__, > ea); > return 1; > } > + /* Bad address */ > + if (!vsid) > + return 1; Reviewed-by: Balbir Singh <bsinghar...@gmail.com> Balbir Singh.

Re: [PATCH] powerpc/xmon: Add support for dump in reverse

> https://github.com/0day-ci/linux/commits/Balbir-Singh/powerpc-xmon-Add-support-for-dump-in-reverse/20161118-081358 > base: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next > config: powerpc-ppc64e_defconfig (attached as .config) > compiler: powerpc64-linux-gnu

Re: [PATCH v7 2/5] mm: remove x86-only restriction of movable_node

ot require the > bottom-up toggle. > > So, resolve things by moving (1) from cmdline_parse_movable_node() to > x86's setup_arch(), immediately after the movable_node parameter has > been parsed. > > Signed-off-by: Reza Arbab <ar...@linux.vnet.ibm.com> Acked-by: Balbir Singh <bsinghar...@gmail.com>

[powerpc v4 2/3] Detect instruction fetch denied and report

ISA 3 allows for prevention of instruction fetch and execution of user mode pages. If such an error occurs, SRR1 bit 35 reports the error. We catch and report the error in do_page_fault() Signed-off-by: Balbir Singh <bsinghar...@gmail.com> --- arch/powerpc/mm/fault.c | 4 1 file chan

[powerpc v4 1/3] Setup AMOR in HV mode

AMOR should be setup in HV mode, we set it up once and let the generic kernel handle IAMR. This patch is used to enable storage keys in a following patch as defined in ISA 3 Reported-by: Aneesh Kumar K.V <aneesh.ku...@linux.vnet.ibm.com> Signed-off-by: Balbir Singh <bsinghar...@

[powerpc v4 0/3] Enable IAMR storage keys for radix

org> Cc: Aneesh Kumar K.V <aneesh.ku...@linux.vnet.ibm.com> Cc: Paul Mackerras <pau...@samba.org> Changelog Enable both primary and secondary MMU's (BUG FIX) Make the check for instruction violations common (SRR1_ISI_N_OR_G) Balbir Singh (3): Setup AMOR in HV mode D

[powerpc v4 3/3] Enable storage keys for radix - user mode execution

and a simple payload. The payload is specific to the build I've tested. Signed-off-by: Balbir Singh <bsinghar...@gmail.com> --- arch/powerpc/mm/pgtable-radix.c | 20 1 file changed, 20 insertions(+) diff --git a/arch/powerpc/mm/pgtable-radix.c b/arch/powerpc/mm/pgtable-radix.c

Re: [PATCH V3 1/2] mm: move vma_is_anonymous check within pmd_move_must_withdraw

tures that need unconditional overriding can override this function. ppc64 needs to override the function when the MMU is configured to use hash PTE's. What do you think? Balbir Singh.

Re: [PATCH v7 4/5] of/fdt: mark hotpluggable memory

g(). > > If we introduce a dt property to describe memory as hotpluggable, > configs supporting early fdt may then also do this marking and use > movable nodes. > > Signed-off-by: Reza Arbab <ar...@linux.vnet.ibm.com> > Tested-by: Balbir Singh <bsinghar...@gmail.com> Also Acked-by: Balbir Singh <bsinghar...@gmail.com>

[v1 0/3] Support memory cgroup hotplug

to online nodes. Cc: Tejun Heo <t...@kernel.org> Cc: Andrew Morton <a...@linux-foundation.org> I've tested this patches under a VM with two nodes and movable nodes enabled. I've offlined nodes and checked that the system and cgroups with tasks deep in the hierarchy continue to work fine.

[PATCH v1 1/3] Add basic infrastructure for memcg hotplug support

and does the allocation and free of those structures per cgroup. We walk every cgroup per event, its a trade-off of allocating upfront vs allocating on demand and freeing on offline. Signed-off-by: Balbir Singh <bsinghar...@gmail.com> --- mm/memcontrol.

[PATCH v1 2/3] Move from all possible nodes to online nodes

Move routines that do operations on all nodes to just the online nodes. Most of the changes are very obvious (like the ones related to soft limit tree per node) Signed-off-by: Balbir Singh <bsinghar...@gmail.com> --- mm/memcontrol.c | 28 +++- 1 file chang

[PATCH v1 3/3] powerpc: fix node_possible_map limitations

We've fixed the memory hotplug issue with memcg, hence this work around should not be required. Fixes: commit 3af229f2071f ("powerpc/numa: Reset node_possible_map to only node_online_map") Signed-off-by: Balbir Singh <bsinghar...@gmail.com> --- arch/powerpc/mm/numa.c | 7 ---

[TRIVIAL][PATCH] Fixup OOPS output

,LE > and more output that is not easy to parse Fix the OOPS output so that it is easier on the eyes again Signed-off-by: Balbir Singh <bsinghar...@gmail.com> --- arch/powerpc/kernel/process.c | 24 1 file changed, 12 insertions(+), 12 deletions(-) diff

[PATCH 2/3] Detect instruction fetch denied and report

ISA 3 allows for prevention of instruction fetch and execution of user mode pages. If such an error occurs, SRR1 bit 35 reports the error. We catch and report the error in do_page_fault() Signed-off-by: Balbir Singh <bsinghar...@gmail.com> --- arch/powerpc/mm/fault.c | 4 1 file chan

[PATCH 3/3] Enable storage keys for radix - user mode execution

and a simple payload. The payload is specific to the build I've tested. Signed-off-by: Balbir Singh <bsinghar...@gmail.com> --- arch/powerpc/mm/pgtable-radix.c | 19 +++ 1 file changed, 19 insertions(+) diff --git a/arch/powerpc/mm/pgtable-radix.c b/arch/powerpc/mm/pgtable-radix.c

[PATCH 1/3] Setup AMOR in HV mode

AMOR should be setup in HV mode, we set it up once and let the generic kernel handle IAMR. This patch is used to enable storage keys in a following patch as defined in ISA 3 Reported-by: Aneesh Kumar K.V <aneesh.ku...@linux.vnet.ibm.com> Signed-off-by: Balbir Singh <bsinghar...@

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