On Tue, Nov 29, 2016 at 08:48:26AM -0600, Bjorn Helgaas wrote:
>On Tue, Nov 29, 2016 at 03:55:46PM +1100, Gavin Shan wrote:
>> On Mon, Nov 28, 2016 at 10:15:06PM -0600, Bjorn Helgaas wrote:
>> >Previously pci_update_resource() used the same code path for updating
>> >standard BARs and VF BARs in
On Wed, Nov 30, 2016 at 10:20:28AM +1100, Gavin Shan wrote:
> On Tue, Nov 29, 2016 at 08:48:26AM -0600, Bjorn Helgaas wrote:
> >On Tue, Nov 29, 2016 at 03:55:46PM +1100, Gavin Shan wrote:
> >> On Mon, Nov 28, 2016 at 10:15:06PM -0600, Bjorn Helgaas wrote:
> >> >Previously pci_update_resource()
Aneesh/Ben reported that the change to do_page_fault() needs
to handle the case where CPU_FTR_COHERENT_ICACHE is missing
but we have CPU_FTR_NOEXECUTE. In those cases the check
added for SRR1_ISI_N_OR_G might trigger a false positive.
This patch checks for CPU_FTR_COHERENT_ICACHE in addition
to
Recent versions of OPAL will be able to provide names for the various
OPAL interrupts via a new "opal-interrupt-names" property. So let's
use them to make /proc/interrupts more informative.
This also modernises the code that fetches the interrupt array to use
the helpers provided by the generic
On 28/11/16 17:17, Aneesh Kumar K.V wrote:
> This patch adds a new software defined pte bit. We use the reserved
> fields of ISA 3.0 pte definition since we will only be using this
> on DD1 code paths. We can possibly look at removing this code later.
>
> The software bit will be used to
On Wed, 2016-11-30 at 11:14 +1100, Balbir Singh wrote:
> > +#define _RPAGE_RSV1 0x1000UL
> > +#define _RPAGE_RSV2 0x0800UL
> > +#define _RPAGE_RSV3 0x0400UL
> > +#define _RPAGE_RSV4 0x0200UL
> > +
>
> We use the
Hello Andrew,
Am Dienstag, 29. November 2016, 13:45:18 BRST schrieb Andrew Morton:
> On Tue, 29 Nov 2016 23:45:46 +1100 Michael Ellerman
wrote:
> > This is v11 of the kexec_file_load() for powerpc series.
> >
> > I've stripped this down to the minimum we need, so we can
On Tue, Nov 29, 2016 at 10:10:56PM +0100, Tom Gundersen wrote:
> On Tue, Nov 15, 2016 at 10:28 AM, Johannes Berg
> wrote:
> > My argument basically goes like this:
> >
> > First, given good drivers (i.e. using request_firmware_nowait())
> > putting firmware even for a
On Tue, 29 Nov 2016 23:45:46 +1100 Michael Ellerman wrote:
> This is v11 of the kexec_file_load() for powerpc series.
>
> I've stripped this down to the minimum we need, so we can get this in for
> 4.10.
> Any additions can come later incrementally.
This made a bit of a
On Wed, Nov 09, 2016 at 03:21:07AM -0800, Andy Lutomirski wrote:
> On Wed, Nov 9, 2016 at 1:13 AM, Daniel Wagner
> wrote:
> > [CC: added Harald]
> >
> > As Harald pointed out over a beer yesterday evening, there is at least
> > one more reason why UMH isn't obsolete.
On Tue, Nov 29, 2016 at 10:47:32AM -0800, Geoff Levand wrote:
> GCC 5 generates different code for this bootwrapper null check
> that causes the PS3 to hang very early in its bootup. This
> check is of limited value, so just get rid of it.
>
> Signed-off-by: Geoff Levand
>
On Tue, Nov 15, 2016 at 10:28 AM, Johannes Berg
wrote:
> My argument basically goes like this:
>
> First, given good drivers (i.e. using request_firmware_nowait())
> putting firmware even for a built-in driver into initramfs or not
> should be a system integrator
On 28/11/16 17:16, Aneesh Kumar K.V wrote:
> W.r.t hash page table config, we support 16MB and 16GB as the hugepage
> size. Update the hstate_get_psize to handle 16M and 16G.
>
> Signed-off-by: Aneesh Kumar K.V
> ---
>
Signed-off-by: Nicholas Piggin
---
arch/powerpc/xmon/xmon.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index 7605455..435f5f5 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
Le 29/11/2016 à 09:56, Nicholas Piggin a écrit :
Signed-off-by: Nicholas Piggin
---
arch/powerpc/xmon/xmon.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index 7605455..435f5f5 100644
---
On Tue, 29 Nov 2016 10:06:43 +0100
Christophe LEROY wrote:
> Le 29/11/2016 à 09:56, Nicholas Piggin a écrit :
> > Signed-off-by: Nicholas Piggin
> > ---
> > arch/powerpc/xmon/xmon.c | 5 -
> > 1 file changed, 4 insertions(+), 1 deletion(-)
> >
>
This patch implements HW breakpoint on the 8xx. The 8xx has
capability to manage HW breakpoints, which is slightly different
than BOOK3S:
1/ The breakpoint match doesn't trigger a DSI exception but a
dedicated data breakpoint exception.
2/ The breakpoint happens after the instruction has
On 28/11/16 17:16, Aneesh Kumar K.V wrote:
> Changes from v6:
> * restrict the new pte bit to radix and DD1 config
>
> Changes from V5:
> Switch to use pte bits to track page size.
>
>
This series looks much better, I wish there was a better
way of avoiding to have to pass the address to the
This serie provides HW breakpoints on 32 bits Book3S and 8xx
Tested on mpc8321
Tested on mpc885
Christophe Leroy (2):
powerpc/32: Enable HW_BREAKPOINT on BOOK3S
powerpc/8xx: Implement hw_breakpoint
arch/powerpc/Kconfig | 2 +-
arch/powerpc/include/asm/processor.h | 2 +-
The single-operand form of tlbie used to be accepted as the second
operand (L) being implicitly 0. Newer binutils reject this.
Change remaining single-op tlbie instructions to have explicit 0
second argument.
Signed-off-by: Nicholas Piggin
---
On 10/11/16 18:54, Gautham R. Shenoy wrote:
> From: "Gautham R. Shenoy"
>
> Currently all the low-power idle states are expected to wake up
> at reset vector 0x100. Which is why the macro IDLE_STATE_ENTER_SEQ
> that puts the CPU to an idle state and never returns.
>
>
On 28/11/16 17:16, Aneesh Kumar K.V wrote:
> We will start moving some book3s specific hugetlb functions there.
You mean for both radix and hash right?
Balbir
BOOK3S also has DABR register and capability to handle data
breakpoints, so this patch enable it on all BOOK3S, not only 64 bits.
Signed-off-by: Christophe Leroy
---
arch/powerpc/Kconfig | 2 +-
arch/powerpc/include/asm/processor.h | 2 +-
2 files
Some KVM functions for book3s_hv are called in real mode.
In real mode the top 4 bits of the address space are ignored,
hence an address beginning with 0xc000+offset is the
same as 0xd000+offset. The issue was observed when
a kvm memslot resolution lead to random values when
access from
From: Johan Hovold
Date: Mon, 28 Nov 2016 19:24:53 +0100
> This series fixes failures to deregister and free fixed-link phydevs
> that have been registered using the of_phy_register_fixed_link()
> interface.
>
> All but two drivers currently fail to do this and this series
We are going to get rid of @current references in mmu_context_boos3s64.c
and cache mm_struct in the VFIO container. Since mm_context_t does not
have reference counting, we will be using mm_struct which does have
the reference counter.
This changes mm_iommu_init/mm_iommu_cleanup to receive
Andrew Morton writes:
> On Tue, 29 Nov 2016 23:45:46 +1100 Michael Ellerman
> wrote:
>
>> This is v11 of the kexec_file_load() for powerpc series.
>>
>> I've stripped this down to the minimum we need, so we can get this in for
>> 4.10.
>> Any
There is already a helper to create a DMA window which does allocate
a table and programs it to the IOMMU group. However
tce_iommu_take_ownership_ddw() did not use it and did these 2 calls
itself to simplify error path.
Since we are going to delay the default window creation till
the default
The iommu_table struct manages a hardware TCE table and a vmalloc'd
table with corresponding userspace addresses. Both are allocated when
the default DMA window is created and this happens when the very first
group is attached to a container.
As we are going to allow the userspace to configure
These patches are to fix a bug when pages stay pinned hours
after QEMU which requested pinning exited.
Change to v6 it in the last 2 patches, individual patches got
detailed changelog.
Please comment. Thanks.
Alexey Kardashevskiy (7):
powerpc/iommu: Pass mm_struct to init/cleanup helpers
We are going to allow the userspace to configure container in
one memory context and pass container fd to another so
we are postponing memory allocations accounted against
the locked memory limit. One of previous patches took care of
it_userspace.
At the moment we create the default DMA window
I ran into this during some testing on qemu. The current
facility_strings[] are correct when the trap address is
0xf80 (hypervisor facility unavailable). When the trap
address is 0xf60, IC (Interruption Cause) a.k.a status
in the code is undefined for values 0 and 1. This patch
adds a check to
In some situations the userspace memory context may live longer than
the userspace process itself so if we need to do proper memory context
cleanup, we better have tce_container take a reference to mm_struct and
use it later when the process is gone (@current or @current->mm is NULL).
This
This changes mm_iommu_xxx helpers to take mm_struct as a parameter
instead of getting it from @current which in some situations may
not have a valid reference to mm.
This changes helpers to receive @mm and moves all references to @current
to the caller, including checks for !current and
Balbir Singh writes:
> On 28/11/16 17:16, Aneesh Kumar K.V wrote:
>> Changes from v6:
>> * restrict the new pte bit to radix and DD1 config
>>
>> Changes from V5:
>> Switch to use pte bits to track page size.
>
> This series looks much better, I wish there was a better
>
At the moment the userspace tool is expected to request pinning of
the entire guest RAM when VFIO IOMMU SPAPR v2 driver is present.
When the userspace process finishes, all the pinned pages need to
be put; this is done as a part of the userspace memory context (MM)
destruction which happens on the
On 30/11/16 11:35, Benjamin Herrenschmidt wrote:
> On Wed, 2016-11-30 at 11:14 +1100, Balbir Singh wrote:
>>> +#define _RPAGE_RSV1 0x1000UL
>>> +#define _RPAGE_RSV2 0x0800UL
>>> +#define _RPAGE_RSV3 0x0400UL
>>> +#define _RPAGE_RSV4
On Tue, Nov 29, 2016 at 03:20:37PM +1300, Chris Packham wrote:
> The l2-cache controller on the T2080 SoC has similar capabilities to the
> others already supported by the mpc85xx_edac driver. Add it to the list
> of compatible devices.
>
> Signed-off-by: Chris Packham
On 11/29/16, Balbir Singh wrote:
>
>
> The PVR list has been updated and IBM_ARCH_VEC_NRCORES_OFFSET.
> This provides the cpu versions supported to the hypervisor and in this case
> tells the hypervisor that the guest supports ISA 3.0 and Power9.
>
> Signed-off-by: Balbir
On Wed, 2016-11-23 at 13:02:07 UTC, Nicholas Piggin wrote:
> >From 80f23935cadb ("powerpc: Convert cmp to cmpd in idle enter sequence"):
>
> PowerPC's "cmp" instruction has four operands. Normally people write
> "cmpw" or "cmpd" for the second cmp operand 0 or 1. But, frequently
>
From: Thiago Jung Bauermann
kexec_locate_mem_hole will be used by the PowerPC kexec_file_load
implementation to find free memory for the purgatory stack.
Signed-off-by: Thiago Jung Bauermann
Acked-by: Dave Young
From: Thiago Jung Bauermann
Define the Kconfig symbol so that the kexec_file_load() code can be
built, and wire up the syscall so that it can be called.
Signed-off-by: Thiago Jung Bauermann
Signed-off-by: Michael Ellerman
From: Thiago Jung Bauermann
Enable CONFIG_KEXEC_FILE in powernv_defconfig, ppc64_defconfig and
pseries_defconfig.
It depends on CONFIG_CRYPTO_SHA256=y, so add that as well.
Signed-off-by: Thiago Jung Bauermann
Signed-off-by: Michael
From: Thiago Jung Bauermann
This is done to simplify the kexec_add_buffer argument list.
Adapt all callers to set up a kexec_buf to pass to kexec_add_buffer.
In addition, change the type of kexec_buf.buffer from char * to void *.
There is no particular reason for it
From: Thiago Jung Bauermann
Commit 2965faa5e03d ("kexec: split kexec_load syscall from kexec core
code") introduced CONFIG_KEXEC_CORE so that CONFIG_KEXEC means whether
the kexec_load system call should be compiled-in and CONFIG_KEXEC_FILE
means whether the
From: Thiago Jung Bauermann
Allow architectures to specify a different memory walking function for
kexec_add_buffer. x86 uses iomem to track reserved memory ranges, but
PowerPC uses the memblock subsystem.
Signed-off-by: Thiago Jung Bauermann
From: Thiago Jung Bauermann
This purgatory implementation is based on the versions from kexec-tools
and kexec-lite, with additional changes.
Signed-off-by: Thiago Jung Bauermann
Signed-off-by: Michael Ellerman
---
On Wed, 2016-11-23 at 13:02:09 UTC, Nicholas Piggin wrote:
> This converts one that was missed by b1576fec7f4d ("powerpc: No need
> to use dot symbols when branching to a function").
>
> Signed-off-by: Nicholas Piggin
Applied to powerpc next, thanks.
On Mon, 2016-11-28 at 06:16:58 UTC, "Aneesh Kumar K.V" wrote:
> We will start moving some book3s specific hugetlb functions there.
>
> Signed-off-by: Aneesh Kumar K.V
Series applied to powerpc next, thanks.
The PVR list has been updated and IBM_ARCH_VEC_NRCORES_OFFSET.
This provides the cpu versions supported to the hypervisor and in this case
tells the hypervisor that the guest supports ISA 3.0 and Power9.
Signed-off-by: Balbir Singh
---
arch/powerpc/include/asm/prom.h |
On Mon, 2016-11-21 at 10:14:33 UTC, Michael Ellerman wrote:
> Back in 2005 when the ppc/ppc64 merge started, we used to build the
> kernel code in arch/powerpc but use the boot code from arch/ppc or
> arch/ppc64 depending on whether we were building for 32 or 64-bit.
>
> Originally we called the
This is v11 of the kexec_file_load() for powerpc series.
I've stripped this down to the minimum we need, so we can get this in for 4.10.
Any additions can come later incrementally.
If no one objects I'll merge this via the powerpc tree. The three kexec patches
have been acked by Dave Young
From: Thiago Jung Bauermann
This patch adds the support code needed for implementing
kexec_file_load() on powerpc.
This consists of functions to load the ELF kernel, either big or little
endian, and setup the purgatory enviroment which switches from the first
kernel
On Tue, Nov 29, 2016 at 03:55:46PM +1100, Gavin Shan wrote:
> On Mon, Nov 28, 2016 at 10:15:06PM -0600, Bjorn Helgaas wrote:
> >Previously pci_update_resource() used the same code path for updating
> >standard BARs and VF BARs in SR-IOV capabilities.
> >
> >Split the VF BAR update into a new
> "Benjamin" == Benjamin Herrenschmidt writes:
Benjamin> LSIs must be ack'ed with an MMIO otherwise they remain
Benjamin> asserted forever. This is controlled by the "clear_isr" flag.
Benjamin> While we set that flag properly when deciding initially
Benjamin>
Uma,
This looks better, thanks for reworking.
-matt
> On Nov 28, 2016, at 6:41 PM, Uma Krishnan wrote:
>
> During test, a command room violation interrupt is occasionally seen
> for the master context when the CXL flash devices are stressed.
>
> After studying
GCC 5 generates different code for this bootwrapper null check
that causes the PS3 to hang very early in its bootup. This
check is of limited value, so just get rid of it.
Signed-off-by: Geoff Levand
---
arch/powerpc/boot/ps3-head.S | 5 -
arch/powerpc/boot/ps3.c
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